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it8213/piix/slc90e66: remove {it8213,piix,slc90e66}_dma_2_pio()

PATCH In review Bartlomiej Zolnierkiewicz 2 participants 5 messages Aug 4, 2007 – Aug 10, 2007 libata

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Bartlomiej Zolnierkiewicz

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#0 lore raw

PATCH 2/11 it8213/piix/slc90e66: remove {it8213,piix,slc90e66}_dma_2_pio()

Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>
---
 drivers/ide/pci/it8213.c   |   44 +++++++++++---------------------------------
 drivers/ide/pci/piix.c     |   44 +++++++++++---------------------------------
 drivers/ide/pci/slc90e66.c |   33 +++++++++++----------------------
 3 files changed, 33 insertions(+), 88 deletions(-)
drivers/ide/pci/it8213.c +11 -33
Index: b/drivers/ide/pci/it8213.c
===================================================================
@@ -18,37 +18,6 @@
 #include <asm/io.h>
 
 /**
- *	it8213_dma_2_pio		-	return the PIO mode matching DMA
- *	@xfer_rate: transfer speed
- *
- *	Returns the nearest equivalent PIO timing for the DMA
- *	mode requested by the controller.
- */
-
-static u8 it8213_dma_2_pio (u8 xfer_rate) {
-	switch(xfer_rate) {
-		case XFER_UDMA_6:
-		case XFER_UDMA_5:
-		case XFER_UDMA_4:
-		case XFER_UDMA_3:
-		case XFER_UDMA_2:
-		case XFER_UDMA_1:
-		case XFER_UDMA_0:
-		case XFER_MW_DMA_2:
-			return 4;
-		case XFER_MW_DMA_1:
-			return 3;
-		case XFER_SW_DMA_2:
-			return 2;
-		case XFER_MW_DMA_0:
-		case XFER_SW_DMA_1:
-		case XFER_SW_DMA_0:
-		default:
-			return 0;
-	}
-}
-
-/**
  *	it8213_set_pio_mode	-	set host controller for PIO mode
  *	@drive: drive
  *	@pio: PIO mode number

@@ -124,7 +93,7 @@ static void it8213_set_dma_mode(ide_driv
 	int w_flag		= 0x10 << drive->dn;
 	int u_speed		= 0;
 	u16			reg4042, reg4a;
-	u8			reg48, reg54, reg55;
+	u8			reg48, reg54, reg55, pio;
 
 	pci_read_config_word(dev, maslave, &reg4042);
 	pci_read_config_byte(dev, 0x48, &reg48);

@@ -165,7 +134,11 @@ static void it8213_set_dma_mode(ide_driv
 				pci_write_config_byte(dev, 0x54, reg54 | v_flag);
 		} else
 			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
+
+		pio = 4;
 	} else {
+		const u8 mwdma_to_pio[] = { 0, 3, 4 };
+
 		if (reg48 & u_flag)
 			pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
 		if (reg4a & a_speed)

@@ -174,9 +147,14 @@ static void it8213_set_dma_mode(ide_driv
 			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
 		if (reg55 & w_flag)
 			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
+
+		if (speed >= XFER_MW_DMA_0)
+			pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
+		else
+			pio = 2; /* only SWDMA2 is allowed */
 	}
 
-	it8213_set_pio_mode(drive, it8213_dma_2_pio(speed));
+	it8213_set_pio_mode(drive, pio);
 }
 
 /**
drivers/ide/pci/piix.c +11 -33

71 lines not on this page · raw message

drivers/ide/pci/slc90e66.c +11 -22
Index: b/drivers/ide/pci/slc90e66.c
===================================================================
@@ -21,27 +21,6 @@
 
 #include <asm/io.h>
 
-static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
-	switch(xfer_rate) {
-		case XFER_UDMA_4:
-		case XFER_UDMA_3:
-		case XFER_UDMA_2:
-		case XFER_UDMA_1:
-		case XFER_UDMA_0:
-		case XFER_MW_DMA_2:
-			return 4;
-		case XFER_MW_DMA_1:
-			return 3;
-		case XFER_SW_DMA_2:
-			return 2;
-		case XFER_MW_DMA_0:
-		case XFER_SW_DMA_1:
-		case XFER_SW_DMA_0:
-		default:
-			return 0;
-	}
-}
-
 static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
 {
 	ide_hwif_t *hwif	= HWIF(drive);

@@ -103,6 +82,7 @@ static void slc90e66_set_dma_mode(ide_dr
 	int sitre = 0, a_speed	= 7 << (drive->dn * 4);
 	int u_speed = 0, u_flag = 1 << drive->dn;
 	u16			reg4042, reg44, reg48, reg4a;
+	u8			pio;
 
 	pci_read_config_word(dev, maslave, &reg4042);
 	sitre = (reg4042 & 0x4000) ? 1 : 0;

@@ -131,14 +111,23 @@ static void slc90e66_set_dma_mode(ide_dr
 			pci_read_config_word(dev, 0x4a, &reg4a);
 			pci_write_config_word(dev, 0x4a, reg4a|u_speed);
 		}
+
+		pio = 4;
 	} else {
+		const u8 mwdma_to_pio[] = { 0, 3, 4 };
+
 		if (reg48 & u_flag)
 			pci_write_config_word(dev, 0x48, reg48 & ~u_flag);
 		if (reg4a & a_speed)
 			pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
+
+		if (speed >= XFER_MW_DMA_0)
+			pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
+		else
+			pio = 2; /* only SWDMA2 is allowed */
 	}
 
-	slc90e66_set_pio_mode(drive, slc90e66_dma_2_pio(speed));
+	slc90e66_set_pio_mode(drive, pio);
 }
 
 static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
#1 lore raw

Hello.

Quoted 1 line · Bartlomiej Zolnierkiewicz
Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>

Sigh... when I was talking about getting rid of that function, I meant
that we need to also decouple UltraDMA from PIO -- which is what this patch misses...
Actually, I intended to decouple DMA form PIO in this drivers completely
but that would be a next step...

Quoted 14 lines

Index: b/drivers/ide/pci/it8213.c
===================================================================

drivers/ide/pci/it8213.c +1 -1
@@ -124,7 +93,7 @@ static void it8213_set_dma_mode(ide_driv
 	int w_flag		= 0x10 << drive->dn;
 	int u_speed		= 0;
 	u16			reg4042, reg4a;
-	u8			reg48, reg54, reg55;
+	u8			reg48, reg54, reg55, pio;
 
 	pci_read_config_word(dev, maslave, &reg4042);
 	pci_read_config_byte(dev, 0x48, &reg48);

drivers/ide/pci/it8213.c static void it8213_set_dma_mode(ide_driv · line 138

Quoted 5 lines
drivers/ide/pci/it8213.c +2 -0
@@ -165,7 +134,11 @@ static void it8213_set_dma_mode(ide_driv
 				pci_write_config_byte(dev, 0x54, reg54 | v_flag);
 		} else
 			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
+
+		pio = 4;

Why let this stupidity live?

Quoted 7 lines
drivers/ide/pci/it8213.c +2 -0
 	} else {
+		const u8 mwdma_to_pio[] = { 0, 3, 4 };
+
 		if (reg48 & u_flag)
 			pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
 		if (reg4a & a_speed)

drivers/ide/pci/it8213.c static void it8213_set_dma_mode(ide_driv · line 154

Quoted 8 lines
drivers/ide/pci/it8213.c +5 -0
@@ -174,9 +147,14 @@ static void it8213_set_dma_mode(ide_driv
 			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
 		if (reg55 & w_flag)
 			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
+
+		if (speed >= XFER_MW_DMA_0)
+			pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
+		else
+			pio = 2; /* only SWDMA2 is allowed */

Well, MWDMA0 is also not allowed, so you could have cut on mwdma_to_pio
array size.

MBR, Sergei

author
#2 lore raw
Quoted 9 lines · Sergei Shtylyov

Hello.

Quoted 1 line · Bartlomiej Zolnierkiewicz
Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>

Sigh... when I was talking about getting rid of that function, I meant
that we need to also decouple UltraDMA from PIO -- which is what this patch misses...

Addressed in the follow-up patch.

Quoted 2 lines

Actually, I intended to decouple DMA form PIO in this drivers completely
but that would be a next step...

DMA and PIO timings are shared on these controllers (except when DTE bit is set, then PIO0 timings are always used and DMA timings are independent)...?

Bart

#3 lore raw
Quoted 6 lines · Bartlomiej Zolnierkiewicz
Quoted 4 lines
Quoted 1 line
Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>

Sigh... when I was talking about getting rid of that function, I meant
that we need to also decouple UltraDMA from PIO -- which is what this patch misses...

Addressed in the follow-up patch.

That's good, thanks. :-)

Quoted 5 lines
Quoted 2 lines

Actually, I intended to decouple DMA form PIO in this drivers completely
but that would be a next step...

DMA and PIO timings are shared on these controllers (except when DTE bit is set, then PIO0 timings are always used and DMA timings are independent)...?

Yeah, but one do not need to toggle IORDY/prefetch enables for DMA modes --
actually, this is a buglet -- despite what Intel's manuals say...

Quoted 1 line

Bart

MBR, Sergei