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add image size and descriptors for Spartan 3E FPGA chips

PATCH New Bruce Adler 2 participants 6 messages Aug 7, 2007 – Aug 10, 2007

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#0 lore raw

PATCH 1/1 add image size and descriptors for Spartan 3E FPGA chips

Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)

Signed-off by: Bruce Adler <[email protected]>

include/spartan3.h 2007-08-06 23:23:06.000000000 -0700 renamed from include/spartan3.h 2007-08-06 23:24:11.000000000 -0700 +24 -0
diff -pur a/include/spartan3.h b/include/spartan3.h
@@ -73,6 +73,13 @@ typedef struct {
  #define XILINX_XC3S4000_SIZE   11316864/8
  #define XILINX_XC3S5000_SIZE   13271936/8
 
+/* Spartan-3E (v3.4) */
+#define        XILINX_XC3S100E_SIZE    581344/8
+#define        XILINX_XC3S250E_SIZE    1353728/8
+#define        XILINX_XC3S500E_SIZE    2270208/8
+#define        XILINX_XC3S1200E_SIZE   3841184/8
+#define        XILINX_XC3S1600E_SIZE   5969696/8
+
  /* Descriptor Macros
   *********************************************************************/
  /* Spartan-II devices */
@@ -100,4 +107,21 @@ typedef struct {
  #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
  { Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie }
 
+
+/* Spartan-3E devices */
+#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+
  #endif /* _SPARTAN3_H_ */
#1 lore raw

PATCH 1/1 add image size and descriptors for Spartan 3E FPGA chips

Quoted 4 lines · In message <[email protected]> you wrote:

Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)

Signed-off by: Bruce Adler <[email protected]>

Patch does not apply to u-boot-testing:

error: patch failed: include/spartan3.h:73
error: include/spartan3.h: patch does not apply
fatal: sha1 information is lacking or useless (include/spartan3.h). Patch does not record usable index information.
Cannot fall back to three-way merge.
Patch failed at 0001.

Trying manually:

patching file include/spartan3.h
Hunk #1 FAILED at 73.
Hunk #2 FAILED at 107.
2 out of 2 hunks FAILED -- saving rejects to file include/spartan3.h.rej

Please fix and repost.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Well, the way I see it, logic is only a way of being ignorant by num-
bers.                                 - Terry Pratchett, _Small Gods_
#2 lore raw

PATCH 1/1 repost: add image size and descriptors for Spartan 3E FPGA chips

[repost, this time without expanding the tabs to whitespace]

Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)

Signed-off by: Bruce Adler <[email protected]>

include/spartan3.h +24 -0
diff -ur a/include/spartan3.h b/include/spartan3.h
@@ -73,6 +73,13 @@
  #define XILINX_XC3S4000_SIZE 	11316864/8
  #define XILINX_XC3S5000_SIZE 	13271936/8
 
+/* Spartan-3E (v3.4) */
+#define	XILINX_XC3S100E_SIZE	581344/8
+#define	XILINX_XC3S250E_SIZE	1353728/8
+#define	XILINX_XC3S500E_SIZE	2270208/8
+#define	XILINX_XC3S1200E_SIZE	3841184/8
+#define	XILINX_XC3S1600E_SIZE	5969696/8
+
  /* Descriptor Macros
   *********************************************************************/
  /* Spartan-II devices */
@@ -100,4 +107,21 @@
  #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
  { Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie }
 
+
+/* Spartan-3E devices */
+#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+
  #endif /* _SPARTAN3_H_ */
#3 lore raw

PATCH 1/1 repost: add image size and descriptors for Spartan 3E FPGA chips

Quoted 6 lines · In message <[email protected]> you wrote:

[repost, this time without expanding the tabs to whitespace]

Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)

Signed-off by: Bruce Adler <[email protected]>

Still doesn't work for me:

error: patch failed: include/spartan3.h:73
error: include/spartan3.h: patch does not apply
fatal: sha1 information is lacking or useless (include/spartan3.h). Patch does not record usable index information.
Cannot fall back to three-way merge.
Patch failed at 0001.

Please make sure your patch really applies to a current tree....

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Comparing information  and  knowledge  is  like  asking  whether  the
fatness  of  a  pig  is more or less green than the designated hitter
rule."                                               - David Guaspari
#4 lore raw

PATCH 1/1 repost: add image size and descriptors for Spartan 3E FPGA chips

Quoted 9 lines · Wolfgang Denk
Quoted 5 lines · In message <[email protected]> you wrote:

[repost, this time without expanding the tabs to whitespace]

Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)

Signed-off by: Bruce Adler <[email protected]>

Still doesn't work for me:

Quoted 8 lines

error: patch failed: include/spartan3.h:73
error: include/spartan3.h: patch does not apply
fatal: sha1 information is lacking or useless (include/spartan3.h). Patch does not record usable index information.
Cannot fall back to three-way merge.
Patch failed at 0001.

Please make sure your patch really applies to a current tree....

it looks to me like some gateway somewhere is adding an extra blank onto the beginning of any line that starts with a blank

here's the exact same thing as an attachment; I tried this in the junk newsgroup and it seems to make it through without being corrupted

if this doesn't work I'm out of ideas

Signed-off by: Bruce Adler <[email protected]>
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#5 lore raw

PATCH 1/1 repost: add image size and descriptors for Spartan 3E FPGA chips

Quoted 8 lines · In message <[email protected]> you wrote:

it looks to me like some gateway somewhere is adding an extra blank onto the beginning of any line that starts with a blank

here's the exact same thing as an attachment; I tried this in the junk newsgroup and it seems to make it through without being corrupted

if this doesn't work I'm out of ideas

It worked fine - thanks for all the efforts with the many reties.

Applied.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"There are three principal ways to lose money: wine, women,  and  en-
gineers.  While  the first two are more pleasant, the third is by far
the more certain."                      -- Baron Rothschild, ca. 1800