Fix/enhance ECC POST for 440EPx/GRx

This patch allows the ECC POST to be used for different boards with the PPC440 Denali SDRAM controller. Modifications include skipping the test if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization to prevent timing errors.

---
 post/cpu/ppc4xx/Makefile     |    2 +-
 post/cpu/ppc4xx/denali_ecc.c |   90 +++++++++++++++++++++---------------------
 2 files changed, 46 insertions(+), 46 deletions(-)

index f1034da..e3f44b7 100644
@@ -24,6 +24,6 @@
 LIB	= libpostppc4xx.a
 
 AOBJS   = cache_4xx.o
-COBJS	= cache.o ether.o fpu.o spr.o uart.o watchdog.o
+COBJS	= cache.o denali_ecc.o ether.o fpu.o spr.o uart.o watchdog.o
 
 include $(TOPDIR)/post/rules.mk