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Flush stale TLBs

PATCH In review Ben Guthro 1 participant 2 messages Oct 30, 2007

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Ben Guthro

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#0 lore raw

PATCH 1/1 Flush stale TLBs

This patch causes a flush of the local host TLBs after any modification of the linearpagetable mapping.

This was not needed when vmenter/vmexit always had the side effect of flushing host TLBs.

But, with SVM ASIDs, it is possible to:
(1) Update CR3 update,
(2) vmenter the guest, and
(3) and vmexit due to a page fault
all without an intervening host TLB flush.

Then the page fault code could use the linear pagetable to read a top-level shadow page table entry.

But, without this change, it would fetch the wrong value due to a stale TLB.

This code applies to unstable. We also have a 3.1.2 version available upon request.

Signed-off-by Robert Phillips <[email protected]>
Signed-off-by Ben Guthro <[email protected]>
xen/arch/x86/mm/shadow/multi.c +14 -0
diff -r 5612da277300 xen/arch/x86/mm/shadow/multi.c
@@ -3392,6 +3392,20 @@ sh_update_linear_entries(struct vcpu *v)
 #else
 #error this should not happen
 #endif
+    if ( shadow_mode_external(d) )
+    {
+        /* Having modified the linear pagetable mapping, flush local host TLBs.
+         * This was not needed when vmenter/vmexit always had the side effect of
+         * flushing host TLBs but, with SVM ASIDs, it is possible to
+         * finish this CR3 update, vmenter the guest, vmexit due to a
+         * page fault, without an intervening host TLB flush.
+         * Then the page fault code could use the linear pagetable
+         * to read a top-level shadow page table entry.
+         * But, without this change, it would fetch the wrong value
+         * due to a stale TLB.
+         */
+        flush_local_tlb();
+    }
 }

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author
#1 lore raw

Apologies. The prior version caused build errors in unstable. Please use the attached version instead

Quoted 15 lines · Ben Guthro

This patch causes a flush of the local host TLBs after any modification of the linearpagetable mapping.

This was not needed when vmenter/vmexit always had the side effect of flushing host TLBs.

But, with SVM ASIDs, it is possible to:
(1) Update CR3 update,
(2) vmenter the guest, and
(3) and vmexit due to a page fault
all without an intervening host TLB flush.

Then the page fault code could use the linear pagetable to read a top-level shadow page table entry.

Quoted 8 lines

But, without this change, it would fetch the wrong value due to a stale TLB.

This code applies to unstable. We also have a 3.1.2 version available upon request.

Signed-off-by Robert Phillips <[email protected]>
Signed-off-by Ben Guthro <[email protected]>
xen/arch/x86/mm/shadow/multi.c +14 -0
diff -r 5612da277300 xen/arch/x86/mm/shadow/multi.c
@@ -3392,6 +3392,20 @@ sh_update_linear_entries(struct vcpu *v)
 #else
 #error this should not happen
 #endif
+    if ( shadow_mode_external(d) )
+    {
+        /* Having modified the linear pagetable mapping, flush local host TLBs.
+         * This was not needed when vmenter/vmexit always had the side effect of
+         * flushing host TLBs but, with SVM ASIDs, it is possible to
+         * finish this CR3 update, vmenter the guest, vmexit due to a
+         * page fault, without an intervening host TLB flush.
+         * Then the page fault code could use the linear pagetable
+         * to read a top-level shadow page table entry.
+         * But, without this change, it would fetch the wrong value
+         * due to a stale TLB.
+         */
+        flush_tlb_local();
+    }
 }

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[email protected]
http://lists.xensource.com/xen-devel