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hw/pxa2xx_dma.c

PATCH In review Thorsten Zitterell 2 participants 4 messages Nov 15, 2007 – Nov 17, 2007

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Thorsten Zitterell

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#0 lore raw

PATCH 1/1 hw/pxa2xx_dma.c

The following patch fixes the problem that DMA transfers are not performed when the DCSR_STOPINTR bit is set. --
Thorsten

Index: hw/pxa2xx_dma.c
===================================================================
RCS file: /sources/qemu/qemu/hw/pxa2xx_dma.c,v
retrieving revision 1.5

pxa2xx_dma.c +2 -1
diff -u -r1.5 pxa2xx_dma.c
@@ -186,7 +186,8 @@
         s->running = 1;
         for (c = 0; c < s->channels; c ++) {
             ch = &s->chan[c];
-
+            
+            ch->state &= ~DCSR_STOPINTR;
             while ((ch->state & DCSR_RUN) && !(ch->state & DCSR_STOPINTR)) {
                 /* Test for pending requests */
                 if ((ch->cmd & (DCMD_FLOWSRC | DCMD_FLOWTRG)) && !ch->request)
#1 lore raw

Hi,

Quoted 15 lines · Thorsten Zitterell

The following patch fixes the problem that DMA transfers are not performed when the DCSR_STOPINTR bit is set.
--
Thorsten

Index: hw/pxa2xx_dma.c
===================================================================
RCS file: /sources/qemu/qemu/hw/pxa2xx_dma.c,v
retrieving revision 1.5
diff -u -r1.5 pxa2xx_dma.c

pxa2xx_dma.c 15 Nov 2007 09:28:22 -0000 line 193

Quoted 9 lines
pxa2xx_dma.c 15 Nov 2007 09:28:22 -0000 renamed from pxa2xx_dma.c 11 Nov 2007 19:47:58 -0000 1.5 +2 -1
@@ -186,7 +186,8 @@
         s->running = 1;
         for (c = 0; c < s->channels; c ++) {
             ch = &s->chan[c];
-
+
+            ch->state &= ~DCSR_STOPINTR;
             while ((ch->state & DCSR_RUN) && !(ch->state & DCSR_STOPINTR)) {
                 /* Test for pending requests */
                 if ((ch->cmd & (DCMD_FLOWSRC | DCMD_FLOWTRG)) && !ch->request)

Can you check if the following change would make the gumstix NIC work too? In my understanding of the specs it's more correct, but I'm not sure.

hw/pxa2xx_dma.c +1 -2
index 4c60ffd..7067a78 100644
@@ -342,7 +343,7 @@ static void pxa2xx_dma_write(void *opaque,
                          DCSR_STARTINTR | DCSR_BUSERRINTR));
         s->chan[channel].state |= value & 0xfc800000;
 
-        if (s->chan[channel].state & DCSR_STOPIRQEN)
+        if (s->chan[channel].state & (DCSR_STOPIRQEN | DCSR_RUN))
             s->chan[channel].state &= ~DCSR_STOPINTR;
 
         if (value & DCSR_NODESCFETCH) {

@@ -352,7 +353,6 @@ static void pxa2xx_dma_write(void *opaque,
         } else {
             /* Descriptor-fetch mode */
             if (value & DCSR_RUN) {
-                s->chan[channel].state &= ~DCSR_STOPINTR;
                 pxa2xx_dma_descriptor_fetch(s, channel);
                 pxa2xx_dma_run(s);
             }

Regards

hw/pxa2xx_dma.c +1 -2
index 4c60ffd..7067a78 100644
@@ -342,7 +343,7 @@ static void pxa2xx_dma_write(void *opaque,
                          DCSR_STARTINTR | DCSR_BUSERRINTR));
         s->chan[channel].state |= value & 0xfc800000;
 
-        if (s->chan[channel].state & DCSR_STOPIRQEN)
+        if (s->chan[channel].state & (DCSR_STOPIRQEN | DCSR_RUN))
             s->chan[channel].state &= ~DCSR_STOPINTR;
 
         if (value & DCSR_NODESCFETCH) {

@@ -352,7 +353,6 @@ static void pxa2xx_dma_write(void *opaque,
         } else {
             /* Descriptor-fetch mode */
             if (value & DCSR_RUN) {
-                s->chan[channel].state &= ~DCSR_STOPINTR;
                 pxa2xx_dma_descriptor_fetch(s, channel);
                 pxa2xx_dma_run(s);
             }
#2 lore raw
Quoted 23 lines · andrzej zaborowski

Hi,

Quoted 20 lines · Thorsten Zitterell

The following patch fixes the problem that DMA transfers are not performed when the DCSR_STOPINTR bit is set.
--
Thorsten

Index: hw/pxa2xx_dma.c
===================================================================
RCS file: /sources/qemu/qemu/hw/pxa2xx_dma.c,v
retrieving revision 1.5
diff -u -r1.5 pxa2xx_dma.c

pxa2xx_dma.c 15 Nov 2007 09:28:22 -0000 renamed from pxa2xx_dma.c 11 Nov 2007 19:47:58 -0000 1.5 +2 -1
@@ -186,7 +186,8 @@
         s->running = 1;
         for (c = 0; c < s->channels; c ++) {
             ch = &s->chan[c];
-
+
+            ch->state &= ~DCSR_STOPINTR;
             while ((ch->state & DCSR_RUN) && !(ch->state & DCSR_STOPINTR)) {
Quoted 8 lines

pxa2xx_dma.c 15 Nov 2007 09:28:22 -0000 line 193

Quoted 4 lines
pxa2xx_dma.c 15 Nov 2007 09:28:22 -0000 renamed from pxa2xx_dma.c 11 Nov 2007 19:47:58 -0000 1.5 +0 -0
                 /* Test for pending requests */
                 if ((ch->cmd & (DCMD_FLOWSRC | DCMD_FLOWTRG)) && !ch->request)

Can you check if the following change would make the gumstix NIC work too? In my understanding of the specs it's more correct, but I'm not sure.

Sorry, rather this is what I meant:

hw/pxa2xx_dma.c +3 -1
@@ -347,8 +348,10 @@ static void pxa2xx_dma_write(void *opaque,
 
         if (value & DCSR_NODESCFETCH) {
             /* No-descriptor-fetch mode */
-            if (value & DCSR_RUN)
+            if (value & DCSR_RUN) {
+                s->chan[channel].state &= ~DCSR_STOPINTR;
                 pxa2xx_dma_run(s);
+            }
         } else {
             /* Descriptor-fetch mode */
             if (value & DCSR_RUN) {
hw/pxa2xx_dma.c +3 -1
index 4c60ffd..048cb93 100644
@@ -347,8 +348,10 @@ static void pxa2xx_dma_write(void *opaque,
 
         if (value & DCSR_NODESCFETCH) {
             /* No-descriptor-fetch mode */
-            if (value & DCSR_RUN)
+            if (value & DCSR_RUN) {
+                s->chan[channel].state &= ~DCSR_STOPINTR;
                 pxa2xx_dma_run(s);
+            }
         } else {
             /* Descriptor-fetch mode */
             if (value & DCSR_RUN) {
author
#3 lore raw
Quoted 3 lines
Quoted 3 lines

Can you check if the following change would make the gumstix NIC work too? In my understanding of the specs it's more correct, but I'm not sure.

It works!