How to map nand chip ?
I'm working on a custom board that has both nor and nand flash. I mapped the nor flash (cfi) using do_map_probe("cfi_probe", &map). However, I'm not sure what argument to pass to do_map_probe() to map the nand flash.
Does anyone know how nand flash is mapped or point me to the right documents ?
Thanks,
Carlos
Quoted 4 lines · Carlos Munoz
I'm working on a custom board that has both nor and nand flash. I mapped the nor flash (cfi) using
do_map_probe("cfi_probe", &map). However, I'm not sure what argument to pass todo_map_probe()to map the nand flash.Does anyone know how nand flash is mapped or point me to the right documents ?
OK. I figured it out... had to write a board nand driver.
When I load the nand driver module, the nand chip is detected correctly but it seems all the erase blocks are bad. I wonder if it's caused by the wrong timings when accessing the nand chip. However, the manufacturer and chip id are read correctly. Does anyone know what may be the cause for these errors ?
The output is as follows:
modprobe migo_r
NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit) Scanning device for bad blocks
Bad eraseblock 1 at 0x00020000
Bad eraseblock 2 at 0x00040000
Bad eraseblock 3 at 0x00060000
Bad eraseblock 4 at 0x00080000
Bad eraseblock 5 at 0x000a0000
Bad eraseblock 6 at 0x000c0000
Bad eraseblock 7 at 0x000e0000
Bad eraseblock 8 at 0x00100000
Bad eraseblock 9 at 0x00120000
Bad eraseblock 10 at 0x00140000
....
Thanks,
Carlos
Quoted 5 lines · Carlos Munoz
When I load the nand driver module, the nand chip is detected correctly but it seems all the erase blocks are bad. I wonder if it's caused by the wrong timings when accessing the nand chip. However, the manufacturer and chip id are read correctly. Does anyone know what may be the cause for these errors ?
The timing requirements when reading chip id's are not as severe as when actually accessing the memory, so if you are just below the limit, you can get the id ok but other things fail.
Another thing that can cause this is if the ready/busy-pin is not read properly by the chip driver. Again, the chip will probably respond quickly to an id request, but when reading or writing the memory array, the access times will be longer causing failure.
/Ricard
--
Ricard Wolf Wanderlöf ricardw(at)axis.com
Axis Communications AB, Lund, Sweden www.axis.com
Phone +46 46 272 2016 Fax +46 46 13 61 30
Quoted 10 lines · Ricard Wanderlof
Quoted 6 lines · Carlos Munoz
When I load the nand driver module, the nand chip is detected correctly but it seems all the erase blocks are bad. I wonder if it's caused by the wrong timings when accessing the nand chip. However, the manufacturer and chip id are read correctly. Does anyone know what may be the cause for these errors ?
Quoted 3 lines
The timing requirements when reading chip id's are not as severe as when actually accessing the memory, so if you are just below the limit, you can get the id ok but other things fail.
Side note: I have seen very old chips (from 1999, don't remember whether they were NAD though) where reading chip IDs needed longer timing than reading memory, but that is not the case here.
Regards,
Carl-Daniel
Quoted 3 lines · Ricard Wanderlof
Another thing that can cause this is if the ready/busy-pin is not read properly by the chip driver. Again, the chip will probably respond quickly to an id request, but when reading or writing the memory array, the access times will be longer causing failure.
That was the problem. The ready/busy pin was not working. Somehow, it's always high.
For now I added a 20 usec delay and everything works.
Thanks,
Carlos