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Set proper ATA UDMA mode for bf548 according to system clock.

PATCH In review sonic zhang 3 participants 4 messages Nov 27, 2007 – Dec 1, 2007 libata

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sonic zhang

author
#0 lore raw

PATCH 1/1 Set proper ATA UDMA mode for bf548 according to system clock.

UDMA Mode - Frequency compatibility

UDMA5 - 100 MB/s   - SCLK  = 133 MHz
UDMA4 - 66 MB/s    - SCLK >=  80 MHz
UDMA3 - 44.4 MB/s  - SCLK >=  50 MHz
UDMA2 - 33 MB/s    - SCLK >=  40 MHz
Signed-off-by Sonic Zhang <[email protected]>
---
 drivers/ata/pata_bf54x.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)
drivers/ata/pata_bf54x.c +7 -0
index 81db405..088a41f 100644
@@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(st
 	int board_idx = 0;
 	struct resource *res;
 	struct ata_host *host;
+	unsigned int fsclk = get_sclk();
+	int udma_mode = 5;
 	const struct ata_port_info *ppi[] =
 		{ &bfin_port_info[board_idx], NULL };
 

@@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(st
 	if (res == NULL)
 		return -EINVAL;
 
+	while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) {
+		udma_mode--;
+		bfin_port_info[board_idx].udma_mask >>= 1;
+	}
+
 	/*
 	 * Now that that's out of the way, wire up the port..
 	 */
Signature · 1 line
1.4.3.4
author
#1 lore raw

Any comment?

Thanks

Sonic

Quoted 48 lines · sonic zhang

UDMA Mode - Frequency compatibility

UDMA5 - 100 MB/s   - SCLK  = 133 MHz
UDMA4 - 66 MB/s    - SCLK >=  80 MHz
UDMA3 - 44.4 MB/s  - SCLK >=  50 MHz
UDMA2 - 33 MB/s    - SCLK >=  40 MHz
Signed-off-by Sonic Zhang <[email protected]>
---
 drivers/ata/pata_bf54x.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)
drivers/ata/pata_bf54x.c +7 -1
index 81db405..088a41f 100644
@@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(st
        int board_idx = 0;
        struct resource *res;
        struct ata_host *host;
+       unsigned int fsclk = get_sclk();
+       int udma_mode = 5;
        const struct ata_port_info *ppi[] =
                { &bfin_port_info[board_idx], NULL };
 

@@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(st
        if (res == NULL)
                return -EINVAL;
 
+       while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) {
+               udma_mode--;
+               bfin_port_info[board_idx].udma_mask >>= 1;
+       }
+
        /*
         * Now that that's out of the way, wire up the port..
         */
--

1.4.3.4

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#3 lore raw
In reply to sonic zhang
Quoted 8 lines · sonic zhang

UDMA Mode - Frequency compatibility

UDMA5 - 100 MB/s   - SCLK  = 133 MHz
UDMA4 - 66 MB/s    - SCLK >=  80 MHz
UDMA3 - 44.4 MB/s  - SCLK >=  50 MHz
UDMA2 - 33 MB/s    - SCLK >=  40 MHz
Quoted 4 lines
Signed-off-by Sonic Zhang <[email protected]>
---
 drivers/ata/pata_bf54x.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

applied #upstream-fixes