Micron NAND support in linux MTD
Hi,
I found on MTD mailing list your patch that adds Micron manufacturer ID:
http://article.gmane.org/gmane.linux.drivers.mtd/17694
I'm going to use NAND Micron devices for a new project however I still have a doubt about how MTD/JFFS2 handle bad blocks. To detect blocks marked as bad it checks the 6th location of OOB area of first page, thus it seems it is not able to handle Micron devices properly. In fact these devices stores bad block marker in the first location of OOB of first or second page (for example see page 50 of MT29F1GxxABB data sheet). Am I misreading the datasheet? Could you help me to clear this point?
Thanks in advance,
llandre
DAVE Electronics System House - R&D Department
web: http://www.dave-tech.it email: r&[email protected]
Hi,
The location of the "bad block indicator" within the spare area
depends on the
manufacturer. It could vary from chip to chip.
it could also depend on the page size as well.
Usually, for a large page size nand, It could be located at the
first byte of the OOB.
For a small it could be at 6th byte.
The way you send some commands to the large page size nand device is
somewhat different
from the small page size nand device. I think you may not be using
the driver for a large page nand device.
Most of the stuff (driver) for the large page nand devices is
generic. The way you wait for nand busy changes.
Check the way your reading the flash information from the chip id
and additional infomation.
The way youre mtd_info structure is getting initialised. You could
be missing something here.
Hope this helps.
Regards,
sriram
Quoted 25 lines · llandre
Hi,
I found on MTD mailing list your patch that adds Micron manufacturer ID:
http://article.gmane.org/gmane.linux.drivers.mtd/17694I'm going to use NAND Micron devices for a new project however I still have a doubt about how MTD/JFFS2 handle bad blocks. To detect blocks marked as bad it checks the 6th location of OOB area of first page, thus it seems it is not able to handle Micron devices properly. In fact these devices stores bad block marker in the first location of OOB of first or second page (for example see page 50 of MT29F1GxxABB data sheet). Am I misreading the datasheet? Could you help me to clear this point?
Thanks in advance,
llandreDAVE Electronics System House - R&D Department
web: http://www.dave-tech.it email: r&[email protected]______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
Sriram,
IIUC the bad block position is set in function nand_get_flash_type:
/* Set the bad block position */ chip->badblockpos = mtd->writesize > 512 ? NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
/*
* Constants for oob configuration
*/
#define NAND_SMALL_BADBLOCK_POS 5
#define NAND_LARGE_BADBLOCK_POS 0
That is two values are defined:
a) 5 for small block devices (6th location)
b) 0 for large block devices (1st location)
So the position is correct with respect to the Micron MT29F1GxxABB datasheet.
However I still have a doubt about which page is checked. I'n not sure if JFFS2/MTD check first page only. Datasheet says:
"The factory identifies
invalid blocks before shipping by programming data other than FFh (x8) or FFFFh (x16) into the first spare location (column address 2,048 for x8 devices, or 1,024 for x16 devices) *of the first or second page of each bad block*."
so both first and second page should be checked. Do you know what JFFS2/MTD do?
Signature · 1 line
llandre
Quoted 60 lines
Hi,
The location of the "bad block indicator" within the spare area
depends on the
manufacturer. It could vary from chip to chip.it could also depend on the page size as well.
Usually, for a large page size nand, It could be located at the
first byte of the OOB.
For a small it could be at 6th byte.The way you send some commands to the large page size nand device is
somewhat different
from the small page size nand device. I think you may not be using
the driver for a large page nand device.Most of the stuff (driver) for the large page nand devices is
generic. The way you wait for nand busy changes.Check the way your reading the flash information from the chip id
and additional infomation.
The way youremtd_infostructure is getting initialised. You could
be missing something here.Hope this helps.
Regards,
sriramQuoted 25 lines · llandre
Hi,
I found on MTD mailing list your patch that adds Micron manufacturer ID:
http://article.gmane.org/gmane.linux.drivers.mtd/17694I'm going to use NAND Micron devices for a new project however I still have a doubt about how MTD/JFFS2 handle bad blocks. To detect blocks marked as bad it checks the 6th location of OOB area of first page, thus it seems it is not able to handle Micron devices properly. In fact these devices stores bad block marker in the first location of OOB of first or second page (for example see page 50 of MT29F1GxxABB data sheet). Am I misreading the datasheet? Could you help me to clear this point?
Thanks in advance,
llandreDAVE Electronics System House - R&D Department
web: http://www.dave-tech.it email: r&[email protected]______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
Quoted 3 lines · llandre
if JFFS2/MTD check first page only. Datasheet says:
"The factory identifies invalid blocks before shipping by programming data other than FFh (x8) or FFFFh (x16) into the first spare location (column address 2,048 for x8 devices, or 1,024 for x16 devices) *of the first or second page of each bad block*."
The option of programming the second page is probably a last resort in case the first page is so bad that it cannot be programmed at all, which I would think is most unlikely.
/Ricard
Quoted 5 lines
Quoted 3 lines
if JFFS2/MTD check first page only. Datasheet says:
"The factory identifies invalid blocks before shipping by programming data other than FFh (x8) or FFFFh (x16) into the first spare location (column address 2,048 for x8 devices, or 1,024 for x16 devices) *of the first or second page of each bad block*."
The option of programming the second page is probably a last resort in case the first page is so bad that it cannot be programmed at all, which I would think is most unlikely.
I think your point is reasonable. I'd like to hear someone from Samsung or Micron to confirm your speculation ...
Signature · 5 lines
llandre DAVE Electronics System House - R&D Department web: http://www.dave.eu email: r&[email protected]
Quoted 3 lines · llandre
Quoted 1 line
The option of programming the second page is probably a last resort in case the first page is so bad that it cannot be programmed at all, which I would think is most unlikely.
I think your point is reasonable. I'd like to hear someone from Samsung or Micron to confirm your speculation ...
Me too but I think they'd just refer you to the data sheet. I haven't been able to get any form of statistics from chip manufacturers like the number of bad blocks when the chip is new, or other things that aren't stated in the data sheets.
/Ricard