smpboot integration

index 2dd95ba..bea2d32 100644
@@ -368,10 +368,10 @@ static void unmap_cpu_to_logical_apicid(int cpu)
 
 static inline void __inquire_remote_apic(int apicid)
 {
-	int i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
+	unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
 	char *names[] = { "ID", "VERSION", "SPIV" };
 	int timeout;
-	unsigned long status;
+	u32 status;
 
 	printk("Inquiring remote APIC #%d...\n", apicid);
 

index bea2d32..8676eec 100644
@@ -373,17 +373,18 @@ static inline void __inquire_remote_apic(int apicid)
 	int timeout;
 	u32 status;
 
-	printk("Inquiring remote APIC #%d...\n", apicid);
+	printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
 
 	for (i = 0; i < ARRAY_SIZE(regs); i++) {
-		printk("... APIC #%d %s: ", apicid, names[i]);
+		printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
 
 		/*
 		 * Wait for idle.
 		 */
 		status = safe_apic_wait_icr_idle();
 		if (status)
-			printk("a previous APIC delivery may have failed\n");
+			printk(KERN_CONT
+			       "a previous APIC delivery may have failed\n");
 
 		apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
 		apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);

@@ -397,10 +398,10 @@ static inline void __inquire_remote_apic(int apicid)
 		switch (status) {
 		case APIC_ICR_RR_VALID:
 			status = apic_read(APIC_RRR);
-			printk("%lx\n", status);
+			printk(KERN_CONT "%08x\n", status);
 			break;
 		default:
-			printk("failed\n");
+			printk(KERN_CONT "failed\n");
 		}
 	}
 }

index 4f6d976..57ebe6c 100644
@@ -281,8 +281,8 @@ static void inquire_remote_apic(int apicid)
 			printk(KERN_CONT
 			       "a previous APIC delivery may have failed\n");
 
-		apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
-		apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);
+		apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
+		apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
 
 		timeout = 0;
 		do {

@@ -315,12 +315,12 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 	/*
 	 * Turn INIT on target chip
 	 */
-	apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
+	apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
 
 	/*
 	 * Send IPI
 	 */
-	apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
+	apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
 				| APIC_DM_INIT);
 
 	Dprintk("Waiting for send to finish...\n");

@@ -331,10 +331,10 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 	Dprintk("Deasserting INIT.\n");
 
 	/* Target chip */
-	apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
+	apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
 
 	/* Send IPI */
-	apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
+	apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
 
 	Dprintk("Waiting for send to finish...\n");
 	send_status = safe_apic_wait_icr_idle();

@@ -353,6 +353,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 
 	for (j = 1; j <= num_starts; j++) {
 		Dprintk("Sending STARTUP #%d.\n",j);
+		apic_read_around(APIC_SPIV);
 		apic_write(APIC_ESR, 0);
 		apic_read(APIC_ESR);
 		Dprintk("After apic_write.\n");

@@ -362,11 +363,11 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 		 */
 
 		/* Target chip */
-		apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
+		apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
 
 		/* Boot on the stack */
 		/* Kick the second */
-		apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));
+		apic_write_around(APIC_ICR, APIC_DM_STARTUP | (start_rip>>12));
 
 		/*
 		 * Give the other CPU some time to accept the IPI.

@@ -386,6 +387,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 		 * Due to the Pentium erratum 3AP.
 		 */
 		if (maxlvt > 3) {
+			apic_read_around(APIC_SPIV);
 			apic_write(APIC_ESR, 0);
 		}
 		accept_status = (apic_read(APIC_ESR) & 0xEF);

index 57ebe6c..13ab112 100644
@@ -345,6 +345,14 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 	num_starts = 2;
 
 	/*
+	 * Paravirt / VMI wants a startup IPI hook here to set up the
+	 * target processor state.
+	 */
+	startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
+			(unsigned long) init_rsp);
+
+
+	/*
 	 * Run STARTUP IPI loop.
 	 */
 	Dprintk("#startup loops: %d.\n", num_starts);

index 513c857..4dc271b 100644
@@ -33,6 +33,9 @@ struct smp_ops {
 extern void set_cpu_sibling_map(int cpu);
 
 #ifdef CONFIG_SMP
+#ifndef CONFIG_PARAVIRT
+#define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
+#endif
 extern struct smp_ops smp_ops;
 
 static inline void smp_send_stop(void)

index 4fec2fe..76740de 100644
@@ -30,10 +30,6 @@ DECLARE_PER_CPU(u16, cpu_llc_id);
 DECLARE_PER_CPU(u16, x86_cpu_to_apicid);
 
 #ifdef CONFIG_SMP
-#ifndef CONFIG_PARAVIRT
-#define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
-#endif
-
 /*
  * This function is needed by all SMP systems. It must _always_ be valid
  * from the initial startup. We map APIC_BASE very early in page_setup(),

index 8676eec..e050064 100644
@@ -78,19 +78,8 @@ static void map_cpu_to_logical_apicid(void);
 /* State of each CPU. */
 DEFINE_PER_CPU(int, cpu_state) = { 0 };
 
-/*
- * The bootstrap kernel entry code has set these up. Save them for
- * a given CPU
- */
-
-void __cpuinit smp_store_cpu_info(int id)
+static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
 {
-	struct cpuinfo_x86 *c = &cpu_data(id);
-
-	*c = boot_cpu_data;
-	c->cpu_index = id;
-	if (id!=0)
-		identify_secondary_cpu(c);
 	/*
 	 * Mask B, Pentium, but not Pentium MMX
 	 */

@@ -138,6 +127,23 @@ void __cpuinit smp_store_cpu_info(int id)
 
 valid_k7:
 	;
+
+}
+
+/*
+ * The bootstrap kernel entry code has set these up. Save them for
+ * a given CPU
+ */
+
+void __cpuinit smp_store_cpu_info(int id)
+{
+	struct cpuinfo_x86 *c = &cpu_data(id);
+
+	*c = boot_cpu_data;
+	c->cpu_index = id;
+	if (id != 0)
+		identify_secondary_cpu(c);
+	smp_apply_quirks(c);
 }
 
 static atomic_t init_deasserted;

index 13ab112..1da28c6 100644
@@ -97,7 +97,6 @@ static void __cpuinit smp_store_cpu_info(int id)
 	*c = boot_cpu_data;
 	c->cpu_index = id;
 	identify_cpu(c);
-	print_cpu_info(c);
 }
 
 static inline void wait_for_init_deassert(atomic_t *deassert)

@@ -568,6 +567,8 @@ do_rest:
 		if (cpu_isset(cpu, cpu_callin_map)) {
 			/* number CPUs logically, starting from 1 (BSP is 0) */
 			Dprintk("CPU has booted.\n");
+			printk(KERN_INFO "CPU%d: ", cpu);
+			print_cpu_info(&cpu_data(cpu));
 		} else {
 			boot_error = 1;
 			if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))

@@ -751,6 +752,8 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 	 */
 
 	setup_boot_clock();
+	printk(KERN_INFO "CPU%d: ", 0);
+	print_cpu_info(&cpu_data(0));
 }
 
 /*

index 089ce10..352aa23 100644
@@ -1051,14 +1051,24 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
 #endif
 	select_idle_routine(c);
 
-	if (c != &boot_cpu_data)
-		mtrr_ap_init();
 #ifdef CONFIG_NUMA
 	numa_add_cpu(smp_processor_id());
 #endif
 
 }
 
+void __cpuinit identify_boot_cpu(void)
+{
+	identify_cpu(&boot_cpu_data);
+}
+
+void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
+{
+	BUG_ON(c == &boot_cpu_data);
+	identify_cpu(c);
+	mtrr_ap_init();
+}
+
 static __init int setup_noclflush(char *arg)
 {
 	setup_clear_cpu_cap(X86_FEATURE_CLFLSH);

index 8f520f9..60207e9 100644
@@ -12,7 +12,7 @@
 
 void __init check_bugs(void)
 {
-	identify_cpu(&boot_cpu_data);
+	identify_boot_cpu();
 #if !defined(CONFIG_SMP)
 	printk("CPU: ");
 	print_cpu_info(&boot_cpu_data);

index 1da28c6..f84e30d 100644
@@ -96,7 +96,8 @@ static void __cpuinit smp_store_cpu_info(int id)
 
 	*c = boot_cpu_data;
 	c->cpu_index = id;
-	identify_cpu(c);
+	if (id != 0)
+		identify_secondary_cpu(c);
 }
 
 static inline void wait_for_init_deassert(atomic_t *deassert)

index b13b9d5..a157a52 100644
@@ -45,6 +45,83 @@ unsigned char *trampoline_base = __va(SMP_TRAMPOLINE_BASE);
 /* representing cpus for which sibling maps can be computed */
 static cpumask_t cpu_sibling_setup_map;
 
+#ifdef CONFIG_X86_32
+/* Set if we find a B stepping CPU */
+int __cpuinitdata smp_b_stepping;
+#endif
+
+static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
+{
+#ifdef CONFIG_X86_32
+	/*
+	 * Mask B, Pentium, but not Pentium MMX
+	 */
+	if (c->x86_vendor == X86_VENDOR_INTEL &&
+	    c->x86 == 5 &&
+	    c->x86_mask >= 1 && c->x86_mask <= 4 &&
+	    c->x86_model <= 3)
+		/*
+		 * Remember we have B step Pentia with bugs
+		 */
+		smp_b_stepping = 1;
+
+	/*
+	 * Certain Athlons might work (for various values of 'work') in SMP
+	 * but they are not certified as MP capable.
+	 */
+	if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
+
+		if (num_possible_cpus() == 1)
+			goto valid_k7;
+
+		/* Athlon 660/661 is valid. */
+		if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
+		    (c->x86_mask == 1)))
+			goto valid_k7;
+
+		/* Duron 670 is valid */
+		if ((c->x86_model == 7) && (c->x86_mask == 0))
+			goto valid_k7;
+
+		/*
+		 * Athlon 662, Duron 671, and Athlon >model 7 have capability
+		 * bit. It's worth noting that the A5 stepping (662) of some
+		 * Athlon XP's have the MP bit set.
+		 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
+		 * more.
+		 */
+		if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
+		    ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
+		     (c->x86_model > 7))
+			if (cpu_has_mp)
+				goto valid_k7;
+
+		/* If we get here, not a certified SMP capable AMD system. */
+		add_taint(TAINT_UNSAFE_SMP);
+	}
+
+valid_k7:
+	;
+#endif
+}
+
+/*
+ * The bootstrap kernel entry code has set these up. Save them for
+ * a given CPU
+ */
+
+void __cpuinit smp_store_cpu_info(int id)
+{
+	struct cpuinfo_x86 *c = &cpu_data(id);
+
+	*c = boot_cpu_data;
+	c->cpu_index = id;
+	if (id != 0)
+		identify_secondary_cpu(c);
+	smp_apply_quirks(c);
+}
+
+
 void __cpuinit set_cpu_sibling_map(int cpu)
 {
 	int i;

83 lines not on this page · raw message

index f84e30d..c213345 100644
@@ -85,21 +85,6 @@ struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
 #define set_idle_for_cpu(x,p)   (idle_thread_array[(x)] = (p))
 #endif
 
-/*
- * The bootstrap kernel entry code has set these up. Save them for
- * a given CPU
- */
-
-static void __cpuinit smp_store_cpu_info(int id)
-{
-	struct cpuinfo_x86 *c = &cpu_data(id);
-
-	*c = boot_cpu_data;
-	c->cpu_index = id;
-	if (id != 0)
-		identify_secondary_cpu(c);
-}
-
 static inline void wait_for_init_deassert(atomic_t *deassert)
 {
 	while (!atomic_read(deassert))

index 4dc271b..b4c5143 100644
@@ -88,6 +88,8 @@ extern void prefill_possible_map(void);
 
 #define SMP_TRAMPOLINE_BASE 0x6000
 extern unsigned long setup_trampoline(void);
+
+void smp_store_cpu_info(int id);
 #endif
 
 #ifdef CONFIG_X86_32

index 76740de..51624ab 100644
@@ -42,8 +42,6 @@ DECLARE_PER_CPU(int, cpu_number);
 
 extern int safe_smp_processor_id(void);
 
-void __cpuinit smp_store_cpu_info(int id);
-
 /* We don't mark CPUs online until __cpu_up(), so we need another measure */
 static inline int num_booting_cpus(void)
 {

index ec05fb7..08c41ed 100644
@@ -127,6 +127,7 @@ void default_idle(void)
 		local_irq_enable();
 		current_thread_info()->status |= TS_POLLING;
 	} else {
+		local_irq_enable();
 		/* loop is done by the caller */
 		cpu_relax();
 	}

@@ -142,6 +143,7 @@ EXPORT_SYMBOL(default_idle);
  */
 static void poll_idle(void)
 {
+	local_irq_enable();
 	cpu_relax();
 }
 

@@ -248,8 +250,11 @@ void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 		__monitor((void *)&current_thread_info()->flags, 0, 0);
 		smp_mb();
 		if (!need_resched())
-			__mwait(ax, cx);
-	}
+			__sti_mwait(ax, cx);
+		else
+			local_irq_enable();
+	} else
+		local_irq_enable();
 }
 
 /* Default MONITOR/MWAIT with no hints, used for default C1 state */

index 0bfb31e..6c16165 100644
@@ -214,9 +214,6 @@ static void __cpuinit start_secondary(void *unused)
 	unlock_ipi_call_lock();
 	per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
 
-	/* We can take interrupts now: we're officially "up". */
-	local_irq_enable();
-
 	wmb();
 	cpu_idle();
 }

index 6c16165..4e5416e 100644
@@ -185,7 +185,6 @@ static void __cpuinit start_secondary(void *unused)
 	 */
 	check_tsc_sync_target();
 
-	setup_secondary_clock();
 	if (nmi_watchdog == NMI_IO_APIC) {
 		disable_8259A_irq(0);
 		enable_NMI_through_LVT0();

@@ -214,6 +213,8 @@ static void __cpuinit start_secondary(void *unused)
 	unlock_ipi_call_lock();
 	per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
 
+	setup_secondary_clock();
+
 	wmb();
 	cpu_idle();
 }

index c213345..cfcfd2c 100644
@@ -233,10 +233,10 @@ void __cpuinit start_secondary(void)
 	 */
 	spin_unlock(&vector_lock);
 	cpu_set(smp_processor_id(), cpu_online_map);
-	per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
-
 	unlock_ipi_call_lock();
 
+	per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
+
 	setup_secondary_clock();
 
 	cpu_idle();

index 550af7a..b0c6b28 100644
@@ -22,7 +22,11 @@
 #define		APIC_LVR_MASK		0xFF00FF
 #define		GET_APIC_VERSION(x)	((x)&0xFFu)
 #define		GET_APIC_MAXLVT(x)	(((x)>>16)&0xFFu)
-#define		APIC_INTEGRATED(x)	((x)&0xF0u)
+#ifdef CONFIG_X86_32
+#  define	APIC_INTEGRATED(x)	((x)&0xF0u)
+#else
+#  define	APIC_INTEGRATED(x)	(1)
+#endif
 #define		APIC_XAPIC(x)		((x) >= 0x14)
 #define	APIC_TASKPRI	0x80
 #define		APIC_TPRI_MASK		0xFFu

index cfcfd2c..d7b59d6 100644
@@ -295,6 +295,15 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 	unsigned long send_status, accept_status = 0;
 	int maxlvt, num_starts, j;
 
+	/*
+	 * Be paranoid about clearing APIC errors.
+	 */
+	if (APIC_INTEGRATED(apic_version[phys_apicid])) {
+		apic_read_around(APIC_SPIV);
+		apic_write(APIC_ESR, 0);
+		apic_read(APIC_ESR);
+	}
+
 	Dprintk("Asserting INIT.\n");
 
 	/*

@@ -327,7 +336,10 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
 	mb();
 	atomic_set(&init_deasserted, 1);
 
-	num_starts = 2;
+	if (APIC_INTEGRATED(apic_version[phys_apicid]))
+		num_starts = 2;
+	else
+		num_starts = 0;
 
 	/*
 	 * Paravirt / VMI wants a startup IPI hook here to set up the

index 4e5416e..a232f4d 100644
@@ -180,6 +180,9 @@ static void __cpuinit start_secondary(void *unused)
 	smp_callin();
 	while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
 		cpu_relax();
+
+	/* otherwise gcc will move up smp_processor_id before the cpu_init */
+	barrier();
 	/*
 	 * Check TSC synchronization with the BP:
 	 */

@@ -432,6 +435,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
 	Dprintk("Waiting for send to finish...\n");
 	send_status = safe_apic_wait_icr_idle();
 
+	mb();
 	atomic_set(&init_deasserted, 1);
 
 	/*

index d7b59d6..a9cc911 100644
@@ -239,6 +239,7 @@ void __cpuinit start_secondary(void)
 
 	setup_secondary_clock();
 
+	wmb();
 	cpu_idle();
 }
 

index a232f4d..b44a743 100644
@@ -735,10 +735,6 @@ exit:
 }
 #endif
 
-/*
- * Cycle through the processors sending APIC IPIs to boot each.
- */
-
 static int boot_cpu_logical_apicid;
 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 void *xquad_portio;

@@ -746,26 +742,8 @@ void *xquad_portio;
 EXPORT_SYMBOL(xquad_portio);
 #endif
 
-static void __init smp_boot_cpus(unsigned int max_cpus)
+static int __init smp_sanity_check(unsigned max_cpus)
 {
-	int apicid, cpu, bit, kicked;
-	unsigned long bogosum = 0;
-
-	/*
-	 * Setup boot CPU information
-	 */
-	smp_store_cpu_info(0); /* Final full version of the data */
-	printk("CPU%d: ", 0);
-	print_cpu_info(&cpu_data(0));
-
-	boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
-	boot_cpu_logical_apicid = logical_smp_processor_id();
-	per_cpu(x86_cpu_to_apicid, 0) = boot_cpu_physical_apicid;
-
-	current_thread_info()->cpu = 0;
-
-	set_cpu_sibling_map(0);
-
 	/*
 	 * If we couldn't find an SMP configuration at boot time,
 	 * get out of here now!

@@ -780,7 +758,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 		map_cpu_to_logical_apicid();
 		cpu_set(0, per_cpu(cpu_sibling_map, 0));
 		cpu_set(0, per_cpu(cpu_core_map, 0));
-		return;
+		return -1;
 	}
 
 	/*

@@ -806,7 +784,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 		map_cpu_to_logical_apicid();
 		cpu_set(0, per_cpu(cpu_sibling_map, 0));
 		cpu_set(0, per_cpu(cpu_core_map, 0));
-		return;
+		return -1;
 	}
 
 	verify_local_APIC();

@@ -828,9 +806,36 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 		map_cpu_to_logical_apicid();
 		cpu_set(0, per_cpu(cpu_sibling_map, 0));
 		cpu_set(0, per_cpu(cpu_core_map, 0));
-		return;
+		return -1;
 	}
+	return 0;
+}
+
+
+/*
+ * Cycle through the processors sending APIC IPIs to boot each.
+ */
+static void __init smp_boot_cpus(unsigned int max_cpus)
+{
+	int apicid, cpu, bit, kicked;
+	unsigned long bogosum = 0;
+
+	/*
+	 * Setup boot CPU information
+	 */
+	smp_store_cpu_info(0); /* Final full version of the data */
+	printk(KERN_INFO "CPU%d: ", 0);
+	print_cpu_info(&cpu_data(0));
+
+	boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
+	boot_cpu_logical_apicid = logical_smp_processor_id();
+	per_cpu(x86_cpu_to_apicid, 0) = boot_cpu_physical_apicid;
+
+	current_thread_info()->cpu = 0;
+
+	set_cpu_sibling_map(0);
 
+	smp_sanity_check(max_cpus);
 	connect_bsp_APIC();
 	setup_local_APIC();
 	map_cpu_to_logical_apicid();

index b44a743..8144aa3 100644
@@ -742,6 +742,15 @@ void *xquad_portio;
 EXPORT_SYMBOL(xquad_portio);
 #endif
 
+static void __init disable_smp(void)
+{
+	smpboot_clear_io_apic_irqs();
+	phys_cpu_present_map = physid_mask_of_physid(0);
+	map_cpu_to_logical_apicid();
+	cpu_set(0, per_cpu(cpu_sibling_map, 0));
+	cpu_set(0, per_cpu(cpu_core_map, 0));
+}
+
 static int __init smp_sanity_check(unsigned max_cpus)
 {
 	/*

@@ -750,14 +759,10 @@ static int __init smp_sanity_check(unsigned max_cpus)
 	 */
 	if (!smp_found_config && !acpi_lapic) {
 		printk(KERN_NOTICE "SMP motherboard not detected.\n");
-		smpboot_clear_io_apic_irqs();
-		phys_cpu_present_map = physid_mask_of_physid(0);
+		disable_smp();
 		if (APIC_init_uniprocessor())
 			printk(KERN_NOTICE "Local APIC not detected."
 					   " Using dummy APIC emulation.\n");
-		map_cpu_to_logical_apicid();
-		cpu_set(0, per_cpu(cpu_sibling_map, 0));
-		cpu_set(0, per_cpu(cpu_core_map, 0));
 		return -1;
 	}
 

@@ -779,11 +784,6 @@ static int __init smp_sanity_check(unsigned max_cpus)
 		printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
 			boot_cpu_physical_apicid);
 		printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
-		smpboot_clear_io_apic_irqs();
-		phys_cpu_present_map = physid_mask_of_physid(0);
-		map_cpu_to_logical_apicid();
-		cpu_set(0, per_cpu(cpu_sibling_map, 0));
-		cpu_set(0, per_cpu(cpu_core_map, 0));
 		return -1;
 	}
 

@@ -801,11 +801,6 @@ static int __init smp_sanity_check(unsigned max_cpus)
 			connect_bsp_APIC();
 			setup_local_APIC();
 		}
-		smpboot_clear_io_apic_irqs();
-		phys_cpu_present_map = physid_mask_of_physid(0);
-		map_cpu_to_logical_apicid();
-		cpu_set(0, per_cpu(cpu_sibling_map, 0));
-		cpu_set(0, per_cpu(cpu_core_map, 0));
 		return -1;
 	}
 	return 0;

@@ -835,7 +830,12 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 
 	set_cpu_sibling_map(0);
 
-	smp_sanity_check(max_cpus);
+	if (smp_sanity_check(max_cpus) < 0) {
+		printk(KERN_INFO "SMP disabled\n");
+		disable_smp();
+		return;
+	}
+
 	connect_bsp_APIC();
 	setup_local_APIC();
 	map_cpu_to_logical_apicid();

index 8144aa3..147af81 100644
@@ -711,10 +711,6 @@ static int __cpuinit __smp_prepare_cpu(int cpu)
 	int	apicid, ret;
 
 	apicid = per_cpu(x86_cpu_to_apicid, cpu);
-	if (apicid == BAD_APICID) {
-		ret = -ENODEV;
-		goto exit;
-	}
 
 	info.complete = &done;
 	info.apicid = apicid;

@@ -952,10 +948,22 @@ void __init native_smp_prepare_boot_cpu(void)
 
 int __cpuinit native_cpu_up(unsigned int cpu)
 {
+	int apicid = cpu_present_to_apicid(cpu);
 	unsigned long flags;
-#ifdef CONFIG_HOTPLUG_CPU
 	int ret = 0;
 
+	WARN_ON(irqs_disabled());
+
+	Dprintk("++++++++++++++++++++=_---CPU UP  %u\n", cpu);
+
+	if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
+	    !physid_isset(apicid, phys_cpu_present_map)) {
+		printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
+		return -EINVAL;
+	}
+
+#ifdef CONFIG_HOTPLUG_CPU
+
 	/*
 	 * We do warm boot only on cpus that had booted earlier
 	 * Otherwise cold boot is all handled from smp_boot_cpus().

index 147af81..ee6f3bd 100644
@@ -704,11 +704,11 @@ static void __cpuinit do_warm_boot_cpu(struct work_struct *work)
 	complete(info->complete);
 }
 
-static int __cpuinit __smp_prepare_cpu(int cpu)
+static void __cpuinit __smp_prepare_cpu(int cpu)
 {
 	DECLARE_COMPLETION_ONSTACK(done);
 	struct warm_boot_cpu_info info;
-	int	apicid, ret;
+	int	apicid;
 
 	apicid = per_cpu(x86_cpu_to_apicid, cpu);
 

@@ -725,9 +725,6 @@ static int __cpuinit __smp_prepare_cpu(int cpu)
 	wait_for_completion(&done);
 
 	zap_low_mappings();
-	ret = 0;
-exit:
-	return ret;
 }
 #endif
 

@@ -950,7 +947,6 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 {
 	int apicid = cpu_present_to_apicid(cpu);
 	unsigned long flags;
-	int ret = 0;
 
 	WARN_ON(irqs_disabled());
 

@@ -971,10 +967,7 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 	 * when a cpu is taken offline from cpu_exit_clear().
 	 */
 	if (!cpu_isset(cpu, cpu_callin_map))
-		ret = __smp_prepare_cpu(cpu);
-
-	if (ret)
-		return -EIO;
+		__smp_prepare_cpu(cpu);
 #endif
 
 	/* In case one didn't come up */

index ee6f3bd..0e86ccc 100644
@@ -958,6 +958,7 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 		return -EINVAL;
 	}
 
+	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 #ifdef CONFIG_HOTPLUG_CPU
 
 	/*

@@ -976,7 +977,6 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 		return -EIO;
 	}
 
-	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 	/* Unleash the CPU! */
 	cpu_set(cpu, smp_commenced_mask);
 

index b4c5143..d02e6ea 100644
@@ -3,12 +3,24 @@
 #ifndef __ASSEMBLY__
 #include <linux/cpumask.h>
 #include <linux/init.h>
+#include <asm/percpu.h>
 
 extern cpumask_t cpu_callout_map;
 
 extern int smp_num_siblings;
 extern unsigned int num_processors;
 
+extern u16 x86_cpu_to_apicid_init[];
+extern u16 x86_bios_cpu_apicid_init[];
+extern void *x86_cpu_to_apicid_early_ptr;
+extern void *x86_bios_cpu_apicid_early_ptr;
+
+DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
+DECLARE_PER_CPU(cpumask_t, cpu_core_map);
+DECLARE_PER_CPU(u16, cpu_llc_id);
+DECLARE_PER_CPU(u16, x86_cpu_to_apicid);
+DECLARE_PER_CPU(u16, x86_bios_cpu_apicid);
+
 /*
  * Trampoline 80x86 program as an array.
  */

index 51624ab..478f556 100644
@@ -21,14 +21,6 @@ extern cpumask_t cpu_callin_map;
 extern void (*mtrr_hook) (void);
 extern void zap_low_mappings (void);
 
-extern u16 __initdata x86_cpu_to_apicid_init[];
-extern void *x86_cpu_to_apicid_early_ptr;
-
-DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
-DECLARE_PER_CPU(cpumask_t, cpu_core_map);
-DECLARE_PER_CPU(u16, cpu_llc_id);
-DECLARE_PER_CPU(u16, x86_cpu_to_apicid);
-
 #ifdef CONFIG_SMP
 /*
  * This function is needed by all SMP systems. It must _always_ be valid

index 394c785..1b3c0f1 100644
@@ -19,17 +19,6 @@ extern cpumask_t cpu_callin_map;
 extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
 				  void *info, int wait);
 
-extern u16 __initdata x86_cpu_to_apicid_init[];
-extern u16 __initdata x86_bios_cpu_apicid_init[];
-extern void *x86_cpu_to_apicid_early_ptr;
-extern void *x86_bios_cpu_apicid_early_ptr;
-
-DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
-DECLARE_PER_CPU(cpumask_t, cpu_core_map);
-DECLARE_PER_CPU(u16, cpu_llc_id);
-DECLARE_PER_CPU(u16, x86_cpu_to_apicid);
-DECLARE_PER_CPU(u16, x86_bios_cpu_apicid);
-
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
 	if (cpu_present(mps_cpu))

index 0e86ccc..92a5df6 100644
@@ -70,6 +70,12 @@ void *x86_cpu_to_apicid_early_ptr;
 DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
 
+u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
+				= { [0 ... NR_CPUS-1] = BAD_APICID };
+void *x86_bios_cpu_apicid_early_ptr;
+DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
+EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
+
 u8 apicid_2_node[MAX_APICID];
 
 static void map_cpu_to_logical_apicid(void);

index 6df235e..0d55b1f 100644
@@ -1,10 +1,7 @@
 #ifndef __ASM_MACH_APIC_H
 #define __ASM_MACH_APIC_H
 
-
-extern u8 bios_cpu_apicid[];
-
-#define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu])
+#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
 #define esr_disable (1)
 
 static inline int apic_id_registered(void)

@@ -90,7 +87,7 @@ static inline int apicid_to_node(int logical_apicid)
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
 	if (mps_cpu < NR_CPUS)
-		return (int) bios_cpu_apicid[mps_cpu];
+		return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
 
 	return BAD_APICID;
 }

index d23011f..04cba9f 100644
@@ -1,9 +1,7 @@
 #ifndef __ASM_MACH_APIC_H
 #define __ASM_MACH_APIC_H
 
-extern u8 bios_cpu_apicid[];
-
-#define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu])
+#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
 #define esr_disable (1)
 
 static inline int apic_id_registered(void)

@@ -80,7 +78,7 @@ extern void enable_apic_mode(void);
 extern int apic_version [MAX_APICS];
 static inline void setup_apic_routing(void)
 {
-	int apic = bios_cpu_apicid[smp_processor_id()];
+	int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
 	printk("Enabling APIC mode:  %s.  Using %d I/O APICs, target cpus %lx\n",
 		(apic_version[apic] == 0x14) ? 
 		"Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);

@@ -102,7 +100,7 @@ static inline int cpu_present_to_apicid(int mps_cpu)
 	if (!mps_cpu)
 		return boot_cpu_physical_apicid;
 	else if (mps_cpu < NR_CPUS)
-		return (int) bios_cpu_apicid[mps_cpu];
+		return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
 	else
 		return BAD_APICID;
 }

index 062c97f..91d7641 100644
@@ -40,7 +40,6 @@ static inline unsigned long check_apicid_present(int bit)
 
 #define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
 
-extern u8 bios_cpu_apicid[];
 extern u8 cpu_2_logical_apicid[];
 
 static inline void init_apic_ldr(void)

@@ -110,7 +109,7 @@ static inline int cpu_to_logical_apicid(int cpu)
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
 	if (mps_cpu < NR_CPUS)
-		return (int)bios_cpu_apicid[mps_cpu];
+		return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
 	else
 		return BAD_APICID;
 }

index db9d585..599ce01 100644
@@ -724,6 +724,18 @@ char * __init __attribute__((weak)) memory_setup(void)
 	return machine_specific_memory_setup();
 }
 
+#ifdef CONFIG_NUMA
+/*
+ * In the golden day, when everything among i386 and x86_64 will be
+ * integrated, this will not live here
+ */
+void *x86_cpu_to_node_map_early_ptr;
+int x86_cpu_to_node_map_init[NR_CPUS] = {
+	[0 ... NR_CPUS-1] = NUMA_NO_NODE
+};
+DEFINE_PER_CPU(int, x86_cpu_to_node_map) = NUMA_NO_NODE;
+#endif
+
 /*
  * Determine if we were loaded by an EFI loader.  If so, then we have also been
  * passed the efi memmap, systab, etc., so we should use these data structures

@@ -856,6 +868,18 @@ void __init setup_arch(char **cmdline_p)
 
 	io_delay_init();
 
+#ifdef CONFIG_X86_SMP
+	/*
+	 * setup to use the early static init tables during kernel startup
+	 * X86_SMP will exclude sub-arches that don't deal well with it.
+	 */
+	x86_cpu_to_apicid_early_ptr = (void *)x86_cpu_to_apicid_init;
+	x86_bios_cpu_apicid_early_ptr = (void *)x86_bios_cpu_apicid_init;
+#ifdef CONFIG_NUMA
+	x86_cpu_to_node_map_early_ptr = (void *)x86_cpu_to_node_map_init;
+#endif
+#endif
+
 #ifdef CONFIG_X86_GENERICARCH
 	generic_apic_probe();
 #endif

index fd38c3a..5bc825b 100644
@@ -33,15 +33,15 @@ struct pci_bus;
 /* Mappings between logical cpu number and node number */
 #ifdef CONFIG_X86_32
 extern int cpu_to_node_map[];
-
 #else
-DECLARE_PER_CPU(int, x86_cpu_to_node_map);
-extern int x86_cpu_to_node_map_init[];
-extern void *x86_cpu_to_node_map_early_ptr;
 /* Returns the number of the current Node. */
 #define numa_node_id()		(early_cpu_to_node(raw_smp_processor_id()))
 #endif
 
+DECLARE_PER_CPU(int, x86_cpu_to_node_map);
+extern int x86_cpu_to_node_map_init[];
+extern void *x86_cpu_to_node_map_early_ptr;
+
 extern cpumask_t node_to_cpumask_map[];
 
 #define NUMA_NO_NODE	(-1)

index 274a595..b9f5be2 100644
@@ -129,7 +129,7 @@ static inline int pfn_valid(int pfn)
 	struct pglist_data  __maybe_unused			\
 				*__alloc_bootmem_node__pgdat = (pgdat);	\
 	__alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE,		\
-						__pa(MAX_DMA_ADDRESS))	\
+						__pa(MAX_DMA_ADDRESS));	\
 })
 #define alloc_bootmem_low_pages_node(pgdat, x)				\
 ({									\

103 lines not on this page · raw message

83 lines not on this page · raw message

index 92a5df6..bf5c9e9 100644
@@ -665,6 +665,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 		unmap_cpu_to_logical_apicid(cpu);
 		cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
 		cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
+		cpu_clear(cpu, cpu_possible_map);
 		cpucount--;
 	} else {
 		per_cpu(x86_cpu_to_apicid, cpu) = apicid;

@@ -743,6 +744,7 @@ EXPORT_SYMBOL(xquad_portio);
 
 static void __init disable_smp(void)
 {
+	cpu_possible_map = cpumask_of_cpu(0);
 	smpboot_clear_io_apic_irqs();
 	phys_cpu_present_map = physid_mask_of_physid(0);
 	map_cpu_to_logical_apicid();

index c6a9789..56fb828 100644
@@ -76,8 +76,6 @@ unsigned disabled_cpus __cpuinitdata;
 /* Bitmask of physically existing CPUs */
 physid_mask_t phys_cpu_present_map;
 
-u8 bios_cpu_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = BAD_APICID };
-
 /*
  * Intel MP BIOS table parsing routines:
  */

@@ -221,7 +219,14 @@ static void __cpuinit MP_processor_info (struct mpc_config_processor *m)
 			def_to_bigsmp = 1;
 		}
 	}
-	bios_cpu_apicid[num_processors - 1] = m->mpc_apicid;
+	/* are we being called early in kernel startup? */
+	if (x86_cpu_to_apicid_early_ptr) {
+		u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr;
+		bios_cpu_apicid[num_processors - 1] = m->mpc_apicid;
+	} else {
+		int cpu = num_processors - 1;
+		per_cpu(x86_bios_cpu_apicid, cpu) = m->mpc_apicid;
+	}
 }
 
 static void __init MP_bus_info (struct mpc_config_bus *m)

index 56fb828..b18fb0f 100644
@@ -106,7 +106,8 @@ static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY] __cpuinit
 
 static void __cpuinit MP_processor_info (struct mpc_config_processor *m)
 {
- 	int ver, apicid;
+	int ver, apicid, cpu;
+	cpumask_t tmp_map;
 	physid_mask_t phys_cpu;
  	
 	if (!(m->mpc_cpuflag & CPU_ENABLED)) {

@@ -199,6 +200,16 @@ static void __cpuinit MP_processor_info (struct mpc_config_processor *m)
 
 	cpu_set(num_processors, cpu_possible_map);
 	num_processors++;
+	cpus_complement(tmp_map, cpu_present_map);
+	cpu = first_cpu(tmp_map);
+
+	if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
+		/*
+		 * x86_bios_cpu_apicid is required to have processors listed
+		 * in same order as logical cpu numbers. Hence the first
+		 * entry is BSP, and so on.
+		 */
+		cpu = 0;
 
 	/*
 	 * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y

@@ -221,12 +232,16 @@ static void __cpuinit MP_processor_info (struct mpc_config_processor *m)
 	}
 	/* are we being called early in kernel startup? */
 	if (x86_cpu_to_apicid_early_ptr) {
+		u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr;
 		u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr;
+
+		cpu_to_apicid[cpu] = m->mpc_apicid;
 		bios_cpu_apicid[num_processors - 1] = m->mpc_apicid;
 	} else {
-		int cpu = num_processors - 1;
+		per_cpu(x86_cpu_to_apicid, cpu) = m->mpc_apicid;
 		per_cpu(x86_bios_cpu_apicid, cpu) = m->mpc_apicid;
 	}
+	cpu_set(cpu, cpu_present_map);
 }
 
 static void __init MP_bus_info (struct mpc_config_bus *m)

index bf5c9e9..2fea910 100644
@@ -525,16 +525,6 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
 #endif	/* WAKE_SECONDARY_VIA_INIT */
 
 extern cpumask_t cpu_initialized;
-static inline int alloc_cpu_id(void)
-{
-	cpumask_t	tmp_map;
-	int cpu;
-	cpus_complement(tmp_map, cpu_present_map);
-	cpu = first_cpu(tmp_map);
-	if (cpu >= NR_CPUS)
-		return -ENODEV;
-	return cpu;
-}
 
 #ifdef CONFIG_HOTPLUG_CPU
 static struct task_struct * __cpuinitdata cpu_idle_tasks[NR_CPUS];

@@ -605,7 +595,6 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 
 	irq_ctx_init(cpu);
 
-	per_cpu(x86_cpu_to_apicid, cpu) = apicid;
 	/*
 	 * This grunge runs the startup process for
 	 * the targeted processor.

@@ -666,10 +655,8 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 		cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
 		cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
 		cpu_clear(cpu, cpu_possible_map);
+		per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
 		cpucount--;
-	} else {
-		per_cpu(x86_cpu_to_apicid, cpu) = apicid;
-		cpu_set(cpu, cpu_present_map);
 	}
 
 	/* mark "stuck" area as not stuck */

@@ -745,6 +732,7 @@ EXPORT_SYMBOL(xquad_portio);
 static void __init disable_smp(void)
 {
 	cpu_possible_map = cpumask_of_cpu(0);
+	cpu_present_map = cpumask_of_cpu(0);
 	smpboot_clear_io_apic_irqs();
 	phys_cpu_present_map = physid_mask_of_physid(0);
 	map_cpu_to_logical_apicid();

@@ -825,7 +813,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 
 	boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
 	boot_cpu_logical_apicid = logical_smp_processor_id();
-	per_cpu(x86_cpu_to_apicid, 0) = boot_cpu_physical_apicid;
 
 	current_thread_info()->cpu = 0;
 

@@ -866,8 +853,11 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 			continue;
 		if (max_cpus <= cpucount+1)
 			continue;
-
-		if (((cpu = alloc_cpu_id()) <= 0) || do_boot_cpu(apicid, cpu))
+		/* Utterly temporary */
+		for (cpu = 0; cpu < NR_CPUS; cpu++)
+			if (per_cpu(x86_cpu_to_apicid, cpu) == apicid)
+				break;
+		if (do_boot_cpu(apicid, cpu))
 			printk("CPU #%d not responding - cannot use it.\n",
 								apicid);
 		else

index 2fea910..5c4e85c 100644
@@ -166,8 +166,6 @@ static void __cpuinit smp_callin(void)
 	cpu_set(cpuid, cpu_callin_map);
 }
 
-static int cpucount;
-
 /*
  * Activate a secondary processor.
  */

@@ -585,7 +583,6 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 	/* start_eip had better be page-aligned! */
 	start_eip = setup_trampoline();
 
-	++cpucount;
 	alternatives_smp_switch(1);
 
 	/* So we see what's up   */

@@ -656,7 +653,6 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 		cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
 		cpu_clear(cpu, cpu_possible_map);
 		per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
-		cpucount--;
 	}
 
 	/* mark "stuck" area as not stuck */

@@ -672,7 +668,6 @@ void cpu_exit_clear(void)
 
 	idle_task_exit();
 
-	cpucount --;
 	cpu_uninit();
 	irq_ctx_exit(cpu);
 

@@ -795,7 +790,6 @@ static int __init smp_sanity_check(unsigned max_cpus)
 	return 0;
 }
 
-
 /*
  * Cycle through the processors sending APIC IPIs to boot each.
  */

@@ -851,7 +845,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 
 		if (!check_apicid_present(bit))
 			continue;
-		if (max_cpus <= cpucount+1)
+		if (max_cpus <= cpus_weight(cpu_present_map))
 			continue;
 		/* Utterly temporary */
 		for (cpu = 0; cpu < NR_CPUS; cpu++)

@@ -878,7 +872,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 			bogosum += cpu_data(cpu).loops_per_jiffy;
 	printk(KERN_INFO
 		"Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
-		cpucount+1,
+		cpus_weight(cpu_present_map),
 		bogosum/(500000/HZ),
 		(bogosum/(5000/HZ))%100);
 	

@@ -892,7 +886,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 	 * approved Athlon
 	 */
 	if (tainted & TAINT_UNSAFE_SMP) {
-		if (cpucount)
+		if (cpus_weight(cpu_present_map))
 			printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
 		else
 			tainted &= ~TAINT_UNSAFE_SMP;

index a157a52..02427d1 100644
@@ -228,6 +228,26 @@ void __init smp_alloc_memory(void)
 }
 #endif
 
+void impress_friends(void)
+{
+	int cpu;
+	unsigned long bogosum = 0;
+	/*
+	 * Allow the user to impress friends.
+	 */
+	Dprintk("Before bogomips.\n");
+	for_each_possible_cpu(cpu)
+		if (cpu_isset(cpu, cpu_callout_map))
+			bogosum += cpu_data(cpu).loops_per_jiffy;
+	printk(KERN_INFO
+		"Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
+		cpus_weight(cpu_present_map),
+		bogosum/(500000/HZ),
+		(bogosum/(5000/HZ))%100);
+
+	Dprintk("Before bogocount - setting activated=1.\n");
+}
+
 #ifdef CONFIG_HOTPLUG_CPU
 void remove_siblinginfo(int cpu)
 {

index 5c4e85c..34493f8 100644
@@ -790,13 +790,13 @@ static int __init smp_sanity_check(unsigned max_cpus)
 	return 0;
 }
 
+extern void impress_friends(void);
 /*
  * Cycle through the processors sending APIC IPIs to boot each.
  */
 static void __init smp_boot_cpus(unsigned int max_cpus)
 {
 	int apicid, cpu, bit, kicked;
-	unsigned long bogosum = 0;
 
 	/*
 	 * Setup boot CPU information

@@ -863,20 +863,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 	 */
 	smpboot_restore_warm_reset_vector();
 
-	/*
-	 * Allow the user to impress friends.
-	 */
-	Dprintk("Before bogomips.\n");
-	for_each_possible_cpu(cpu)
-		if (cpu_isset(cpu, cpu_callout_map))
-			bogosum += cpu_data(cpu).loops_per_jiffy;
-	printk(KERN_INFO
-		"Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
-		cpus_weight(cpu_present_map),
-		bogosum/(500000/HZ),
-		(bogosum/(5000/HZ))%100);
-	
-	Dprintk("Before bogocount - setting activated=1.\n");
+	impress_friends();
 
 	if (smp_b_stepping)
 		printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");

index 02427d1..ddb94ef 100644
@@ -45,10 +45,8 @@ unsigned char *trampoline_base = __va(SMP_TRAMPOLINE_BASE);
 /* representing cpus for which sibling maps can be computed */
 static cpumask_t cpu_sibling_setup_map;
 
-#ifdef CONFIG_X86_32
 /* Set if we find a B stepping CPU */
 int __cpuinitdata smp_b_stepping;
-#endif
 
 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
 {

@@ -105,6 +103,25 @@ valid_k7:
 #endif
 }
 
+void smp_checks(void)
+{
+	if (smp_b_stepping)
+		printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
+				    "with B stepping processors.\n");
+
+	/*
+	 * Don't taint if we are running SMP kernel on a single non-MP
+	 * approved Athlon
+	 */
+	if (tainted & TAINT_UNSAFE_SMP) {
+		if (cpus_weight(cpu_present_map))
+			printk(KERN_INFO "WARNING: This combination of AMD"
+				"processors is not suitable for SMP.\n");
+		else
+			tainted &= ~TAINT_UNSAFE_SMP;
+	}
+}
+
 /*
  * The bootstrap kernel entry code has set these up. Save them for
  * a given CPU

index 34493f8..361851c 100644
@@ -59,8 +59,6 @@
 #include <asm/vmi.h>
 #include <asm/mtrr.h>
 
-extern int smp_b_stepping;
-
 static cpumask_t smp_commenced_mask;
 
 /* which logical CPU number maps to which CPU (physical APIC ID) */

@@ -791,6 +789,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
 }
 
 extern void impress_friends(void);
+extern void smp_checks(void);
 /*
  * Cycle through the processors sending APIC IPIs to boot each.
  */

@@ -865,22 +864,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 
 	impress_friends();
 
-	if (smp_b_stepping)
-		printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");
-
-	/*
-	 * Don't taint if we are running SMP kernel on a single non-MP
-	 * approved Athlon
-	 */
-	if (tainted & TAINT_UNSAFE_SMP) {
-		if (cpus_weight(cpu_present_map))
-			printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
-		else
-			tainted &= ~TAINT_UNSAFE_SMP;
-	}
-
-	Dprintk("Boot done.\n");
-
+	smp_checks();
 	/*
 	 * construct cpu_sibling_map, so that we can tell sibling CPUs
 	 * efficiently.

index ddb94ef..6978f1b 100644
@@ -114,7 +114,7 @@ void smp_checks(void)
 	 * approved Athlon
 	 */
 	if (tainted & TAINT_UNSAFE_SMP) {
-		if (cpus_weight(cpu_present_map))
+		if (num_online_cpus())
 			printk(KERN_INFO "WARNING: This combination of AMD"
 				"processors is not suitable for SMP.\n");
 		else

@@ -258,7 +258,7 @@ void impress_friends(void)
 			bogosum += cpu_data(cpu).loops_per_jiffy;
 	printk(KERN_INFO
 		"Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
-		cpus_weight(cpu_present_map),
+		num_online_cpus(),
 		bogosum/(500000/HZ),
 		(bogosum/(5000/HZ))%100);
 

index 361851c..1736404 100644
@@ -788,8 +788,6 @@ static int __init smp_sanity_check(unsigned max_cpus)
 	return 0;
 }
 
-extern void impress_friends(void);
-extern void smp_checks(void);
 /*
  * Cycle through the processors sending APIC IPIs to boot each.
  */

@@ -858,14 +856,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 	}
 
 	/*
-	 * Cleanup possible dangling ends...
-	 */
-	smpboot_restore_warm_reset_vector();
-
-	impress_friends();
-
-	smp_checks();
-	/*
 	 * construct cpu_sibling_map, so that we can tell sibling CPUs
 	 * efficiently.
 	 */

@@ -959,8 +949,20 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 	return 0;
 }
 
+extern void impress_friends(void);
+extern void smp_checks(void);
+
 void __init native_smp_cpus_done(unsigned int max_cpus)
 {
+	/*
+	 * Cleanup possible dangling ends...
+	 */
+	smpboot_restore_warm_reset_vector();
+
+	Dprintk("Boot done.\n");
+
+	impress_friends();
+	smp_checks();
 #ifdef CONFIG_X86_IO_APIC
 	setup_ioapic_dest();
 #endif

index a9cc911..c3e770b 100644
@@ -824,12 +824,20 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 	return err;
 }
 
+extern void impress_friends(void);
+extern void smp_checks(void);
+
 /*
  * Finish the SMP boot.
  */
 void __init native_smp_cpus_done(unsigned int max_cpus)
 {
 	smp_cleanup_boot();
+
+	Dprintk("Boot done.\n");
+
+	impress_friends();
+	smp_checks();
 	setup_ioapic_dest();
 	check_nmi_watchdog();
 }

index c3e770b..c6c993f 100644
@@ -60,6 +60,8 @@
 #include <asm/hw_irq.h>
 #include <asm/numa.h>
 
+#include <mach_wakecpu.h>
+
 /* Set when the idlers are all forked */
 int smp_threads_ready;
 

@@ -85,13 +87,6 @@ struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
 #define set_idle_for_cpu(x,p)   (idle_thread_array[(x)] = (p))
 #endif
 
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
-	while (!atomic_read(deassert))
-		cpu_relax();
-	return;
-}
-
 static atomic_t init_deasserted __cpuinitdata;
 
 /*

@@ -247,7 +242,7 @@ extern volatile unsigned long init_rsp;
 extern void (*initial_code)(void);
 
 #ifdef APIC_DEBUG
-static void inquire_remote_apic(int apicid)
+static void __inquire_remote_apic(int apicid)
 {
 	unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
 	char *names[] = { "ID", "VERSION", "SPIV" };

index c6c993f..b9384b3 100644
@@ -61,6 +61,7 @@
 #include <asm/numa.h>
 
 #include <mach_wakecpu.h>
+#include <smpboot_hooks.h>
 
 /* Set when the idlers are all forked */
 int smp_threads_ready;

@@ -517,14 +518,7 @@ do_rest:
 
 	Dprintk("Setting warm reset code and vector.\n");
 
-	CMOS_WRITE(0xa, 0xf);
-	local_flush_tlb();
-	Dprintk("1.\n");
-	*((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4;
-	Dprintk("2.\n");
-	*((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf;
-	Dprintk("3.\n");
-
+	smpboot_setup_warm_reset_vector(start_rip);
 	/*
 	 * Be paranoid about clearing APIC errors.
 	 */

@@ -594,23 +588,6 @@ cycles_t cacheflush_time;
 unsigned long cache_decay_ticks;
 
 /*
- * Cleanup possible dangling ends...
- */
-static __cpuinit void smp_cleanup_boot(void)
-{
-	/*
-	 * Paranoid:  Set warm reset code and vector here back
-	 * to default values.
-	 */
-	CMOS_WRITE(0, 0xf);
-
-	/*
-	 * Reset trampoline flag
-	 */
-	*((volatile int *) phys_to_virt(0x467)) = 0;
-}
-
-/*
  * Fall back to non SMP mode after errors.
  *
  * RED-PEN audit/test this more. I bet there is more state messed up here.

@@ -827,7 +804,7 @@ extern void smp_checks(void);
  */
 void __init native_smp_cpus_done(unsigned int max_cpus)
 {
-	smp_cleanup_boot();
+	smpboot_restore_warm_reset_vector();
 
 	Dprintk("Boot done.\n");
 

index 6aa93db..c32cc0f 100644
@@ -1317,6 +1317,29 @@ void smp_error_interrupt(struct pt_regs *regs)
 	irq_exit();
 }
 
+#ifdef CONFIG_SMP
+void __init smp_intr_init(void)
+{
+	/*
+	 * IRQ0 must be given a fixed assignment and initialized,
+	 * because it's used before the IO-APIC is set up.
+	 */
+	set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
+
+	/*
+	 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
+	 * IPI, driven by wakeup.
+	 */
+	set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
+
+	/* IPI for invalidation */
+	set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
+
+	/* IPI for generic function call */
+	set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
+}
+#endif
+
 /*
  * Initialize APIC interrupts
  */

index 1736404..87c9a75 100644
@@ -968,24 +968,3 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
 #endif
 	zap_low_mappings();
 }
-
-void __init smp_intr_init(void)
-{
-	/*
-	 * IRQ0 must be given a fixed assignment and initialized,
-	 * because it's used before the IO-APIC is set up.
-	 */
-	set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
-
-	/*
-	 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
-	 * IPI, driven by wakeup.
-	 */
-	set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
-
-	/* IPI for invalidation */
-	set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
-
-	/* IPI for generic function call */
-	set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
-}

index 87c9a75..bfdfe3c 100644
@@ -889,10 +889,7 @@ void __init native_smp_prepare_boot_cpu(void)
 	init_gdt(cpu);
 	switch_to_new_gdt();
 
-	cpu_set(cpu, cpu_online_map);
 	cpu_set(cpu, cpu_callout_map);
-	cpu_set(cpu, cpu_present_map);
-	cpu_set(cpu, cpu_possible_map);
 	__get_cpu_var(cpu_state) = CPU_ONLINE;
 }
 

index bd0fac5..5a29ded 100644
@@ -26,6 +26,8 @@
 #include <asm/proto.h>
 #include <asm/mce.h>
 
+#include <mach_traps.h>
+
 int unknown_nmi_panic;
 int nmi_watchdog_enabled;
 int panic_on_unrecovered_nmi;

index 3d36144..6d883b1 100644
@@ -33,6 +33,8 @@
 #include <linux/kdebug.h>
 #include <linux/utsname.h>
 
+#include <mach_traps.h>
+
 #if defined(CONFIG_EDAC)
 #include <linux/edac.h>
 #endif

index 2eeb74e..94a5b19 100644
@@ -36,8 +36,6 @@ static inline void unset_nmi_pm_callback(struct pm_dev * dev)
 extern void default_do_nmi(struct pt_regs *);
 extern void die_nmi(char *str, struct pt_regs *regs, int do_panic);
 
-#define get_nmi_reason() inb(0x61)
-
 extern int unknown_nmi_panic;
 extern int nmi_watchdog_enabled;
 

index aa6800f..daea273 100644
@@ -67,7 +67,7 @@ static __init void nmi_cpu_busy(void *data)
 }
 #endif
 
-static int __init check_nmi_watchdog(void)
+int __init check_nmi_watchdog(void)
 {
 	unsigned int *prev_nmi_count;
 	int cpu;

94 lines not on this page · raw message

61 lines not on this page · raw message

88 lines not on this page · raw message

index daea273..9f9eb5b 100644
@@ -129,8 +129,6 @@ int __init check_nmi_watchdog(void)
 	kfree(prev_nmi_count);
 	return 0;
 }
-/* This needs to happen later in boot so counters are working */
-late_initcall(check_nmi_watchdog);
 
 static int __init setup_nmi_watchdog(char *str)
 {

index bfdfe3c..1f3aff4 100644
@@ -963,5 +963,6 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
 #ifdef CONFIG_X86_IO_APIC
 	setup_ioapic_dest();
 #endif
+	check_nmi_watchdog();
 	zap_low_mappings();
 }

index 1f3aff4..a350553 100644
@@ -876,6 +876,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
    who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
 void __init native_smp_prepare_cpus(unsigned int max_cpus)
 {
+	nmi_watchdog_default();
 	smp_commenced_mask = cpumask_of_cpu(0);
 	cpu_callin_map = cpumask_of_cpu(0);
 	mb();

index 2b94199..1e36302 100644
@@ -39,6 +39,9 @@ static inline void unset_nmi_pm_callback(struct pm_dev *dev)
 #ifdef CONFIG_X86_64
 extern void default_do_nmi(struct pt_regs *);
 extern void die_nmi(char *str, struct pt_regs *regs, int do_panic);
+extern void nmi_watchdog_default(void);
+#else
+#define nmi_watchdog_default() do {} while (0)
 #endif
 
 extern int check_nmi_watchdog(void);

@@ -50,7 +53,6 @@ extern int reserve_perfctr_nmi(unsigned int);
 extern void release_perfctr_nmi(unsigned int);
 extern int reserve_evntsel_nmi(unsigned int);
 extern void release_evntsel_nmi(unsigned int);
-extern void nmi_watchdog_default(void);
 
 extern void setup_apic_nmi_watchdog(void *);
 extern void stop_apic_nmi_watchdog(void *);

index a350553..5cae17f 100644
@@ -855,18 +855,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 			++kicked;
 	}
 
-	/*
-	 * construct cpu_sibling_map, so that we can tell sibling CPUs
-	 * efficiently.
-	 */
-	for_each_possible_cpu(cpu) {
-		cpus_clear(per_cpu(cpu_sibling_map, cpu));
-		cpus_clear(per_cpu(cpu_core_map, cpu));
-	}
-
-	cpu_set(0, per_cpu(cpu_sibling_map, 0));
-	cpu_set(0, per_cpu(cpu_core_map, 0));
-
 	smpboot_setup_io_apic();
 
 	setup_boot_clock();

index db5f750..0d6ea74 100644
@@ -103,7 +103,7 @@ static inline void ack_APIC_irq(void)
 	 */
 
 	/* Docs say use 0 for future compatibility */
-	apic_write_around(APIC_EOI, 0);
+	apic_write(APIC_EOI, 0);
 }
 
 extern int lapic_get_maxlvt(void);

index 5cae17f..255c6f7 100644
@@ -708,8 +708,12 @@ static void __cpuinit __smp_prepare_cpu(int cpu)
 	clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
 			min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
 	flush_tlb_all();
-	schedule_work(&info.task);
-	wait_for_completion(&done);
+	if (!keventd_up() || current_is_keventd())
+		info.task.func(&info.task);
+	else {
+		schedule_work(&info.task);
+		wait_for_completion(&done);
+	}
 
 	zap_low_mappings();
 }

index 255c6f7..88ee655 100644
@@ -195,11 +195,6 @@ static void __cpuinit start_secondary(void *unused)
 		enable_NMI_through_LVT0();
 		enable_8259A_irq(0);
 	}
-	/*
-	 * low-memory mappings have been cleared, flush them from
-	 * the local TLBs too.
-	 */
-	local_flush_tlb();
 
 	/* This must be done before setting cpu_online_map */
 	set_cpu_sibling_map(raw_smp_processor_id());

@@ -714,8 +709,6 @@ static void __cpuinit __smp_prepare_cpu(int cpu)
 		schedule_work(&info.task);
 		wait_for_completion(&done);
 	}
-
-	zap_low_mappings();
 }
 #endif
 

index 88ee655..978e137 100644
@@ -670,6 +670,7 @@ void cpu_exit_clear(void)
 	cpu_clear(cpu, smp_commenced_mask);
 	unmap_cpu_to_logical_apicid(cpu);
 }
+#endif
 
 struct warm_boot_cpu_info {
 	struct completion *complete;

@@ -710,7 +711,6 @@ static void __cpuinit __smp_prepare_cpu(int cpu)
 		wait_for_completion(&done);
 	}
 }
-#endif
 
 static int boot_cpu_logical_apicid;
 /* Where the IO area was mapped on multiquad, always 0 otherwise */

@@ -790,8 +790,6 @@ static int __init smp_sanity_check(unsigned max_cpus)
  */
 static void __init smp_boot_cpus(unsigned int max_cpus)
 {
-	int apicid, cpu, bit, kicked;
-
 	/*
 	 * Setup boot CPU information
 	 */

@@ -819,39 +817,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 
 	setup_portio_remap();
 
-	/*
-	 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
-	 *
-	 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
-	 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the 
-	 * clustered apic ID.
-	 */
-	Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map));
-
-	kicked = 1;
-	for (bit = 0; kicked < NR_CPUS && bit < MAX_APICS; bit++) {
-		apicid = cpu_present_to_apicid(bit);
-		/*
-		 * Don't even attempt to start the boot CPU!
-		 */
-		if ((apicid == boot_cpu_apicid) || (apicid == BAD_APICID))
-			continue;
-
-		if (!check_apicid_present(bit))
-			continue;
-		if (max_cpus <= cpus_weight(cpu_present_map))
-			continue;
-		/* Utterly temporary */
-		for (cpu = 0; cpu < NR_CPUS; cpu++)
-			if (per_cpu(x86_cpu_to_apicid, cpu) == apicid)
-				break;
-		if (do_boot_cpu(apicid, cpu))
-			printk("CPU #%d not responding - cannot use it.\n",
-								apicid);
-		else
-			++kicked;
-	}
-
 	smpboot_setup_io_apic();
 
 	setup_boot_clock();

@@ -895,17 +860,8 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 	}
 
 	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
-#ifdef CONFIG_HOTPLUG_CPU
 
-	/*
-	 * We do warm boot only on cpus that had booted earlier
-	 * Otherwise cold boot is all handled from smp_boot_cpus().
-	 * cpu_callin_map is set during AP kickstart process. Its reset
-	 * when a cpu is taken offline from cpu_exit_clear().
-	 */
-	if (!cpu_isset(cpu, cpu_callin_map))
-		__smp_prepare_cpu(cpu);
-#endif
+	__smp_prepare_cpu(cpu);
 
 	/* In case one didn't come up */
 	if (!cpu_isset(cpu, cpu_callin_map)) {

index 978e137..c30abed 100644
@@ -59,8 +59,6 @@
 #include <asm/vmi.h>
 #include <asm/mtrr.h>
 
-static cpumask_t smp_commenced_mask;
-
 /* which logical CPU number maps to which CPU (physical APIC ID) */
 u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
 			{ [0 ... NR_CPUS-1] = BAD_APICID };

@@ -180,8 +178,6 @@ static void __cpuinit start_secondary(void *unused)
 	cpu_init();
 	preempt_disable();
 	smp_callin();
-	while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
-		cpu_relax();
 
 	/* otherwise gcc will move up smp_processor_id before the cpu_init */
 	barrier();

@@ -667,7 +663,6 @@ void cpu_exit_clear(void)
 	cpu_clear(cpu, cpu_callout_map);
 	cpu_clear(cpu, cpu_callin_map);
 
-	cpu_clear(cpu, smp_commenced_mask);
 	unmap_cpu_to_logical_apicid(cpu);
 }
 #endif

@@ -827,7 +822,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 void __init native_smp_prepare_cpus(unsigned int max_cpus)
 {
 	nmi_watchdog_default();
-	smp_commenced_mask = cpumask_of_cpu(0);
 	cpu_callin_map = cpumask_of_cpu(0);
 	mb();
 	smp_boot_cpus(max_cpus);

@@ -869,8 +863,6 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 		return -EIO;
 	}
 
-	/* Unleash the CPU! */
-	cpu_set(cpu, smp_commenced_mask);
 
 	/*
 	 * Check TSC synchronization with the AP (keep irqs disabled

index c30abed..fc1eb52 100644
@@ -79,6 +79,24 @@ static void map_cpu_to_logical_apicid(void);
 /* State of each CPU. */
 DEFINE_PER_CPU(int, cpu_state) = { 0 };
 
+/* Store all idle threads, this can be reused instead of creating
+* a new thread. Also avoids complicated thread destroy functionality
+* for idle threads.
+*/
+#ifdef CONFIG_HOTPLUG_CPU
+/*
+ * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
+ * removed after init for !CONFIG_HOTPLUG_CPU.
+ */
+static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
+#define get_idle_for_cpu(x)      (per_cpu(idle_thread_array, x))
+#define set_idle_for_cpu(x, p)   (per_cpu(idle_thread_array, x) = (p))
+#else
+struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
+#define get_idle_for_cpu(x)      (idle_thread_array[(x)])
+#define set_idle_for_cpu(x, p)   (idle_thread_array[(x)] = (p))
+#endif
+
 static atomic_t init_deasserted;
 
 static void __cpuinit smp_callin(void)

@@ -513,30 +531,21 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
 
 extern cpumask_t cpu_initialized;
 
-#ifdef CONFIG_HOTPLUG_CPU
-static struct task_struct * __cpuinitdata cpu_idle_tasks[NR_CPUS];
-static inline struct task_struct * __cpuinit alloc_idle_task(int cpu)
-{
+struct create_idle {
+	struct work_struct work;
 	struct task_struct *idle;
+	struct completion done;
+	int cpu;
+};
 
-	if ((idle = cpu_idle_tasks[cpu]) != NULL) {
-		/* initialize thread_struct.  we really want to avoid destroy
-		 * idle tread
-		 */
-		idle->thread.sp = (unsigned long)task_pt_regs(idle);
-		init_idle(idle, cpu);
-		return idle;
-	}
-	idle = fork_idle(cpu);
+static void __cpuinit do_fork_idle(struct work_struct *work)
+{
+	struct create_idle *c_idle =
+		container_of(work, struct create_idle, work);
 
-	if (!IS_ERR(idle))
-		cpu_idle_tasks[cpu] = idle;
-	return idle;
+	c_idle->idle = fork_idle(c_idle->cpu);
+	complete(&c_idle->done);
 }
-#else
-#define alloc_idle_task(cpu) fork_idle(cpu)
-#endif
-
 static int __cpuinit do_boot_cpu(int apicid, int cpu)
 /*
  * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad

@@ -544,11 +553,15 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
  * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
  */
 {
-	struct task_struct *idle;
 	unsigned long boot_error;
 	int timeout;
 	unsigned long start_eip;
 	unsigned short nmi_high = 0, nmi_low = 0;
+	struct create_idle c_idle = {
+		.cpu = cpu,
+		.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
+	};
+	INIT_WORK(&c_idle.work, do_fork_idle);
 
 	/*
 	 * Save current MTRR state in case it was changed since early boot

@@ -556,19 +569,38 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 	 */
 	mtrr_save_state();
 
+	c_idle.idle = get_idle_for_cpu(cpu);
+
 	/*
 	 * We can't use kernel_thread since we must avoid to
 	 * reschedule the child.
 	 */
-	idle = alloc_idle_task(cpu);
-	if (IS_ERR(idle))
-		panic("failed fork for CPU %d", cpu);
+	if (c_idle.idle) {
+		c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
+			(THREAD_SIZE +  task_stack_page(c_idle.idle))) - 1);
+		init_idle(c_idle.idle, cpu);
+		goto do_rest;
+	}
+
+	if (!keventd_up() || current_is_keventd())
+		c_idle.work.func(&c_idle.work);
+	else {
+		schedule_work(&c_idle.work);
+		wait_for_completion(&c_idle.done);
+	}
+
+	if (IS_ERR(c_idle.idle)) {
+		printk(KERN_ERR "failed fork for CPU %d\n", cpu);
+		return PTR_ERR(c_idle.idle);
+	}
 
+	set_idle_for_cpu(cpu, c_idle.idle);
+do_rest:
+	per_cpu(current_task, cpu) = c_idle.idle;
 	init_gdt(cpu);
- 	per_cpu(current_task, cpu) = idle;
 	early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
 
-	idle->thread.ip = (unsigned long) start_secondary;
+	c_idle.idle->thread.ip = (unsigned long) start_secondary;
 	/* start_eip had better be page-aligned! */
 	start_eip = setup_trampoline();
 

@@ -577,7 +609,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 	/* So we see what's up   */
 	printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
 	/* Stack for startup_32 can be just as for start_secondary onwards */
-	stack_start.sp = (void *) idle->thread.sp;
+	stack_start.sp = (void *) c_idle.idle->thread.sp;
 
 	irq_ctx_init(cpu);
 

index fc1eb52..c03596e 100644
@@ -699,44 +699,18 @@ void cpu_exit_clear(void)
 }
 #endif
 
-struct warm_boot_cpu_info {
-	struct completion *complete;
-	struct work_struct task;
-	int apicid;
-	int cpu;
-};
-
-static void __cpuinit do_warm_boot_cpu(struct work_struct *work)
-{
-	struct warm_boot_cpu_info *info =
-		container_of(work, struct warm_boot_cpu_info, task);
-	do_boot_cpu(info->apicid, info->cpu);
-	complete(info->complete);
-}
-
 static void __cpuinit __smp_prepare_cpu(int cpu)
 {
-	DECLARE_COMPLETION_ONSTACK(done);
-	struct warm_boot_cpu_info info;
 	int	apicid;
 
 	apicid = per_cpu(x86_cpu_to_apicid, cpu);
 
-	info.complete = &done;
-	info.apicid = apicid;
-	info.cpu = cpu;
-	INIT_WORK(&info.task, do_warm_boot_cpu);
-
 	/* init low mem mapping */
 	clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
 			min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
 	flush_tlb_all();
-	if (!keventd_up() || current_is_keventd())
-		info.task.func(&info.task);
-	else {
-		schedule_work(&info.task);
-		wait_for_completion(&done);
-	}
+
+	do_boot_cpu(apicid, cpu);
 }
 
 static int boot_cpu_logical_apicid;

index b9384b3..e93fff4 100644
@@ -90,6 +90,9 @@ struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
 
 static atomic_t init_deasserted __cpuinitdata;
 
+#define smp_callin_clear_local_apic() do {} while (0)
+#define map_cpu_to_logical_apicid() do {} while (0)
+
 /*
  * Report back to the Boot Processor.
  * Running on AP.

@@ -152,8 +155,10 @@ void __cpuinit smp_callin(void)
 	 */
 
 	Dprintk("CALLIN, before setup_local_APIC().\n");
+	smp_callin_clear_local_apic();
 	setup_local_APIC();
 	end_local_APIC_setup();
+	map_cpu_to_logical_apicid();
 
 	/*
 	 * Get our bogomips.

index c32cc0f..80c81c7 100644
@@ -897,12 +897,50 @@ void __init init_bsp_APIC(void)
 	apic_write_around(APIC_LVT1, value);
 }
 
+void __cpuinit lapic_setup_esr(void)
+{
+	unsigned long oldvalue, value, maxlvt;
+	if (lapic_is_integrated() && !esr_disable) {
+		/* !82489DX */
+		maxlvt = lapic_get_maxlvt();
+		if (maxlvt > 3)		/* Due to the Pentium erratum 3AP. */
+			apic_write(APIC_ESR, 0);
+		oldvalue = apic_read(APIC_ESR);
+
+		/* enables sending errors */
+		value = ERROR_APIC_VECTOR;
+		apic_write_around(APIC_LVTERR, value);
+		/*
+		 * spec says clear errors after enabling vector.
+		 */
+		if (maxlvt > 3)
+			apic_write(APIC_ESR, 0);
+		value = apic_read(APIC_ESR);
+		if (value != oldvalue)
+			apic_printk(APIC_VERBOSE, "ESR value before enabling "
+				"vector: 0x%08lx  after: 0x%08lx\n",
+				oldvalue, value);
+	} else {
+		if (esr_disable)
+			/*
+			 * Something untraceable is creating bad interrupts on
+			 * secondary quads ... for the moment, just leave the
+			 * ESR disabled - we can't do anything useful with the
+			 * errors anyway - mbligh
+			 */
+			printk(KERN_INFO "Leaving ESR disabled.\n");
+		else
+			printk(KERN_INFO "No ESR for 82489DX.\n");
+	}
+}
+
+
 /**
  * setup_local_APIC - setup the local APIC
  */
 void __cpuinit setup_local_APIC(void)
 {
-	unsigned long oldvalue, value, maxlvt, integrated;
+	unsigned long value, integrated;
 	int i, j;
 
 	/* Pound the ESR really hard over the head with a big hammer - mbligh */

@@ -1027,38 +1065,7 @@ void __cpuinit setup_local_APIC(void)
 		value |= APIC_LVT_LEVEL_TRIGGER;
 	apic_write_around(APIC_LVT1, value);
 
-	if (integrated && !esr_disable) {
-		/* !82489DX */
-		maxlvt = lapic_get_maxlvt();
-		if (maxlvt > 3)		/* Due to the Pentium erratum 3AP. */
-			apic_write(APIC_ESR, 0);
-		oldvalue = apic_read(APIC_ESR);
-
-		/* enables sending errors */
-		value = ERROR_APIC_VECTOR;
-		apic_write_around(APIC_LVTERR, value);
-		/*
-		 * spec says clear errors after enabling vector.
-		 */
-		if (maxlvt > 3)
-			apic_write(APIC_ESR, 0);
-		value = apic_read(APIC_ESR);
-		if (value != oldvalue)
-			apic_printk(APIC_VERBOSE, "ESR value before enabling "
-				"vector: 0x%08lx  after: 0x%08lx\n",
-				oldvalue, value);
-	} else {
-		if (esr_disable)
-			/*
-			 * Something untraceable is creating bad interrupts on
-			 * secondary quads ... for the moment, just leave the
-			 * ESR disabled - we can't do anything useful with the
-			 * errors anyway - mbligh
-			 */
-			printk(KERN_INFO "Leaving ESR disabled.\n");
-		else
-			printk(KERN_INFO "No ESR for 82489DX.\n");
-	}
+	lapic_setup_esr();
 
 	/* Disable the local apic timer */
 	value = apic_read(APIC_LVTT);

index 80c81c7..6f50602 100644
@@ -1064,9 +1064,13 @@ void __cpuinit setup_local_APIC(void)
 	if (!integrated)		/* 82489DX */
 		value |= APIC_LVT_LEVEL_TRIGGER;
 	apic_write_around(APIC_LVT1, value);
+}
 
-	lapic_setup_esr();
+void __cpuinit end_local_APIC_setup(void)
+{
+	unsigned long value;
 
+	lapic_setup_esr();
 	/* Disable the local apic timer */
 	value = apic_read(APIC_LVTT);
 	value |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);

@@ -1256,6 +1260,7 @@ int __init APIC_init_uniprocessor(void)
 
 	setup_local_APIC();
 
+	end_local_APIC_setup();
 #ifdef CONFIG_X86_IO_APIC
 	if (smp_found_config)
 		if (!skip_ioapic_setup && nr_ioapics)

index c03596e..dbfaeb3 100644
@@ -161,6 +161,7 @@ static void __cpuinit smp_callin(void)
 	Dprintk("CALLIN, before setup_local_APIC().\n");
 	smp_callin_clear_local_apic();
 	setup_local_APIC();
+	end_local_APIC_setup();
 	map_cpu_to_logical_apicid();
 
 	/*

@@ -780,6 +781,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
 			printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
 			connect_bsp_APIC();
 			setup_local_APIC();
+			end_local_APIC_setup();
 		}
 		return -1;
 	}

@@ -813,6 +815,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
 
 	connect_bsp_APIC();
 	setup_local_APIC();
+	end_local_APIC_setup();
 	map_cpu_to_logical_apicid();
 
 

index dbfaeb3..bd2f886 100644
@@ -167,7 +167,9 @@ static void __cpuinit smp_callin(void)
 	/*
 	 * Get our bogomips.
 	 */
+	local_irq_enable();
 	calibrate_delay();
+	local_irq_disable();
 	Dprintk("Stack at about %p\n",&cpuid);
 
 	/*

index bd2f886..5165b11 100644
@@ -556,7 +556,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
  * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
  */
 {
-	unsigned long boot_error;
+	unsigned long boot_error = 0;
 	int timeout;
 	unsigned long start_eip;
 	unsigned short nmi_high = 0, nmi_low = 0;

@@ -566,11 +566,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 	};
 	INIT_WORK(&c_idle.work, do_fork_idle);
 
-	/*
-	 * Save current MTRR state in case it was changed since early boot
-	 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
-	 */
-	mtrr_save_state();
+	alternatives_smp_switch(1);
 
 	c_idle.idle = get_idle_for_cpu(cpu);
 

@@ -607,8 +603,6 @@ do_rest:
 	/* start_eip had better be page-aligned! */
 	start_eip = setup_trampoline();
 
-	alternatives_smp_switch(1);
-
 	/* So we see what's up   */
 	printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
 	/* Stack for startup_32 can be just as for start_secondary onwards */

@@ -628,6 +622,12 @@ do_rest:
 	store_NMI_vector(&nmi_high, &nmi_low);
 
 	smpboot_setup_warm_reset_vector(start_eip);
+	/*
+	 * Be paranoid about clearing APIC errors.
+	 */
+	apic_write(APIC_ESR, 0);
+	apic_read(APIC_ESR);
+
 
 	/*
 	 * Starting actual IPI sequence...

@@ -864,6 +864,12 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 		return -EINVAL;
 	}
 
+	/*
+	 * Save current MTRR state in case it was changed since early boot
+	 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
+	 */
+	mtrr_save_state();
+
 	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 
 	__smp_prepare_cpu(cpu);

index e93fff4..7d1b4cb 100644
@@ -432,7 +432,7 @@ static void __cpuinit do_fork_idle(struct work_struct *work)
  */
 static int __cpuinit do_boot_cpu(int cpu, int apicid)
 {
-	unsigned long boot_error;
+	unsigned long boot_error = 0;
 	int timeout;
 	unsigned long start_rip;
 	struct create_idle c_idle = {

@@ -531,11 +531,6 @@ do_rest:
 	apic_read(APIC_ESR);
 
 	/*
-	 * Status is now clean
-	 */
-	boot_error = 0;
-
-	/*
 	 * Starting actual IPI sequence...
 	 */
 	boot_error = wakeup_secondary_via_INIT(apicid, start_rip);

@@ -564,7 +559,7 @@ do_rest:
 			print_cpu_info(&cpu_data(cpu));
 		} else {
 			boot_error = 1;
-			if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))
+			if (*((volatile unsigned char *)trampoline_base)
 					== 0xA5)
 				/* trampoline started but...? */
 				printk("Stuck ??\n");

@@ -583,10 +578,12 @@ do_rest:
 		cpu_clear(cpu, cpu_present_map);
 		cpu_clear(cpu, cpu_possible_map);
 		per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
-		return -EIO;
 	}
 
-	return 0;
+	/* mark "stuck" area as not stuck */
+	*((volatile unsigned long *)trampoline_base) = 0;
+
+	return boot_error;
 }
 
 cycles_t cacheflush_time;

index 5165b11..4ba5ab2 100644
@@ -702,20 +702,6 @@ void cpu_exit_clear(void)
 }
 #endif
 
-static void __cpuinit __smp_prepare_cpu(int cpu)
-{
-	int	apicid;
-
-	apicid = per_cpu(x86_cpu_to_apicid, cpu);
-
-	/* init low mem mapping */
-	clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
-			min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
-	flush_tlb_all();
-
-	do_boot_cpu(apicid, cpu);
-}
-
 static int boot_cpu_logical_apicid;
 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 void *xquad_portio;

@@ -872,7 +858,12 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 
 	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 
-	__smp_prepare_cpu(cpu);
+	/* init low mem mapping */
+	clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
+			min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
+	flush_tlb_all();
+
+	do_boot_cpu(apicid, cpu);
 
 	/* In case one didn't come up */
 	if (!cpu_isset(cpu, cpu_callin_map)) {

index e8c2c47..f1f7d18 100644
@@ -40,6 +40,8 @@
 #include <asm/io.h>
 #include <asm/mpspec.h>
 
+#include <mach_apic.h>
+
 static int __initdata acpi_force = 0;
 
 #ifdef	CONFIG_ACPI

index 529b1c2..03ef1a8 100644
@@ -30,6 +30,8 @@
 #include <asm/proto.h>
 #include <asm/acpi.h>
 
+#include <mach_apic.h>
+
 /* Have we found an MP table */
 int smp_found_config;
 unsigned int __cpuinitdata maxcpus = NR_CPUS;

index 6978f1b..253be86 100644
@@ -11,6 +11,8 @@
 #include <asm/cpu.h>
 #include <asm/numa.h>
 
+#include <mach_apic.h>
+
 /* Number of siblings per CPU package */
 int smp_num_siblings = 1;
 EXPORT_SYMBOL(smp_num_siblings);

index 7d1b4cb..8a59fa8 100644
@@ -61,6 +61,7 @@
 #include <asm/numa.h>
 
 #include <mach_wakecpu.h>
+#include <mach_apic.h>
 #include <smpboot_hooks.h>
 
 /* Set when the idlers are all forked */