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DDR-II @ MPC8343A

U-Boot-Users Andre Schwarz 3 participants 9 messages Mar 25, 2008

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#0 lore raw

All,

has anyone set up the DDR-II controller on a Freescale MPC8343A without ? As far as I can see there are only DDR-I boards from Freescale.

Are there any patches not yet posted to handle this ?

regards,

Andre Schwarz
Matrix Vision

MATRIX VISION GmbH, Talstra?e 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090 Gesch?ftsf?hrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

#1 lore raw

Hi Andre,

Quoted 4 lines

has anyone set up the DDR-II controller on a Freescale MPC8343A without ? As far as I can see there are only DDR-I boards from Freescale.

Are there any patches not yet posted to handle this ?

Chances are that the MPC8343 DDR controller is much the same as the MPC8349EA controller. Here's a couple of annotated BDI2000 configuration files for the MPC8349E-MDS-PB loaded with 2.5V DDR1, and the MPC8349EA-MDS-PB board loaded with 1.8V DDR2

ftp://www.denx.de/pub/BDI2000/mpc8349e_mds_pb.cfg ftp://www.denx.de/pub/BDI2000/mpc8349ea_mds_pb.cfg

I'm not sure if it'll be of use, just wanted to mention it.

The U-Boot code for the MPC8349 handles both board types transparently. I haven't delved into the code in too much detail, but I think the code is using the SPD EEPROM information to configure the controller appropriately for DDR1 or DDR2 operation. You can probably use that code as a reference to any changes required for your MPC8343 code.

Regards,
Dave

#2 lore raw
In reply to Andre Schwarz
Quoted 3 lines · On Tue, 25 Mar 2008 18:36:47 +0100 Andre Schwarz…

All,

has anyone set up the DDR-II controller on a Freescale MPC8343A without ?

without what?

Quoted 2 lines

As far as I can see there are only DDR-I boards from Freescale.

The MDS can do ddr2:

U-Boot 1.3.2-00097-gbc508d1 (Mar 25 2008 - 10:47:17) MPC83XX

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c1, MPC8349E, Rev: 30 at 528 MHz, CSB:  264 MHz
Board: Freescale MPC8349EMDS
I2C:   ready
SPI:   ready
DRAM:  256 MB (DDR2, 64-bit, ECC on)

...

Quoted 2 lines

Are there any patches not yet posted to handle this ?

should work, only diff I see is that the 8343 is 32-bit only.

Kim

#3 lore raw
Quoted 4 lines · Kim Phillips

On Tue, 25 Mar 2008 18:36:47 +0100
Andre Schwarz <[email protected]> wrote:

Quoted 8 lines
Quoted 4 lines

All,

has anyone set up the DDR-II controller on a Freescale MPC8343A without ?

without what?

typo - sorry.

Quoted 7 lines
Quoted 3 lines

As far as I can see there are only DDR-I boards from Freescale.

The MDS can do ddr2:

U-Boot 1.3.2-00097-gbc508d1 (Mar 25 2008 - 10:47:17) MPC83XX

Quoted 10 lines

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c1, MPC8349E, Rev: 30 at 528 MHz, CSB:  264 MHz
Board: Freescale MPC8349EMDS
I2C:   ready
SPI:   ready
DRAM:  256 MB (DDR2, 64-bit, ECC on)

...

Hmmm ... I get :

U-Boot 1.3.2-00075-gc5f497a-dirty (Mar 25 2008 - 19:55:00) MPC83XX

Reset Status: Check Stop, External/Internal Soft, External/Internal Hard

CPU:   e300c1, MPC8343, Rev: 31 at 399.999 MHz, CSB:  266 MHz
Board: Matrix Vision mvBlueLYNX-M7
I2C:   ready
SPI:   ready
DRAM:  cs0_bnds = 0x0000000f

cs0_config = 0x80844102
DDR:bar=0x00000000
DDR:ar=0x8000001b
256 MB

It's a 32-Bit DDR-II without ECC.
2 Chips are soldered to CS0, i.e. no EPROM present.

Since I expect something like "(DDR2, 32-Bit, ECC off)" and nothing happens there is obviously something wrong with my memory setup. Is this reasonable ?

Or am I simply missing a board specific "board_add_ram_info" ? Am I assuming right that your info string "(DDR2, 64-bit, ECC on)" comes from spd_sdram ?

Quoted 7 lines
Quoted 3 lines

Are there any patches not yet posted to handle this ?

should work, only diff I see is that the 8343 is 32-bit only.

Kim

I'll dig a little deeper now and ask more questions tommorow.

Thanks for your help !

regards,
Andre

MATRIX VISION GmbH, Talstra?e 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090 Gesch?ftsf?hrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
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#4 lore raw
Quoted 37 lines · On Tue, 25 Mar 2008 20:41:41 +0100 Andre Schwarz…
Quoted 9 lines · Kim Phillips
Quoted 3 lines · On Tue, 25 Mar 2008 18:36:47 +0100 Andre Schwarz…

As far as I can see there are only DDR-I boards from Freescale.

The MDS can do ddr2:

U-Boot 1.3.2-00097-gbc508d1 (Mar 25 2008 - 10:47:17) MPC83XX

Quoted 10 lines

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c1, MPC8349E, Rev: 30 at 528 MHz, CSB:  264 MHz
Board: Freescale MPC8349EMDS
I2C:   ready
SPI:   ready
DRAM:  256 MB (DDR2, 64-bit, ECC on)

...

Hmmm ... I get :

U-Boot 1.3.2-00075-gc5f497a-dirty (Mar 25 2008 - 19:55:00) MPC83XX

Reset Status: Check Stop, External/Internal Soft, External/Internal Hard

CPU:   e300c1, MPC8343, Rev: 31 at 399.999 MHz, CSB:  266 MHz
Board: Matrix Vision mvBlueLYNX-M7
I2C:   ready
SPI:   ready
DRAM:  cs0_bnds = 0x0000000f

cs0_config = 0x80844102
DDR:bar=0x00000000
DDR:ar=0x8000001b
256 MB

Quoted 6 lines

It's a 32-Bit DDR-II without ECC.
2 Chips are soldered to CS0, i.e. no EPROM present.

Since I expect something like "(DDR2, 32-Bit, ECC off)" and nothing happens there is obviously something wrong with my memory setup. Is this reasonable ?

sounds like memory isn't being configured correctly. Board specific?

Quoted 1 line

Or am I simply missing a board specific "board_add_ram_info" ?

you can do that if you really, really, really want to see the "(DDR2.." string, but it's optional.

Quoted 2 lines

Am I assuming right that your info string "(DDR2, 64-bit, ECC on)" comes from spd_sdram ?

yes.

Kim

#5 lore raw
Quoted 48 lines · Kim Phillips
Quoted 44 lines · On Tue, 25 Mar 2008 20:41:41 +0100 Andre Schwarz…
Quoted 11 lines · Kim Phillips
Quoted 4 lines · On Tue, 25 Mar 2008 18:36:47 +0100 Andre Schwarz…

As far as I can see there are only DDR-I boards from Freescale.

The MDS can do ddr2:

U-Boot 1.3.2-00097-gbc508d1 (Mar 25 2008 - 10:47:17) MPC83XX

Quoted 11 lines

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c1, MPC8349E, Rev: 30 at 528 MHz, CSB:  264 MHz
Board: Freescale MPC8349EMDS
I2C:   ready
SPI:   ready
DRAM:  256 MB (DDR2, 64-bit, ECC on)

...

Hmmm ... I get :

U-Boot 1.3.2-00075-gc5f497a-dirty (Mar 25 2008 - 19:55:00) MPC83XX

Reset Status: Check Stop, External/Internal Soft, External/Internal Hard

CPU:   e300c1, MPC8343, Rev: 31 at 399.999 MHz, CSB:  266 MHz
Board: Matrix Vision mvBlueLYNX-M7
I2C:   ready
SPI:   ready
DRAM:  cs0_bnds = 0x0000000f

cs0_config = 0x80844102
DDR:bar=0x00000000
DDR:ar=0x8000001b
256 MB

It's a 32-Bit DDR-II without ECC.
2 Chips are soldered to CS0, i.e. no EPROM present.

Quoted 7 lines
Quoted 4 lines

Since I expect something like "(DDR2, 32-Bit, ECC off)" and nothing happens there is obviously something wrong with my memory setup. Is this reasonable ?

sounds like memory isn't being configured correctly. Board specific?

Having a closer look to the boards show that I'm currently using 2 Micron MT47H256M8HG-3 with 2GBit each yielding a total of 512MByte DDR-II memory .... this is sad :-(
Regarding to part list there should have been 1GBit Elpida chips on it.

I've seen things like this in mpc8349emds code :

#if (CFG_DDR_SIZE != 256)
#warning Currenly any ddr size other than 256 is not supported #endif

Is this reasonable ? Why ?

Quoted 8 lines
Quoted 3 lines

Or am I simply missing a board specific "board_add_ram_info" ?

you can do that if you really, really, really want to see the "(DDR2.." string, but it's optional.

I don't want to see it but to understand where it comes from.

Quoted 8 lines
Quoted 3 lines

Am I assuming right that your info string "(DDR2, 64-bit, ECC on)" comes from spd_sdram ?

yes.

Kim

regards,
Andre

MATRIX VISION GmbH, Talstra?e 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090 Gesch?ftsf?hrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
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#6 lore raw
Quoted 8 lines · On Tue, 25 Mar 2008 21:25:45 +0100 Andre Schwarz…

I've seen things like this in mpc8349emds code :

#if (CFG_DDR_SIZE != 256)
#warning Currenly any ddr size other than 256 is not supported #endif

Is this reasonable ? Why ?

that's in the fixed sdram init code, which could be considered reasonably unreasonable by some I suppose, since we can't guarantee the fixed settings will work with whatever memory you decide to use with it. It should work with the memory that comes with the board, though.

btw, the spd code is being used by default on the 834x mds, not this fixed_sdram stuff - it's mostly there for board porting completeness.

Kim

#7 lore raw
Quoted 10 lines · Kim Phillips
Quoted 6 lines · On Tue, 25 Mar 2008 21:25:45 +0100 Andre Schwarz…

I've seen things like this in mpc8349emds code :

#if (CFG_DDR_SIZE != 256)
#warning Currenly any ddr size other than 256 is not supported #endif

Quoted 8 lines
Quoted 3 lines

Is this reasonable ? Why ?

that's in the fixed sdram init code, which could be considered reasonably unreasonable by some I suppose, since we can't guarantee the fixed settings will work with whatever memory you decide to use with it. It should work with the memory that comes with the board, though.

fixed_sdram is ok - that's what I have and want to use. I'm setting up the proper CFG_DDR_ defines in my header regarding the Manufacturer's spec.

Quoted 4 lines

btw, the spd code is being used by default on the 834x mds, not this fixed_sdram stuff - it's mostly there for board porting completeness.

But it is known to work, isn't it ?

Quoted 2 lines

Kim

regards,
Andre

MATRIX VISION GmbH, Talstra?e 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090 Gesch?ftsf?hrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
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#8 lore raw
Quoted 6 lines · On Tue, 25 Mar 2008 21:54:53 +0100 Andre Schwarz…
Quoted 4 lines · Kim Phillips

btw, the spd code is being used by default on the 834x mds, not this fixed_sdram stuff - it's mostly there for board porting completeness.

But it is known to work, isn't it ?

I haven't tested it recently. Patches welcome if it doesn't.

Kim