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- Increase max physical memory size of x86_64

PATCH Applied Jack Steiner 4 participants 7 messages Mar 21, 2008 – Mar 27, 2008 Memory management

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Jack Steiner

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#0 lore raw

PATCH 1/1 - Increase max physical memory size of x86_64

Increase the maximum physical address size of x86_64 system to 44-bits. This is in preparation for future chips that support larger physical memory sizes.

Signed-off-by Jack Steiner <[email protected]>
---
 include/asm-x86/sparsemem.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
include/asm-x86/sparsemem.h +2 -2
Index: linux/include/asm-x86/sparsemem.h
===================================================================
@@ -26,8 +26,8 @@
 # endif
 #else /* CONFIG_X86_32 */
 # define SECTION_SIZE_BITS	27 /* matt - 128 is convenient right now */
-# define MAX_PHYSADDR_BITS	40
-# define MAX_PHYSMEM_BITS	40
+# define MAX_PHYSADDR_BITS	44
+# define MAX_PHYSMEM_BITS	44
 #endif
 
 #endif /* CONFIG_SPARSEMEM */

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#2 lore raw
In reply to Jack Steiner
Quoted 3 lines · Jack Steiner

Increase the maximum physical address size of x86_64 system to 44-bits. This is in preparation for future chips that support larger physical memory sizes.

Shouldn't this be increased to 48?
AMD family 10h CPUs actually support 48 bits for the physical address.

Regards,

Andreas

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#3 lore raw
Quoted 8 lines · Andreas Herrmann
Quoted 3 lines · Jack Steiner

Increase the maximum physical address size of x86_64 system to 44-bits. This is in preparation for future chips that support larger physical memory sizes.

Shouldn't this be increased to 48?
AMD family 10h CPUs actually support 48 bits for the physical address.

You are probably correct but I don't work with AMD processors and don't understand their requirements. If someone wants to submit a patch to support larger phys memory sizes, I certainly have no objections....

--- jack

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#4 lore raw
Quoted 5 lines · Jack Steiner
Quoted 4 lines · Andreas Herrmann
Quoted 3 lines · Jack Steiner

Increase the maximum physical address size of x86_64 system to 44-bits. This is in preparation for future chips that support larger physical memory sizes.

Quoted 8 lines
Quoted 3 lines

Shouldn't this be increased to 48?
AMD family 10h CPUs actually support 48 bits for the physical address.

You are probably correct but I don't work with AMD processors and don't understand their requirements. If someone wants to submit a patch to support larger phys memory sizes, I certainly have no objections....

The only advantage 44 bits has over 48 bits is that it allows us to uniquely identify 4k physical pages with 32 bits, potentially allowing for tighter packing of certain structures. Do we have any code that does this, and if so, is it a worthwhile optimization?

Personally, I think we should support the full capability of the hardware, but I don't have a 17 TB Opteron box to test with.

-- Chris

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#5 lore raw
Quoted 14 lines · Chris Snook
Quoted 5 lines · Jack Steiner
Quoted 4 lines · Andreas Herrmann
Quoted 3 lines · Jack Steiner

Increase the maximum physical address size of x86_64 system to 44-bits. This is in preparation for future chips that support larger physical memory sizes.

Quoted 7 lines
Quoted 3 lines

Shouldn't this be increased to 48?
AMD family 10h CPUs actually support 48 bits for the physical address.

You are probably correct but I don't work with AMD processors and don't understand their requirements. If someone wants to submit a patch to support larger phys memory sizes, I certainly have no objections....

Quoted 4 lines

The only advantage 44 bits has over 48 bits is that it allows us to uniquely identify 4k physical pages with 32 bits, potentially allowing for tighter packing of certain structures. Do we have any code that does this, and if so, is it a worthwhile optimization?

I've checked where those defines are used. If I didn't miss something MAX_PHYSADDR_BITS isn't used at all on x86 and MAX_PHYSMEM_BITS is used (directly or indirectly) in several other macros.

But basically it's just section_to_node_table which would increase to 2 or 4 MB depending on MAX_NUMNODES. Using 44 bits this table is just 128 kB resp. 256 kB in size.

Quoted 2 lines

Personally, I think we should support the full capability of the hardware, but I don't have a 17 TB Opteron box to test with.

I don't have one either.
By adjusting some NB-registers it might be possible to configure physical addresses larger than 40 or 44 bits though. (Even if the machine has not more than 1 or 16 TB.) I'll verify whether this is really possible.

At the moment I think it's best to leave the define as is (44 or 40 bit) as there is currently no practical benefit from increasing it to 48 bit.

Regards,

Andreas

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author
#6 lore raw
Quoted 37 lines · Andreas Herrmann
Quoted 14 lines · Chris Snook
Quoted 5 lines · Jack Steiner
Quoted 4 lines · Andreas Herrmann
Quoted 3 lines · Jack Steiner

Increase the maximum physical address size of x86_64 system to 44-bits. This is in preparation for future chips that support larger physical memory sizes.

Quoted 7 lines
Quoted 3 lines

Shouldn't this be increased to 48?
AMD family 10h CPUs actually support 48 bits for the physical address.

You are probably correct but I don't work with AMD processors and don't understand their requirements. If someone wants to submit a patch to support larger phys memory sizes, I certainly have no objections....

Quoted 4 lines

The only advantage 44 bits has over 48 bits is that it allows us to uniquely identify 4k physical pages with 32 bits, potentially allowing for tighter packing of certain structures. Do we have any code that does this, and if so, is it a worthwhile optimization?

I've checked where those defines are used. If I didn't miss something MAX_PHYSADDR_BITS isn't used at all on x86 and MAX_PHYSMEM_BITS is used (directly or indirectly) in several other macros.

But basically it's just section_to_node_table which would increase to 2 or 4 MB depending on MAX_NUMNODES. Using 44 bits this table is just 128 kB resp. 256 kB in size.

Quoted 2 lines

Personally, I think we should support the full capability of the hardware, but I don't have a 17 TB Opteron box to test with.

I don't have one either.
By adjusting some NB-registers it might be possible to configure physical addresses larger than 40 or 44 bits though. (Even if the machine has not more than 1 or 16 TB.) I'll verify whether this is really possible.

Quoted 3 lines

At the moment I think it's best to leave the define as is (44 or 40 bit) as there is currently no practical benefit from increasing it to 48 bit.

Sounds reasonable to me (44 bits). Let someone with access to new hardware verify that changing to 48 actually works.

--- jack

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