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CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

PATCH In review Jochen Friedrich 4 participants 22 messages Apr 18, 2008 – Jul 28, 2008 PowerPC

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Jochen Friedrich

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#0 lore raw

PATCH v2 1/2 CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by Jochen Friedrich <[email protected]>
Cc Laurent Pinchart <[email protected]>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)

Changes from version 1:

- conditionally include #include <linux/of_gpio.h> in cpm_common.c, so it compiles when GPIO on 8xx is not selected.

arch/powerpc/platforms/Kconfig +2 -0
index f6eecd1..78911f6 100644
@@ -283,6 +283,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
arch/powerpc/sysdev/cpm2.c +11 -0
index 5a6c5df..9311778 100644
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
arch/powerpc/sysdev/cpm_common.c +123 -0

138 lines not on this page · raw message

include/asm-powerpc/cpm.h +3 -0
index ede38ff..23b72ee 100644
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */

@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
Signature · 1 line
1.5.5
#1 lore raw
Quoted 6 lines · Jochen Friedrich

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by Jochen Friedrich <[email protected]>
Cc Laurent Pinchart <[email protected]>
Signed-off-by Laurent Pinchart <[email protected]>

Is there any showstopper or can this one be applied to powerpc-next ?

Quoted 208 lines
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)

Changes from version 1:

- conditionally include #include <linux/of_gpio.h> in cpm_common.c, so it compiles when GPIO on 8xx is not selected.

arch/powerpc/platforms/Kconfig +2 -0
index f6eecd1..78911f6 100644
@@ -283,6 +283,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
arch/powerpc/sysdev/cpm2.c +11 -0
index 5a6c5df..9311778 100644
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
arch/powerpc/sysdev/cpm_common.c +123 -0
index cb7df2d..43bac6e 100644
@@ -19,6 +19,8 @@
 
 #include <linux/init.h>
 #include <linux/of_device.h>
+#include <linux/spinlock.h>
+#include <linux/of.h>
 
 #include <asm/udbg.h>
 #include <asm/io.h>

@@ -28,6 +30,10 @@
 
 #include <mm/mmu_decl.h>
 
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+#include <linux/of_gpio.h>
+#endif
+
 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
 static u32 __iomem *cpm_udbg_txdesc =
 	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;

@@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
 	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
 }
 EXPORT_SYMBOL(cpm_muram_dma);
+
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+
+struct cpm2_gpio32_chip {
+	struct of_mm_gpio_chip mm_gc;
+	spinlock_t lock;
+
+	/* shadowed data register to clear/set bits safely */
+	u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+
+	cpm2_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	unsigned long flags;
+	u32 pin_mask = 1 << (31 - gpio);
+
+	spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+	if (value)
+		cpm2_gc->cpdata |= pin_mask;
+	else
+		cpm2_gc->cpdata &= ~pin_mask;
+
+	out_be32(&iop->dat, cpm2_gc->cpdata);
+
+	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	setbits32(&iop->dir, pin_mask);
+
+	cpm2_gpio32_set(gc, gpio, val);
+
+	return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	clrbits32(&iop->dir, pin_mask);
+
+	return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+	struct cpm2_gpio32_chip *cpm2_gc;
+	struct of_mm_gpio_chip *mm_gc;
+	struct of_gpio_chip *of_gc;
+	struct gpio_chip *gc;
+
+	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
+	if (!cpm2_gc)
+		return -ENOMEM;
+
+	spin_lock_init(&cpm2_gc->lock);
+
+	mm_gc = &cpm2_gc->mm_gc;
+	of_gc = &mm_gc->of_gc;
+	gc = &of_gc->gc;
+
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 1;
+	gc->ngpio = 32;
+	gc->direction_input = cpm2_gpio32_dir_in;
+	gc->direction_output = cpm2_gpio32_dir_out;
+	gc->get = cpm2_gpio32_get;
+	gc->set = cpm2_gpio32_set;
+
+	return of_mm_gpiochip_add(np, mm_gc);
+}
+#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
include/asm-powerpc/cpm.h +3 -0
index ede38ff..23b72ee 100644
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */

@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
Signature · 9 lines
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
#2 lore raw
Quoted 11 lines · Laurent Pinchart
Quoted 6 lines · Jochen Friedrich

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by Jochen Friedrich <[email protected]>
Cc Laurent Pinchart <[email protected]>
Signed-off-by Laurent Pinchart <[email protected]>

Is there any showstopper or can this one be applied to powerpc-next ?

One comment below.

[...]

Quoted 2 lines

arch/powerpc/sysdev/cpm_common.c dma_addr_t cpm_muram_dma(void __iomem *addr) · line 314

Quoted 2 lines
arch/powerpc/sysdev/cpm_common.c +2 -0
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 1;

I would strongly suggest to use gpio_cells = 2, otherwise you will not able to pass GPIO flags (such as active-low etc) without breaking the compatibility with older trees.

Signature · 3 lines
Anton Vorontsov
email: [email protected]
irc://irc.freenode.net/bd2
#3 lore raw
Quoted 15 lines · Anton Vorontsov
Quoted 11 lines · Laurent Pinchart
Quoted 6 lines · Jochen Friedrich

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by Jochen Friedrich <[email protected]>
Cc Laurent Pinchart <[email protected]>
Signed-off-by Laurent Pinchart <[email protected]>

Is there any showstopper or can this one be applied to powerpc-next ?

One comment below.

Quoted 7 lines

[...]

Quoted 2 lines

arch/powerpc/sysdev/cpm_common.c dma_addr_t cpm_muram_dma(void __iomem *addr) · line 314

Quoted 2 lines
arch/powerpc/sysdev/cpm_common.c +2 -0
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 1;

I would strongly suggest to use gpio_cells = 2, otherwise you will not able to pass GPIO flags (such as active-low etc) without breaking the compatibility with older trees.

Agreed. Jochen, will you resubmit or should I do it ?

Signature · 9 lines
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
author
#4 lore raw

Hi Laurent,

Quoted 3 lines

Agreed. Jochen, will you resubmit or should I do it ?

Please do as i'm currently away and won't be back until next week.

Thanks,
Jochen

#5 lore raw

PATCH v3 1/2 CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

Based on earlier work by Jochen Friedrich.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)
arch/powerpc/platforms/Kconfig +2 -0
index 87454c5..7e67e26 100644
@@ -280,6 +280,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
arch/powerpc/sysdev/cpm2.c +11 -0
index 5a6c5df..9311778 100644
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
arch/powerpc/sysdev/cpm_common.c +123 -0

138 lines not on this page · raw message

include/asm-powerpc/cpm.h +3 -0
index ede38ff..23b72ee 100644
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */

@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
Signature · 12 lines
1.5.0

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
#6 lore raw
Quoted 3 lines · Laurent Pinchart

Based on earlier work by Jochen Friedrich.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Is there any pending issue or can this be applied to powerpc-next ?

Quoted 208 lines
Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)
arch/powerpc/platforms/Kconfig +2 -0
index 87454c5..7e67e26 100644
@@ -280,6 +280,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
arch/powerpc/sysdev/cpm2.c +11 -0
index 5a6c5df..9311778 100644
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
arch/powerpc/sysdev/cpm_common.c +123 -0
index cb7df2d..b957a48 100644
@@ -19,6 +19,8 @@
 
 #include <linux/init.h>
 #include <linux/of_device.h>
+#include <linux/spinlock.h>
+#include <linux/of.h>
 
 #include <asm/udbg.h>
 #include <asm/io.h>

@@ -28,6 +30,10 @@
 
 #include <mm/mmu_decl.h>
 
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+#include <linux/of_gpio.h>
+#endif
+
 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
 static u32 __iomem *cpm_udbg_txdesc =
 	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;

@@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
 	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
 }
 EXPORT_SYMBOL(cpm_muram_dma);
+
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+
+struct cpm2_gpio32_chip {
+	struct of_mm_gpio_chip mm_gc;
+	spinlock_t lock;
+
+	/* shadowed data register to clear/set bits safely */
+	u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+
+	cpm2_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	unsigned long flags;
+	u32 pin_mask = 1 << (31 - gpio);
+
+	spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+	if (value)
+		cpm2_gc->cpdata |= pin_mask;
+	else
+		cpm2_gc->cpdata &= ~pin_mask;
+
+	out_be32(&iop->dat, cpm2_gc->cpdata);
+
+	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	setbits32(&iop->dir, pin_mask);
+
+	cpm2_gpio32_set(gc, gpio, val);
+
+	return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	clrbits32(&iop->dir, pin_mask);
+
+	return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+	struct cpm2_gpio32_chip *cpm2_gc;
+	struct of_mm_gpio_chip *mm_gc;
+	struct of_gpio_chip *of_gc;
+	struct gpio_chip *gc;
+
+	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
+	if (!cpm2_gc)
+		return -ENOMEM;
+
+	spin_lock_init(&cpm2_gc->lock);
+
+	mm_gc = &cpm2_gc->mm_gc;
+	of_gc = &mm_gc->of_gc;
+	gc = &of_gc->gc;
+
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 2;
+	gc->ngpio = 32;
+	gc->direction_input = cpm2_gpio32_dir_in;
+	gc->direction_output = cpm2_gpio32_dir_out;
+	gc->get = cpm2_gpio32_get;
+	gc->set = cpm2_gpio32_set;
+
+	return of_mm_gpiochip_add(np, mm_gc);
+}
+#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
include/asm-powerpc/cpm.h +3 -0
index ede38ff..23b72ee 100644
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */

@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
Signature · 1 line
1.5.0
Signature · 9 lines
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
#8 lore raw
Quoted 9 lines · Jochen Friedrich

Hi Laurent,

Quoted 1 line

Is there any pending issue or can this be applied to powerpc-next ?

Looks OK to me.

Quoted 2 lines
Quoted 2 lines
Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
Acked-by Jochen Friedrich <[email protected]>

Any news on this patch ? Kumar, could you apply it to your tree for 2.6.27 ?

Best regards,

Signature · 9 lines
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
#9 lore raw
Quoted 5 lines · Laurent Pinchart
Quoted 4 lines · Jochen Friedrich

Hi Laurent,

Quoted 1 line

Is there any pending issue or can this be applied to powerpc-next ?

Quoted 7 lines
Quoted 5 lines

Looks OK to me.

Quoted 2 lines
Quoted 2 lines
Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
Acked-by Jochen Friedrich <[email protected]>

Any news on this patch ? Kumar, could you apply it to your tree for 2.6.27 ?

Can you repost it. I not sure what patch 2/2 was and if I've already dealt with it.

- k

#10 lore raw
Quoted 12 lines · Kumar Gala
Quoted 9 lines · Laurent Pinchart
Quoted 8 lines · Jochen Friedrich

Hi Laurent,

Quoted 1 line

Is there any pending issue or can this be applied to powerpc-next ?

Looks OK to me.

Quoted 2 lines
Quoted 2 lines
Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
Acked-by Jochen Friedrich <[email protected]>

Any news on this patch ? Kumar, could you apply it to your tree for 2.6.27 ?

Can you repost it. I not sure what patch 2/2 was and if I've already dealt with it.

2/2 was "[PATCH2/2] [POWERPC] CPM1: implement GPIO LIB API on CPM1 Freescale SoC." posted by Jochen Friedrich. You haven't dealt with it yet as far as I know, but it would be up to Jochen to resubmit.

The "PATCHv3 1/2" patch can be considered as-is, as it doesn't depend on 2/2. Should I resubmit a "PATCHv4" that just changes the subject line ?

Signature · 9 lines
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
#11 lore raw
Quoted 15 lines · Laurent Pinchart
Quoted 14 lines · Kumar Gala
Quoted 11 lines · Laurent Pinchart
Quoted 9 lines · Jochen Friedrich

Hi Laurent,

Quoted 1 line

Is there any pending issue or can this be applied to powerpc-next ?

Looks OK to me.

Quoted 2 lines
Quoted 2 lines
Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
Acked-by Jochen Friedrich <[email protected]>
Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

Any news on this patch ? Kumar, could you apply it to your tree for 2.6.27 ?

Can you repost it. I not sure what patch 2/2 was and if I've already dealt with it.

2/2 was "[PATCH2/2] [POWERPC] CPM1: implement GPIO LIB API on CPM1 Freescale SoC." posted by Jochen Friedrich. You haven't dealt with it yet as far as I know, but it would be up to Jochen to resubmit.

Since it sounds like CPM1 and CPM2 gpio are different I'd like a new patch. I'll send comments on v3.

Quoted 1 line

The "PATCHv3 1/2" patch can be considered as-is, as it doesn't depend on 2/2. Should I resubmit a "PATCHv4" that just changes the subject line ?

You can generate a v4 w/my desired changes.

- k

#12 lore raw
In reply to Laurent Pinchart

arch/powerpc/sysdev/cpm_common.c dma_addr_t cpm_muram_dma(void __iomem *addr) · line 214

Quoted 7 lines · Laurent Pinchart
arch/powerpc/sysdev/cpm_common.c +7 -0
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+

is this really common for both CPM2 and 8xx? if so why the name?

- k

author
#13 lore raw

Hi Kumar,

Quoted 11 lines · Laurent Pinchart

arch/powerpc/sysdev/cpm_common.c dma_addr_t cpm_muram_dma(void __iomem *addr) · line 214

Quoted 8 lines
arch/powerpc/sysdev/cpm_common.c +7 -0
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+

is this really common for both CPM2 and 8xx? if so why the name?

It is common to CPM2 and Port E of CPM1.

Thanks,
Jochen

#14 lore raw
Quoted 14 lines · Jochen Friedrich

Hi Kumar,

Quoted 11 lines · Laurent Pinchart

arch/powerpc/sysdev/cpm_common.c dma_addr_t cpm_muram_dma(void __iomem *addr) · line 214

Quoted 8 lines
arch/powerpc/sysdev/cpm_common.c +7 -0
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+

is this really common for both CPM2 and 8xx? if so why the name?

Quoted 1 line

It is common to CPM2 and Port E of CPM1.

but ports a-d are different on cpm1? I guess I'd like to see both patches to understand the commonality and differences.

- k

#16 lore raw
In reply to Kumar Gala

Hi Kumar,

Quoted 13 lines · Kumar Gala
Quoted 12 lines · Jochen Friedrich
Quoted 11 lines · Laurent Pinchart

arch/powerpc/sysdev/cpm_common.c dma_addr_t cpm_muram_dma(void __iomem *addr) · line 214

Quoted 8 lines
arch/powerpc/sysdev/cpm_common.c +7 -0
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+

is this really common for both CPM2 and 8xx? if so why the name?

Quoted 4 lines
Quoted 1 line

It is common to CPM2 and Port E of CPM1.

but ports a-d are different on cpm1? I guess I'd like to see both patches to understand the commonality and differences.

As Jorgen mentionned, both patches are still in patchwork:

http://patchwork.ozlabs.org/linuxppc/patch?id=19045
http://patchwork.ozlabs.org/linuxppc/patch?id=19386

Would it be possible for you to review them in time for 2.6.27 ?

Signature · 9 lines
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
#17 lore raw
Quoted 21 lines · Laurent Pinchart

Hi Kumar,

Quoted 13 lines · Kumar Gala
Quoted 12 lines · Jochen Friedrich
Quoted 11 lines · Laurent Pinchart

arch/powerpc/sysdev/cpm_common.c dma_addr_t cpm_muram_dma(void __iomem *addr) · line 214

Quoted 8 lines
arch/powerpc/sysdev/cpm_common.c +7 -0
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+

is this really common for both CPM2 and 8xx? if so why the name?

Quoted 4 lines
Quoted 1 line

It is common to CPM2 and Port E of CPM1.

but ports a-d are different on cpm1? I guess I'd like to see both patches to understand the commonality and differences.

Quoted 6 lines

As Jorgen mentionned, both patches are still in patchwork:

http://patchwork.ozlabs.org/linuxppc/patch?id=19045
http://patchwork.ozlabs.org/linuxppc/patch?id=19386

Would it be possible for you to review them in time for 2.6.27 ?

Yes. Can you resend the first patch and add some details in the commit message about the fact we can also use this code for 8xx/CPM1 port E.

- k

#18 lore raw

PATCH v4 1/1 cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

This patch implement GPIO LIB support for the CPM2 GPIOs. The code can also be used for CPM1 GPIO port E, as both cores are compatible at the register level.

Based on earlier work by Jochen Friedrich.

Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)
arch/powerpc/platforms/Kconfig +2 -0
index 87454c5..7e67e26 100644
@@ -280,6 +280,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
arch/powerpc/sysdev/cpm2.c +11 -0
index 5a6c5df..9311778 100644
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
arch/powerpc/sysdev/cpm_common.c +123 -0

138 lines not on this page · raw message

include/asm-powerpc/cpm.h +3 -0
index ede38ff..23b72ee 100644
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */

@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
Signature · 12 lines
1.5.0

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
#19 lore raw

Re: [PATCHv4] cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

Quoted 7 lines · Laurent Pinchart

This patch implement GPIO LIB support for the CPM2 GPIOs. The code can also be used for CPM1 GPIO port E, as both cores are compatible at the register level.

Based on earlier work by Jochen Friedrich.

Signed-off-by Laurent Pinchart <[email protected]>
Cc Jochen Friedrich <[email protected]>
Quoted 7 lines

---

arch/powerpc/platforms/Kconfig   |    2 +
arch/powerpc/sysdev/cpm2.c       |   11 ++++
arch/powerpc/sysdev/cpm_common.c |  123 +++++++++++++++++++++++++++++ 
+++++++++
include/asm-powerpc/cpm.h        |    3 +
4 files changed, 139 insertions(+), 0 deletions(-)

I'm having similar mailer issues with this patch.

- k

#20 lore raw

Re: [PATCHv4] cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by Jochen Friedrich <[email protected]>
Cc Laurent Pinchart <[email protected]>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)
arch/powerpc/platforms/Kconfig +2 -0
index 87454c5..7e67e26 100644
@@ -280,6 +280,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
arch/powerpc/sysdev/cpm2.c +11 -0
index 5a6c5df..9311778 100644
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
arch/powerpc/sysdev/cpm_common.c +123 -0

138 lines not on this page · raw message

include/asm-powerpc/cpm.h +3 -0
index ede38ff..23b72ee 100644
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */

@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
Signature · 12 lines
1.5.0

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
Applied
#21 lore raw

Re: [PATCHv4] cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

Quoted 6 lines · Laurent Pinchart

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by Jochen Friedrich <[email protected]>
Cc Laurent Pinchart <[email protected]>
Quoted 7 lines

---

arch/powerpc/platforms/Kconfig   |    2 +
arch/powerpc/sysdev/cpm2.c       |   11 ++++
arch/powerpc/sysdev/cpm_common.c |  123 +++++++++++++++++++++++++++++ 
+++++++++
include/asm-powerpc/cpm.h        |    3 +
4 files changed, 139 insertions(+), 0 deletions(-)

applied.

- k