Add PPC_FEATURE_PMU_COMPAT
PATCH 1/1 Add PPC_FEATURE_PMU_COMPAT
Beginning with Power6, there is a set of 32 PMU events which is compatible across POWER processor lines. PPC_FEATURE_PMU_COMPAT indicates support for this subset.
--- arch/powerpc/kernel/cputable.c | 4 ++-- include/asm-powerpc/cputable.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-)
arch/powerpc/kernel/cputable.c +2 -2
@@ -70,10 +70,10 @@ extern void __restore_cpu_power7(void); PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ - PPC_FEATURE_TRUE_LE) + PPC_FEATURE_TRUE_LE | PPC_FEATURE_PMU_COMPAT)#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ - PPC_FEATURE_TRUE_LE) + PPC_FEATURE_TRUE_LE | PPC_FEATURE_PMU_COMPAT)#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ PPC_FEATURE_TRUE_LE | \ PPC_FEATURE_HAS_ALTIVEC_COMP)
include/asm-powerpc/cputable.h +1 -0
@@ -26,6 +26,7 @@#define PPC_FEATURE_POWER6_EXT 0x00000200#define PPC_FEATURE_ARCH_2_06 0x00000100#define PPC_FEATURE_HAS_VSX 0x00000080 +#define PPC_FEATURE_PMU_COMPAT 0x00000040#define PPC_FEATURE_TRUE_LE 0x00000002#define PPC_FEATURE_PPC_LE 0x00000001
Signature · 1 line
1.5.5.1
Quoted 9 lines · Nathan Lynch
Beginning with Power6, there is a set of 32 PMU events which is compatible across POWER processor lines.
PPC_FEATURE_PMU_COMPATindicates support for this subset.Signed-off-by Nathan Lynch <[email protected]>---
arch/powerpc/kernel/cputable.c | 4 ++-- include/asm-powerpc/cputable.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-)
Can you explain what these PMU events are a bit further?
- k
Quoted 7 lines · Kumar Gala
Quoted 4 lines · Nathan Lynch
Beginning with Power6, there is a set of 32 PMU events which is compatible across POWER processor lines.
PPC_FEATURE_PMU_COMPATindicates support for this subset.
Quoted 7 lines
Quoted 5 lines
Signed-off-by Nathan Lynch <[email protected]>---
arch/powerpc/kernel/cputable.c | 4 ++-- include/asm-powerpc/cputable.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-)Can you explain what these PMU events are a bit further?
Maynard, can you help out here...? :)
Quoted 15 lines · Nathan Lynch
Quoted 13 lines · Kumar Gala
Quoted 10 lines · Nathan Lynch
Beginning with Power6, there is a set of 32 PMU events which is compatible across POWER processor lines.
PPC_FEATURE_PMU_COMPATindicates support for this subset.Signed-off-by Nathan Lynch <[email protected]>---
arch/powerpc/kernel/cputable.c | 4 ++-- include/asm-powerpc/cputable.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-)
Quoted 5 lines
Quoted 2 lines
Can you explain what these PMU events are a bit further?
Maynard, can you help out here...? :)
As of POWER6, a set of 32 common events were defined that must be supported on all future POWER processors -- aka "PMU compat set". The main impetus for this compat set is the need to support partition migration, especially from processor P(n) to processor P(n+1), where performance software that's running in the new partition may not be knowledgeable about processor P(n+1). If a performance tool determines it does not support the physical processor, but is told (via the PPC_FEATURE_PMU_COMPAT bit) that the processor supports the notion of the PMU compat set, then the performance tool can surface just those events to the user of the tool.
Hope that helps.
-Maynard
Quoted 3 lines · Nathan Lynch
Beginning with Power6, there is a set of 32 PMU events which is compatible across POWER processor lines.
PPC_FEATURE_PMU_COMPATindicates support for this subset.
The PMU isn't, as far as I know, part of the architecture, it's up to each implementation to do as it pleases. Right? So this should probably be named less generic.
-Olof
Quoted 9 lines · Olof Johansson
Quoted 3 lines · Nathan Lynch
Beginning with Power6, there is a set of 32 PMU events which is compatible across POWER processor lines.
PPC_FEATURE_PMU_COMPATindicates support for this subset.The PMU isn't, as far as I know, part of the architecture, it's up to each implementation to do as it pleases. Right? So this should probably be named less generic.
Yeah, you're right. Will change it to PSERIES_PMU_COMPAT or similar.
PATCH v2 1/1 Add PPC_FEATURE_PSERIES_PMU_COMPAT
In reply to Nathan LynchBackground from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be supported on all future POWER processors. The main impetus for this compat set is the need to support partition migration, especially from processor P(n) to processor P(n+1), where performance software that's running in the new partition may not be knowledgeable about processor P(n+1). If a performance tool determines it does not support the physical processor, but is told (via the PPC_FEATURE_PSERIES_PMU_COMPAT bit) that the processor supports the notion of the PMU compat set, then the performance tool can surface just those events to the user of the tool.
PPC_FEATURE_PSERIES_PMU_COMPAT indicates that the PMU supports at least this basic subset of events which is compatible across POWER processor lines.
---
Changes since v1:
- make name of feature bit less generic
- provide more complete changelog
arch/powerpc/kernel/cputable.c | 6 ++++-- include/asm-powerpc/cputable.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-)
arch/powerpc/kernel/cputable.c +4 -2
@@ -70,10 +70,12 @@ extern void __restore_cpu_power7(void); PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ - PPC_FEATURE_TRUE_LE) + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_PSERIES_PMU_COMPAT)#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ - PPC_FEATURE_TRUE_LE) + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_PSERIES_PMU_COMPAT)#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ PPC_FEATURE_TRUE_LE | \ PPC_FEATURE_HAS_ALTIVEC_COMP)
include/asm-powerpc/cputable.h +1 -0
@@ -26,6 +26,7 @@#define PPC_FEATURE_POWER6_EXT 0x00000200#define PPC_FEATURE_ARCH_2_06 0x00000100#define PPC_FEATURE_HAS_VSX 0x00000080 +#define PPC_FEATURE_PSERIES_PMU_COMPAT 0x00000040#define PPC_FEATURE_TRUE_LE 0x00000002#define PPC_FEATURE_PPC_LE 0x00000001
Signature · 1 line
1.5.6.2
Re: [PATCH v2] Add PPC_FEATURE_PSERIES_PMU_COMPAT
Quoted 12 lines · Nathan Lynch
Background from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be supported on all future POWER processors. The main impetus for this compat set is the need to support partition migration, especially from processor P(n) to processor P(n+1), where performance software that's running in the new partition may not be knowledgeable about processor P(n+1). If a performance tool determines it does not support the physical processor, but is told (via thePPC_FEATURE_PSERIES_PMU_COMPATbit) that the processor supports the notion of the PMU compat set, then the performance tool can surface just those events to the user of the tool.
Quoted 6 lines
PPC_FEATURE_PSERIES_PMU_COMPATindicates that the PMU supports at least this basic subset of events which is compatible across POWER processor lines.Signed-off-by Nathan Lynch <[email protected]>---
So is PMU here performance monitor unit? I think that was part of my confusion earlier. I was thinking Power Mgmt Unit (like on Apple HW).
I hate make the name longer, but PPC_FEATURE_PSERIES_PERFMON_COMPAT would probably be clearer.
- k
Re: [PATCH v2] Add PPC_FEATURE_PSERIES_PMU_COMPAT
Quoted 3 lines · Kumar Gala
So is PMU here performance monitor unit? I think that was part of my confusion earlier. I was thinking Power Mgmt Unit (like on Apple HW).
Yes, PMU means performance monitor unit in the context of pseries.
Quoted 2 lines
I hate make the name longer, but
PPC_FEATURE_PSERIES_PERFMON_COMPATwould probably be clearer.
Okay.
PATCH v3 1/1 Add PPC_FEATURE_PSERIES_PERFMON_COMPAT
In reply to Nathan LynchBackground from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be supported on all future POWER processors. The main impetus for this compat set is the need to support partition migration, especially from processor P(n) to processor P(n+1), where performance software that's running in the new partition may not be knowledgeable about processor P(n+1). If a performance tool determines it does not support the physical processor, but is told (via the PPC_FEATURE_PSERIES_PERFMON_COMPAT bit) that the processor supports the notion of the PMU compat set, then the performance tool can surface just those events to the user of the tool.
PPC_FEATURE_PSERIES_PERFMON_COMPAT indicates that the PMU supports at least this basic subset of events which is compatible across POWER processor lines.
---
Changes since v2:
- Further disambiguated name of feature bit (PMU -> PERFMON)
Changes since v1:
- make name of feature bit less generic
- provide more complete changelog
arch/powerpc/kernel/cputable.c | 6 ++++-- include/asm-powerpc/cputable.h | 3 +++ 2 files changed, 7 insertions(+), 2 deletions(-)
arch/powerpc/kernel/cputable.c +4 -2
@@ -70,10 +70,12 @@ extern void __restore_cpu_power7(void); PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ - PPC_FEATURE_TRUE_LE) + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_PSERIES_PERFMON_COMPAT)#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ - PPC_FEATURE_TRUE_LE) + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_PSERIES_PERFMON_COMPAT)#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ PPC_FEATURE_TRUE_LE | \ PPC_FEATURE_HAS_ALTIVEC_COMP)
include/asm-powerpc/cputable.h +3 -0
@@ -27,6 +27,9 @@#define PPC_FEATURE_ARCH_2_06 0x00000100#define PPC_FEATURE_HAS_VSX 0x00000080 +#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \ + 0x00000040 +#define PPC_FEATURE_TRUE_LE 0x00000002#define PPC_FEATURE_PPC_LE 0x00000001
Signature · 1 line
1.5.6.2