x86_64: add pseudo-features for 32-bit compat syscall

Add pseudo-feature bits to describe whether the CPU supports sysenter and/or syscall from ia32-compat userspace. This removes a hardcoded test in vdso32-setup.

---

arch/x86/kernel/cpu/centaur_64.c |    2 ++
arch/x86/kernel/cpu/common_64.c  |    3 +++
arch/x86/kernel/cpu/intel_64.c   |    2 ++
include/asm-x86/cpufeature.h     |    4 ++--
4 files changed, 9 insertions(+), 2 deletions(-)

===================================================================

@@ -10,6 +10,8 @@ static void __cpuinit early_init_centaur

{
	if (c->x86 == 0x6 && c->x86_model >= 0xf)
		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

+
+ set_cpu_cap(c, X86_FEATURE_SYSENTER32);
}

static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
===================================================================

@@ -315,6 +315,9 @@ static void __cpuinit early_identify_cpu

	if (c->extended_cpuid_level >= 0x80000007)
		c->x86_power = cpuid_edx(0x80000007);

+ /* Assume all 64-bit CPUs support 32-bit syscall */
+ set_cpu_cap(c, X86_FEATURE_SYSCALL32);
+

	if (c->x86_vendor != X86_VENDOR_UNKNOWN &&
	    cpu_devs[c->x86_vendor]->c_early_init)
		cpu_devs[c->x86_vendor]->c_early_init(c);

===================================================================

@@ -12,6 +12,8 @@ static void __cpuinit early_init_intel(s

	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
	    (c->x86 == 0x6 && c->x86_model >= 0x0e))
		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

+
+ set_cpu_cap(c, X86_FEATURE_SYSENTER32);
}

/*
===================================================================

@@ -74,8 +74,8 @@

#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
#define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */
#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */
-/* 14 free */
-/* 15 free */
+#define X86_FEATURE_SYSCALL32 (3*32+14) /* syscall in ia32 userspace */
+#define X86_FEATURE_SYSENTER32 (3*32+15) /* sysenter in ia32 userspace */
#define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well on this CPU */
#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */ #define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */

Use the X86_FEATURE_SYSENTER32 to remove hard-coded CPU vendor check.

---
arch/x86/vdso/vdso32-setup.c | 11 +----------

1 file changed, 1 insertion(+), 10 deletions(-)

===================================================================

@@ -203,20 +203,11 @@ static struct page *vdso32_pages[1];
 

#ifdef CONFIG_X86_64

-static int use_sysenter __read_mostly = -1;
-
-#define vdso32_sysenter() (use_sysenter > 0)
+#define vdso32_sysenter() (boot_cpu_has(X86_FEATURE_SYSENTER32))

/* May not be __init: called during resume */
void syscall32_cpu_init(void)
{
- if (use_sysenter < 0) {
- if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
- use_sysenter = 1;
- if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR)
- use_sysenter = 1;
- }
-

	/* Load these always in case some future AMD CPU supports
	   SYSENTER from compat mode too. */
	checking_wrmsrl(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);

nice cleanup - applied these two to tip/x86/core.

Ingo