x2apic: uninline uv_init_apic_ldr()
Subsystems (3)
PATCH 1/3 x2apic: uninline uv_init_apic_ldr()
Andrew says:
Quoted 1 line
There's no point in declaring it inline if it's always called indirectly.
And point taken!
---
arch/x86/kernel/genx2apic_uv_x.c +1 -1
@@ -120,7 +120,7 @@return 1 ; } -static inline void uv_init_apic_ldr (void ) +static void uv_init_apic_ldr (void ) { }
PATCH 2/3 x2apic: xen64 paravirt basic apic ops
Define the Xen specific basic apic ops, in additon to paravirt apic ops, with some misc warning fixes.
---
arch/x86/xen/enlighten.c +39 -2
@@ -576,16 +576,45 @@ }#ifdef CONFIG_X86_LOCAL_APIC -static u32 xen_apic_read (unsigned long reg) +static u32 xen_apic_read (u32 reg) {return 0 ; } -static void xen_apic_write (unsigned long reg,u32 val) +static void xen_apic_write (u32 reg,u32 val) {/* Warn to see if there's any stray references */ WARN_ON (1 ); } + +#ifdef CONFIG_X86_64 +static u64 xen_apic_icr_read (void ) +{ +return 0 ; +} + +static void xen_apic_icr_write (u32 low,u32 id) +{ +/* Warn to see if there's any stray references */ +WARN_ON (1 ); +} + +static void xen_apic_wait_icr_idle (void ) +{ +return ; +} + +static struct apic_ops xen_basic_apic_ops = { + .read = xen_apic_read, + .write = xen_apic_write, + .write_atomic = xen_apic_write, + .icr_read = xen_apic_icr_read, + .icr_write = xen_apic_icr_write, + .wait_icr_idle = xen_apic_wait_icr_idle, + .safe_wait_icr_idle = xen_apic_wait_icr_idle, +}; +#endif +#endif static void xen_flush_tlb (void )
@@ -1269,9 +1298,11 @@static const struct pv_apic_ops xen_apic_ops__initdata = { #ifdef CONFIG_X86_LOCAL_APIC +#ifndef CONFIG_X86_64 .apic_write = xen_apic_write, .apic_write_atomic = xen_apic_write, .apic_read = xen_apic_read, +#endif .setup_boot_clock = paravirt_nop, .setup_secondary_clock = paravirt_nop, .startup_ipi_hook = paravirt_nop,
@@ -1673,6 +1704,12 @@ pv_irq_ops = xen_irq_ops; pv_apic_ops = xen_apic_ops; pv_mmu_ops = xen_mmu_ops; +#ifdef CONFIG_X86_64 +/* +* for 64bit, set up the basic apic ops aswell. +*/ + apic_ops = &xen_basic_apic_ops; +#endif if (xen_feature (XENFEAT_mmu_pt_update_preserve_ad)) { pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
include/asm-x86/paravirt.h +8 -6
@@ -200,13 +200,15 @@struct pv_apic_ops {#ifdef CONFIG_X86_LOCAL_APIC +#ifndef CONFIG_X86_64 /* * Direct APIC operations, principally for VMI. Ideally * these shouldn't be in this interface. */ -void (*apic_write)(unsigned long reg,u32 v); -void (*apic_write_atomic)(unsigned long reg,u32 v); -u32 (*apic_read)(unsigned long reg); +void (*apic_write)(u32 reg,u32 v); +void (*apic_write_atomic)(u32 reg,u32 v); +u32 (*apic_read)(u32 reg); +#endif void (*setup_boot_clock)(void );void (*setup_secondary_clock)(void );
@@ -903,17 +905,17 @@* Basic functions accessing APICs. */ #ifndef CONFIG_X86_64 -static inline void apic_write (unsigned long reg,u32 v) +static inline void apic_write (u32 reg,u32 v) {PVOP_VCALL2 (pv_apic_ops.apic_write, reg, v); } -static inline void apic_write_atomic (unsigned long reg,u32 v) +static inline void apic_write_atomic (u32 reg,u32 v) {PVOP_VCALL2 (pv_apic_ops.apic_write_atomic, reg, v); } -static inline u32 apic_read (unsigned long reg) +static inline u32 apic_read (u32 reg) { return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg); }
arch/x86/lguest/boot.c +2 -2
@@ -783,11 +783,11 @@* code qualifies for Advanced. It will also never interrupt anything. It * does, however, allow us to get through the Linux boot code. */ #ifdef CONFIG_X86_LOCAL_APIC -static void lguest_apic_write (unsigned long reg,u32 v) +static void lguest_apic_write (u32 reg,u32 v) { } -static u32 lguest_apic_read (unsigned long reg) +static u32 lguest_apic_read (u32 reg) {return 0 ; }
Re: [patch 2/3] x2apic: xen64 paravirt basic apic ops
Quoted 3 lines · Suresh Siddha
Define the Xen specific basic apic ops, in additon to paravirt apic ops, with some misc warning fixes.
This looks fine to me, other than apic_ops is 64-bit only. What's the unification plan?
J
Quoted 145 lines
Signed-off-by Suresh Siddha <[email protected]>Cc Jeremy Fitzhardinge <[email protected]>---
Index:
tree-x86/arch/x86/xen/enlighten.c
===================================================================arch/x86/xen/enlighten.c +39
-2@@ -576,16 +576,45 @@ }#ifdef CONFIG_X86_LOCAL_APIC -static u32 xen_apic_read (unsigned long reg) +static u32 xen_apic_read (u32 reg) {return 0 ; } -static void xen_apic_write (unsigned long reg,u32 val) +static void xen_apic_write (u32 reg,u32 val) {/* Warn to see if there's any stray references */ WARN_ON (1 ); } + +#ifdef CONFIG_X86_64 +static u64 xen_apic_icr_read (void ) +{ +return 0 ; +} + +static void xen_apic_icr_write (u32 low,u32 id) +{ +/* Warn to see if there's any stray references */ +WARN_ON (1 ); +} + +static void xen_apic_wait_icr_idle (void ) +{ +return ; +} + +static struct apic_ops xen_basic_apic_ops = { + .read = xen_apic_read, + .write = xen_apic_write, + .write_atomic = xen_apic_write, + .icr_read = xen_apic_icr_read, + .icr_write = xen_apic_icr_write, + .wait_icr_idle = xen_apic_wait_icr_idle, + .safe_wait_icr_idle = xen_apic_wait_icr_idle, +}; +#endif +#endif static void xen_flush_tlb (void )@@ -1269,9 +1298,11 @@static const struct pv_apic_ops xen_apic_ops__initdata = { #ifdef CONFIG_X86_LOCAL_APIC +#ifndef CONFIG_X86_64 .apic_write = xen_apic_write, .apic_write_atomic = xen_apic_write, .apic_read = xen_apic_read, +#endif .setup_boot_clock = paravirt_nop, .setup_secondary_clock = paravirt_nop, .startup_ipi_hook = paravirt_nop,@@ -1673,6 +1704,12 @@ pv_irq_ops = xen_irq_ops; pv_apic_ops = xen_apic_ops; pv_mmu_ops = xen_mmu_ops; +#ifdef CONFIG_X86_64 +/* +* for 64bit, set up the basic apic ops aswell. +*/ + apic_ops = &xen_basic_apic_ops; +#endif if (xen_feature (XENFEAT_mmu_pt_update_preserve_ad)) { pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;Index:
tree-x86/include/asm-x86/paravirt.h
===================================================================include/asm-x86/paravirt.h +8
-6@@ -200,13 +200,15 @@struct pv_apic_ops {#ifdef CONFIG_X86_LOCAL_APIC +#ifndef CONFIG_X86_64 /* * Direct APIC operations, principally for VMI. Ideally * these shouldn't be in this interface. */ -void (*apic_write)(unsigned long reg,u32 v); -void (*apic_write_atomic)(unsigned long reg,u32 v); -u32 (*apic_read)(unsigned long reg); +void (*apic_write)(u32 reg,u32 v); +void (*apic_write_atomic)(u32 reg,u32 v); +u32 (*apic_read)(u32 reg); +#endif void (*setup_boot_clock)(void );void (*setup_secondary_clock)(void );@@ -903,17 +905,17 @@* Basic functions accessing APICs. */ #ifndef CONFIG_X86_64 -static inline void apic_write (unsigned long reg,u32 v) +static inline void apic_write (u32 reg,u32 v) {PVOP_VCALL2 (pv_apic_ops.apic_write, reg, v); } -static inline void apic_write_atomic (unsigned long reg,u32 v) +static inline void apic_write_atomic (u32 reg,u32 v) {PVOP_VCALL2 (pv_apic_ops.apic_write_atomic, reg, v); } -static inline u32 apic_read (unsigned long reg) +static inline u32 apic_read (u32 reg) { return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg); }Index:
tree-x86/arch/x86/lguest/boot.c
===================================================================arch/x86/lguest/boot.c +2
-2@@ -783,11 +783,11 @@* code qualifies for Advanced. It will also never interrupt anything. It * does, however, allow us to get through the Linux boot code. */ #ifdef CONFIG_X86_LOCAL_APIC -static void lguest_apic_write (unsigned long reg,u32 v) +static void lguest_apic_write (u32 reg,u32 v) { } -static u32 lguest_apic_read (unsigned long reg) +static u32 lguest_apic_read (u32 reg) {return 0 ; }
PATCH 3/3 x2apic: kernel-parameter documentation for "x2apic_phys"
In reply to Suresh Siddha---
Documentation/kernel-parameters.txt +4 -0
@@ -1379,6 +1379,10 @@ nox2apic [X86-64,APIC] Do not enable x2APIC mode. + x2apic_phys [X86-64,APIC] Use x2apic physical mode instead of + default x2apic cluster mode on platforms + supporting x2apic. + noltlbs [PPC] Do not use large page/tlb entries for kernel lowmem mapping on PPC40x.