mtd: sh_flctl: add support for Renesas SuperH FLCTL
Subsystems (3)
PATCH 1/1 mtd: sh_flctl: add support for Renesas SuperH FLCTL
Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash. This driver support SH7723.
--- drivers/mtd/nand/Kconfig | 7 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/sh_flctl.c | 878 ++++++++++++++++++++++++++++++++++++++++++ include/linux/mtd/sh_flctl.h | 125 ++++++ 4 files changed, 1011 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/nand/sh_flctl.c create mode 100644 include/linux/mtd/sh_flctl.h
drivers/mtd/nand/Kconfig +7 -0
@@ -406,4 +406,11 @@ config MTD_NAND_FSL_UPM Enables support for NAND Flash chips wired onto Freescale PowerPC processor localbus with User-Programmable Machine support. +config MTD_NAND_SH_FLCTL + tristate "Support for NAND on Renesas SuperH FLCTL" + depends on MTD_NAND && SUPERH && CPU_SUBTYPE_SH7723 + help + Several Renesas SuperH CPU has FLCTL. This option enables support + for NAND Flash using FLCTL. This driver support SH7723. + endif # MTD_NAND
drivers/mtd/nand/Makefile +1 -0
@@ -34,5 +34,6 @@ obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_MTD_NAND_FSL_UPM) += fsl_upm.o +obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o nand-objs := nand_base.o nand_bbt.o
drivers/mtd/nand/sh_flctl.c new file +878 -0
878 lines not on this page · raw message
include/linux/mtd/sh_flctl.h new file +125 -0
125 lines not on this page · raw message
Signature · 1 line
1.5.5
drivers/mtd/nand/sh_flctl.c line 800
Quoted 12 lines · Yoshihiro Shimoda
Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash. This driver support SH7723.
Signed-off-by Yoshihiro Shimoda <[email protected]>drivers/mtd/nand/sh_flctl.c new file +7
-0+ flctl->reg =ioremap (res->start, res->end - res->start); +if (flctl->reg =NULL ) { +printk (KERN_ERR "%s: ioremap error.\n" , __func__); + ret = -ENOMEM ; + goto err; + } +
You have an off-by-1 here, this wants to be res->end - res->start + 1.
Other than that, it looks ok to me at first glance.
Quoted 15 lines · Paul Mundt
drivers/mtd/nand/sh_flctl.c line 800
Quoted 12 lines · Yoshihiro Shimoda
Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash. This driver support SH7723.
Signed-off-by Yoshihiro Shimoda <[email protected]>drivers/mtd/nand/sh_flctl.c new file +7
-0+ flctl->reg =ioremap (res->start, res->end - res->start); +if (flctl->reg =NULL ) { +printk (KERN_ERR "%s: ioremap error.\n" , __func__); + ret = -ENOMEM ; + goto err; + } +You have an off-by-1 here, this wants to be
res->end-res->start+ 1.
Quoted 4 lines
Other than that, it looks ok to me at first glance.
Acked-by Paul Mundt <[email protected]>
Thank you for your comment. I'll fix up this code.
thanks,
Yoshihiro Shimoda