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linux-next: mtd tree build failure

PATCH New Stephen Rothwell 3 participants 5 messages Oct 20, 2008 – Nov 16, 2008

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#0 lore raw

Hi David,

Today's linux-next build (x86_64 allmodconfig) failed like this:

drivers/mtd/nand/gpio.c: In function 'gpio_nand_writebuf':
drivers/mtd/nand/gpio.c:90: error: implicit declaration of function 'writesb' drivers/mtd/nand/gpio.c: In function 'gpio_nand_readbuf':
drivers/mtd/nand/gpio.c:97: error: implicit declaration of function 'readsb' drivers/mtd/nand/gpio.c: In function 'gpio_nand_writebuf16':
drivers/mtd/nand/gpio.c:123: error: implicit declaration of function 'writesw' drivers/mtd/nand/gpio.c: In function 'gpio_nand_readbuf16':
drivers/mtd/nand/gpio.c:138: error: implicit declaration of function 'readsw'

Caused by commit aaf7ea20000436df3cbb397ccb734ad1e2e5164d ("[MTD] [NAND] GPIO NAND flash driver"). I assume this needs to depend on some architecture/platform so I reverted it for now.

Signature · 3 lines
Cheers,
Stephen Rothwell                    [email protected]
http://www.canb.auug.org.au/~sfr/
#1 lore raw
Quoted 3 lines · Stephen Rothwell

Caused by commit aaf7ea20000436df3cbb397ccb734ad1e2e5164d ("[MTD] [NAND] GPIO NAND flash driver"). I assume this needs to depend on some architecture/platform so I reverted it for now.

Hm, indeed. I thought it _did_ depend on ARM -- did I apply the wrong version of the patch?

Signature · 2 lines
David Woodhouse                            Open Source Technology Centre
[email protected]                              Intel Corporation
#2 lore raw
Quoted 8 lines · David Woodhouse
Quoted 3 lines · Stephen Rothwell

Caused by commit aaf7ea20000436df3cbb397ccb734ad1e2e5164d ("[MTD] [NAND] GPIO NAND flash driver"). I assume this needs to depend on some architecture/platform so I reverted it for now.

Hm, indeed. I thought it _did_ depend on ARM -- did I apply the wrong version of the patch?

You applied the correct version of the patch. It did depend on ARM at the beginning, but after discussion it was decided to make it generic so that other architecture would be able to use it. I just haven't thought that readsw/writesw might be not available on all architectures.

Signature · 2 lines
Sincerely yours,
Mike.
#3 lore raw
Quoted 4 lines · Mike Rapoport

You applied the correct version of the patch. It did depend on ARM at the beginning, but after discussion it was decided to make it generic so that other architecture would be able to use it. I just haven't thought that readsw/writesw might be not available on all architectures.

I've made it depend on ARM again for now. For 2.6.29, let's look at making use ioread8_rep().

Signature · 2 lines
David Woodhouse                            Open Source Technology Centre
[email protected]                              Intel Corporation
#4 lore raw

PATCH 1/1 MTD: NAND: make gpio_nand use io{read,write}{8,16}_rep (was: Re: linux-next: mtd tree build failure)

Quoted 8 lines · David Woodhouse
Quoted 4 lines · Mike Rapoport

You applied the correct version of the patch. It did depend on ARM at the beginning, but after discussion it was decided to make it generic so that other architecture would be able to use it. I just haven't thought that readsw/writesw might be not available on all architectures.

I've made it depend on ARM again for now. For 2.6.29, let's look at making use ioread8_rep().

The below patch makes GPIO NAND use io{read,write}{8,16}_rep to allow architectures other than ARM use the driver.
I've build-tested it for x86_64 with allmodconfig and for powerpc with ep8248e_defconfig and manually enabled GPIO NAND driver.

---
 drivers/mtd/nand/Kconfig |    2 +-
 drivers/mtd/nand/gpio.c  |   16 ++++++++--------
 2 files changed, 9 insertions(+), 9 deletions(-)
drivers/mtd/nand/Kconfig +1 -1
index 1c2e945..b9eed99 100644
@@ -58,7 +58,7 @@ config MTD_NAND_H1900
 
 config MTD_NAND_GPIO
 	tristate "GPIO NAND Flash driver"
-	depends on GENERIC_GPIO && ARM
+	depends on GENERIC_GPIO
 	help
 	  This enables a GPIO based NAND flash driver.
 
drivers/mtd/nand/gpio.c +0 -0
index 8f902e7..c9f26fa 100644
@@ -87,14 +87,14 @@ static void gpio_nand_writebuf(struct mtd_info *mtd, const

u_char *buf, int len)
{
struct nand_chip *this = mtd->priv;

- writesb(this->IO_ADDR_W, buf, len);
+ iowrite8_rep(this->IO_ADDR_W, buf, len);
}

static void gpio_nand_readbuf(struct mtd_info *mtd, u_char *buf, int len) {
struct nand_chip *this = mtd->priv;

- readsb(this->IO_ADDR_R, buf, len);
+ ioread8_rep(this->IO_ADDR_R, buf, len);
}

static int gpio_nand_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
@@ -104,7 +104,7 @@ static int gpio_nand_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
int i, err = 0;

for (i = 0; i < len; i++) {
- read = readb(this->IO_ADDR_R);
+ read = ioread8(this->IO_ADDR_R);
if (read != p[i]) {
pr_debug("%s: err at %d (read %04x vs %04x)\n",
__func__, i, read, p[i]);
@@ -120,13 +120,13 @@ static void gpio_nand_writebuf16(struct mtd_info *mtd, const u_char *buf,
struct nand_chip *this = mtd->priv;

if (IS_ALIGNED((unsigned long)buf, 2)) {
- writesw(this->IO_ADDR_W, buf, len>>1);
+ iowrite16_rep(this->IO_ADDR_W, buf, len>>1);
} else {
int i;
unsigned short *ptr = (unsigned short *)buf;

for (i = 0; i < len; i += 2, ptr++)
- writew(*ptr, this->IO_ADDR_W);
+ iowrite16(*ptr, this->IO_ADDR_W);
}
}

@@ -135,13 +135,13 @@ static void gpio_nand_readbuf16(struct mtd_info *mtd, u_char *buf, int len)
struct nand_chip *this = mtd->priv;

if (IS_ALIGNED((unsigned long)buf, 2)) {
- readsw(this->IO_ADDR_R, buf, len>>1);
+ ioread16_rep(this->IO_ADDR_R, buf, len>>1);
} else {
int i;
unsigned short *ptr = (unsigned short *)buf;

for (i = 0; i < len; i += 2, ptr++)
- *ptr = readw(this->IO_ADDR_R);
+ *ptr = ioread16(this->IO_ADDR_R);
}
}

@@ -154,7 +154,7 @@ static int gpio_nand_verifybuf16(struct mtd_info *mtd, const u_char *buf,
len >>= 1;

for (i = 0; i < len; i++) {
- read = readw(this->IO_ADDR_R);
+ read = ioread16(this->IO_ADDR_R);
if (read != p[i]) {
pr_debug("%s: err at %d (read %04x vs %04x)\n",
__func__, i, read, p[i]);

Signature · 8 lines
1.5.6.4




-- 
Sincerely yours,
Mike.