ESP: misc fixes
PATCH 1/1 ESP: misc fixes
Hi,
Attached patches fix a few problems with ESP scsi card emulation.
Misc fixes (esp_1_misc.diff)
- Fix internal fifo size (16 bytes), according to http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
- Fix values of STAT_MI and STAT_MO
- Give a scsi ID to adapter, and prevent this ID to be used by devices
- Prevent fifo overrun in esp_mem_writeb
- Add a ESP_ERROR macro, and use it where appropriate
Fix configuration 2 register (esp_2_cfg2.diff):
According to http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt , "Any bit pattern written to this register may be read back and should be identical"
Fix command len detection (esp_3_cmdlen.diff)
When command is not DMA, TCMID and TCLO registers are not filled. Use command buffer len instead
Fix 'enable selection' command (esp_4_ensel.diff)
Indicate success after 'enable selection' command
These patches have been tested on Sparc SS-5 and on Mips Magnum emulations.
Hervé
esp.c +1 -0
@@ -537,6 +537,7 @@break ;case CMD_ENSEL :DPRINTF ("Enable selection (%2.2x)\n" , val); + s->rregs[ESP_RINTR ] =0 ;break ;default :ESP_ERROR ("Unhandled ESP command (%2.2x)\n" , val);
esp.c +21 -14
@@ -44,8 +44,11 @@ #define DPRINTF(fmt, args...) do {} while (0)#endif +#define ESP_ERROR(fmt, args...) \ +do { printf("ESP ERROR: %s: " fmt, __func__ , ##args); } while (0) +#define ESP_REGS 16 -#define TI_BUFSZ 32 +#define TI_BUFSZ 16typedef struct ESPState ESPState ;
@@ -120,8 +123,8 @@#define STAT_DI 0x01#define STAT_CD 0x02#define STAT_ST 0x03 -#define STAT_MI 0x06 -#define STAT_MO 0x07 +#define STAT_MO 0x06 +#define STAT_MI 0x07#define STAT_PIO_MASK 0x06#define STAT_TC 0x10
@@ -129,6 +132,8 @@#define STAT_GE 0x40#define STAT_INT 0x80 +#define BUSID_DID 0x07 +#define INTR_FC 0x08#define INTR_BS 0x10#define INTR_DC 0x20
@@ -165,7 +170,7 @@int target; dmalen = s->rregs[ESP_TCLO ] | (s->rregs[ESP_TCMID ] <<8 ); - target = s->wregs[ESP_WBUSID ] &7 ; + target = s->wregs[ESP_WBUSID ] &BUSID_DID ;DPRINTF ("get_cmd: len %d target %d\n" , dmalen, target);if (s->dma) { s->dma_memory_read (s->dma_opaque, buf, dmalen);
@@ -318,7 +323,7 @@ }else { s->current_dev->read_data (s->current_dev,0 );/* If there is still data to be read from the device then -complete the DMA operation immeriately. Otherwise defer +complete the DMA operation immediately. Otherwise defer until the scsi layer has completed. */ if (s->dma_left ==0 && s->ti_size >0 ) {esp_dma_done (s);
@@ -407,6 +412,8 @@ s->ti_wptr =0 ; s->dma =0 ; s->do_cmd =0 ; + + s->rregs[ESP_CFG1 ] =7 ; }static void parent_esp_reset (void *opaque,int irq,int level)
@@ -427,8 +434,8 @@if (s->ti_size >0 ) { s->ti_size--;if ((s->rregs[ESP_RSTAT ] &STAT_PIO_MASK ) ==0 ) { -/* Data in/out. */ -fprintf (stderr,"esp: PIO data read not implemented\n" ); +/* Data out. */ +ESP_ERROR ("PIO data read not implemented\n" ); s->rregs[ESP_FIFO ] =0 ; }else { s->rregs[ESP_FIFO ] = s->ti_buf[s->ti_rptr++];
@@ -467,11 +474,8 @@case ESP_FIFO :if (s->do_cmd) { s->cmdbuf[s->cmdlen++] = val &0xff ; - }else if ((s->rregs[ESP_RSTAT ] &STAT_PIO_MASK ) ==0 ) { -uint8_t buf; - buf = val &0xff ; - s->ti_size--; -fprintf (stderr,"esp: PIO data write not implemented\n" ); + }else if (s->ti_size ==TI_BUFSZ -1 ) { +ESP_ERROR ("fifo overrun\n" ); }else { s->ti_size++; s->ti_buf[s->ti_wptr++] = val &0xff ;
@@ -537,7 +541,7 @@DPRINTF ("Enable selection (%2.2x)\n" , val);break ;default : -DPRINTF ("Unhandled ESP command (%2.2x)\n" , val); +ESP_ERROR ("Unhandled ESP command (%2.2x)\n" , val);break ; }break ;
@@ -555,7 +559,8 @@ s->rregs[saddr] = val;break ;default : -break ; +ESP_ERROR ("invalid write of 0x%02x at [0x%x]\n" , val, saddr); +return ; } s->wregs[saddr] = val; }
@@ -620,6 +625,8 @@if (id <0 ) {for (id =0 ; id <ESP_MAX_DEVS ; id++) { +if (id == (s->rregs[ESP_CFG1 ] &0x7 )) +continue ;if (s->scsi_dev[id] ==NULL )break ; }
esp.c +1 -6
@@ -144,8 +144,6 @@#define CFG1_RESREPT 0x40 -#define CFG2_MASK 0x15 -#define TCHI_FAS100A 0x4static void esp_raise_irq (ESPState *s)
@@ -552,10 +550,7 @@break ; case ESP_WCCF ... ESP_WTEST:break ; -case ESP_CFG2 : - s->rregs[saddr] = val &CFG2_MASK ; -break ; - case ESP_CFG3 ... ESP_RES4: + case ESP_CFG2 ... ESP_RES4: s->rregs[saddr] = val;break ;default :
esp.c +4 -4
@@ -167,16 +167,16 @@uint32_t dmalen;int target; - dmalen = s->rregs[ESP_TCLO ] | (s->rregs[ESP_TCMID ] <<8 ); target = s->wregs[ESP_WBUSID ] &BUSID_DID ; -DPRINTF ("get_cmd: len %d target %d\n" , dmalen, target);if (s->dma) { + dmalen = s->rregs[ESP_TCLO ] | (s->rregs[ESP_TCMID ] <<8 ); s->dma_memory_read (s->dma_opaque, buf, dmalen); }else { + dmalen = s->ti_size; +memcpy (buf, s->ti_buf, dmalen); buf[0 ] =0 ; -memcpy (&buf[1 ], s->ti_buf, dmalen); - dmalen++; } +DPRINTF ("get_cmd: len %d target %d\n" , dmalen, target); s->ti_size =0 ; s->ti_rptr =0 ;
Blue Swirl
AppliedQuoted 26 lines · Hervé Poussineau
Hi,
Attached patches fix a few problems with ESP scsi card emulation.
Misc fixes (esp_1_misc.diff)
- Fix internal fifo size (16 bytes), according to
http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
- Fix values ofSTAT_MIandSTAT_MO
- Give a scsi ID to adapter, and prevent this ID to be used by devices
- Prevent fifo overrun inesp_mem_writeb
- Add aESP_ERRORmacro, and use it where appropriateFix configuration 2 register (esp_2_cfg2.diff):
According to
http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
, "Any bit pattern written to this register
may be read back and should be identical"Fix command len detection (esp_3_cmdlen.diff)
When command is not DMA, TCMID and TCLO registers are not filled. Use
command buffer len instead
Quoted 8 lines
Fix 'enable selection' command (esp_4_ensel.diff) Indicate success after 'enable selection' command
Signed-off-by Hervé Poussineau <[email protected]>These patches have been tested on Sparc SS-5 and on Mips Magnum emulations.
Thanks, applied as r5811, r5812, r5813 and r5814.
Quoted 26 lines · Hervé Poussineau
Hi,
Attached patches fix a few problems with ESP scsi card emulation.
Misc fixes (esp_1_misc.diff)
- Fix internal fifo size (16 bytes), according to
http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
- Fix values ofSTAT_MIandSTAT_MO
- Give a scsi ID to adapter, and prevent this ID to be used by devices
- Prevent fifo overrun inesp_mem_writeb
- Add aESP_ERRORmacro, and use it where appropriateFix configuration 2 register (esp_2_cfg2.diff):
According to
http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
, "Any bit pattern written to this register
may be read back and should be identical"Fix command len detection (esp_3_cmdlen.diff)
When command is not DMA, TCMID and TCLO registers are not filled. Use
command buffer len instead
Quoted 8 lines
Fix 'enable selection' command (esp_4_ensel.diff) Indicate success after 'enable selection' command
Signed-off-by Hervé Poussineau <[email protected]>These patches have been tested on Sparc SS-5 and on Mips Magnum emulations.
With these patches, MirBSD reaches userland (though then it gets a NMI), previously there were some messages about PIO support. Great!