Skip to contentSkip to conversation

Fix oprofile sampling of marked events on POWER7

PATCH In review Maynard Johnson 2 participants 3 messages May 1, 2009 – Jun 16, 2009 PowerPC

lore
Share & tools
lore
#0 lore raw

PATCH 1/1 Fix oprofile sampling of marked events on POWER7

Description
-----------
Change ppc64 oprofile kernel driver to use the SLOT bits (MMCRA[37:39]only on older processors where those bits are defined.

Background
----------
The performance monitor unit of the 64-bit POWER processor family has the ability to collect accurate instruction-level samples when profiling on marked events (i.e., "PM_MRK_<event-name>"). In processors prior to POWER6, the MMCRA register contained "slot information" that the oprofile kernel driver used to adjust the value latched in the SIAR at the time of a PMU interrupt. But as of POWER6, these slot bits in MMCRA are no longer necessary for oprofile to use, since the SIAR itself holds the accurate sampled instruction address. With POWER6, these MMCRA slot bits were zero'ed out by hardware so oprofile's use of these slot bits was, in effect, a NOP. But with POWER7, these bits are no longer zero'ed out; however, they serve some other purpose rather than slot information. Thus, using these bits on POWER7 to adjust the SIAR value results in samples being attributed to the wrong instructions. The attached patch changes the oprofile kernel driver to ignore these slot bits on all newer processors starting with POWER6.

Thanks.
-Maynard

/arch/powerpc/oprofile/op_model_power4.c renamed from arch/powerpc/oprofile/op_model_power4.c +8 -1
diff -paur linux/arch/powerpc/oprofile/op_model_power4.c linux-p7-oprofile-patch//arch/powerpc/oprofile/op_model_power4.c
@@ -26,6 +26,7 @@
 static unsigned long reset_value[OP_MAX_COUNTER];
 
 static int oprofile_running;
+static int use_slot_nums;
 
 /* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */
 static u32 mmcr0_val;
@@ -61,6 +62,12 @@ static int power4_reg_setup(struct op_co
 	else
 		mmcr0_val |= MMCR0_PROBLEM_DISABLE;
 
+	if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p) ||
+	    __is_processor(PV_970) || __is_processor(PV_970FX) ||
+	    __is_processor(PV_970MP) || __is_processor(PV_970GX) ||
+	    __is_processor(PV_POWER5) || __is_processor(PV_POWER5p))
+		use_slot_nums = 1;
+
 	return 0;
 }
 
@@ -206,7 +213,7 @@ static unsigned long get_pc(struct pt_re
 
 	mmcra = mfspr(SPRN_MMCRA);
 
-	if (mmcra & MMCRA_SAMPLE_ENABLE) {
+	if (use_slot_nums && (mmcra & MMCRA_SAMPLE_ENABLE)) {
 		slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT);
 		if (slot > 1)
 			pc += 4 * (slot - 1);
#1 lore raw

Looks like this posting got overlooked, so I'm re-posting the original patch. Ben, can you please review? BTW, Anton reported the problem that this patch fixes.

Thanks.
-Maynard

==============================================================

Description
-----------
Change ppc64 oprofile kernel driver to use the SLOT bits (MMCRA[37:39]only on older processors where those bits are defined.

Background
----------
The performance monitor unit of the 64-bit POWER processor family has the ability to collect accurate instruction-level samples when profiling on marked events (i.e., "PM_MRK_<event-name>"). In processors prior to POWER6, the MMCRA register contained "slot information" that the oprofile kernel driver used to adjust the value latched in the SIAR at the time of a PMU interrupt. But as of POWER6, these slot bits in MMCRA are no longer necessary for oprofile to use, since the SIAR itself holds the accurate sampled instruction address. With POWER6, these MMCRA slot bits were zero'ed out by hardware so oprofile's use of these slot bits was, in effect, a NOP. But with POWER7, these bits are no longer zero'ed out; however, they serve some other purpose rather than slot information. Thus, using these bits on POWER7 to adjust the SIAR value results in samples being attributed to the wrong instructions. The attached patch changes the oprofile kernel driver to ignore these slot bits on all newer processors starting with POWER6.

Thanks.
-Maynard

/arch/powerpc/oprofile/op_model_power4.c renamed from arch/powerpc/oprofile/op_model_power4.c +8 -1
diff -paur linux/arch/powerpc/oprofile/op_model_power4.c linux-p7-oprofile-patch//arch/powerpc/oprofile/op_model_power4.c
@@ -26,6 +26,7 @@
 static unsigned long reset_value[OP_MAX_COUNTER];
 
 static int oprofile_running;
+static int use_slot_nums;
 
 /* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */
 static u32 mmcr0_val;
@@ -61,6 +62,12 @@ static int power4_reg_setup(struct op_co
 	else
 		mmcr0_val |= MMCR0_PROBLEM_DISABLE;
 
+	if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p) ||
+	    __is_processor(PV_970) || __is_processor(PV_970FX) ||
+	    __is_processor(PV_970MP) || __is_processor(PV_970GX) ||
+	    __is_processor(PV_POWER5) || __is_processor(PV_POWER5p))
+		use_slot_nums = 1;
+
 	return 0;
 }
 
@@ -206,7 +213,7 @@ static unsigned long get_pc(struct pt_re
 
 	mmcra = mfspr(SPRN_MMCRA);
 
-	if (mmcra & MMCRA_SAMPLE_ENABLE) {
+	if (use_slot_nums && (mmcra & MMCRA_SAMPLE_ENABLE)) {
 		slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT);
 		if (slot > 1)
 			pc += 4 * (slot - 1);
#2 lore raw
Quoted 1 line · Maynard Johnson

Looks like this posting got overlooked, so I'm re-posting the original patch. Ben, can you please review? BTW, Anton reported the problem that this patch fixes.

It was merged upstream after 2.6.30 -rc6, see commit e5fc948b...

Cheers,
Ben.

Quoted 74 lines

Thanks.
-Maynard

==============================================================

Description
-----------
Change ppc64 oprofile kernel driver to use the SLOT bits (MMCRA[37:39]only on older processors where those bits are defined.

Background
----------
The performance monitor unit of the 64-bit POWER processor family has the ability to collect accurate instruction-level samples when profiling on marked events (i.e., "PM_MRK_<event-name>"). In processors prior to POWER6, the MMCRA register contained "slot information" that the oprofile kernel driver used to adjust the value latched in the SIAR at the time of a PMU interrupt. But as of POWER6, these slot bits in MMCRA are no longer necessary for oprofile to use, since the SIAR itself holds the accurate sampled instruction address. With POWER6, these MMCRA slot bits were zero'ed out by hardware so oprofile's use of these slot bits was, in effect, a NOP. But with POWER7, these bits are no longer zero'ed out; however, they serve some other purpose rather than slot information. Thus, using these bits on POWER7 to adjust the SIAR value results in samples being attributed to the wrong instructions. The attached patch changes the oprofile kernel driver to ignore these slot bits on all newer processors starting with POWER6.

Thanks.
-Maynard

diff -paur linux/arch/powerpc/oprofile/op_model_power4.c linux-p7-oprofile-patch//arch/powerpc/oprofile/op_model_power4.c

/arch/powerpc/oprofile/op_model_power4.c renamed from arch/powerpc/oprofile/op_model_power4.c +8 -1
@@ -26,6 +26,7 @@
 static unsigned long reset_value[OP_MAX_COUNTER];
 
 static int oprofile_running;
+static int use_slot_nums;
 
 /* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */
 static u32 mmcr0_val;
@@ -61,6 +62,12 @@ static int power4_reg_setup(struct op_co
 	else
 		mmcr0_val |= MMCR0_PROBLEM_DISABLE;
 
+	if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p) ||
+	    __is_processor(PV_970) || __is_processor(PV_970FX) ||
+	    __is_processor(PV_970MP) || __is_processor(PV_970GX) ||
+	    __is_processor(PV_POWER5) || __is_processor(PV_POWER5p))
+		use_slot_nums = 1;
+
 	return 0;
 }
 
@@ -206,7 +213,7 @@ static unsigned long get_pc(struct pt_re
 
 	mmcra = mfspr(SPRN_MMCRA);
 
-	if (mmcra & MMCRA_SAMPLE_ENABLE) {
+	if (use_slot_nums && (mmcra & MMCRA_SAMPLE_ENABLE)) {
 		slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT);
 		if (slot > 1)
 			pc += 4 * (slot - 1);

_______________________________________________
Linuxppc-dev mailing list
[email protected]
https://lists.ozlabs.org/listinfo/linuxppc-dev