omap3: bug fix for NOR boot support
Penda
PATCH 1/1 omap3: bug fix for NOR boot support
From: Penda Naveen Kumar<[email protected]>
This patch provides bug fix, when omap3 uses nor boot.
cpu/arm_cortexa8/omap3/lowlevel_init.S +4 -4
@@ -135,19 +135,19 @@ _go_to_speed: .word go_to_speed /* these constants need to be close for PIC code */ /* The Nor has to be in the Flash Base CS0 for this condition to happen */ flash_cfg1_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG1) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG1) flash_cfg3_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG3) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG3) flash_cfg3_val: .word STNOR_GPMC_CONFIG3 flash_cfg4_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG4) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG4) flash_cfg4_val: .word STNOR_GPMC_CONFIG4 flash_cfg5_val: .word STNOR_GPMC_CONFIG5 flash_cfg5_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG5) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG5) pll_ctl_add: .word CM_CLKEN_PLL pll_div_add1:
PATCH 1/1 omap3: bug fix for NOR boot support
Quoted 5 lines · Naveen Kumar
From: Penda Naveen Kumar<[email protected]>
This patch provides bug fix, when omap3 uses nor boot.
Signed-off-by Penda Naveen Kumar<[email protected]>
Makes sense! Most probably not found earlier because most OMAP3 boards have no NOR.
Quoted 33 lines
Index:
u-boot/cpu/arm_cortexa8/omap3/lowlevel_init.S
===================================================================cpu/arm_cortexa8/omap3/lowlevel_init.S +4
-4@@ -135,19 +135,19 @@ _go_to_speed: .word go_to_speed /* these constants need to be close for PIC code */ /* The Nor has to be in the Flash Base CS0 for this condition to happen */ flash_cfg1_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG1) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG1) flash_cfg3_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG3) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG3) flash_cfg3_val: .word STNOR_GPMC_CONFIG3 flash_cfg4_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG4) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG4) flash_cfg4_val: .word STNOR_GPMC_CONFIG4 flash_cfg5_val: .word STNOR_GPMC_CONFIG5 flash_cfg5_addr: - .word (GPMC_CONFIG_CS0 + GPMC_CONFIG5) + .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG5) pll_ctl_add: .word CM_CLKEN_PLL pll_div_add1:_______________________________________________
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PATCH 1/1 omap3: bug fix for NOR boot support
In reply to PendaQuoted 5 lines · Naveen Kumar
From: Penda Naveen Kumar<[email protected]>
This patch provides bug fix, when omap3 uses nor boot.
Signed-off-by Penda Naveen Kumar<[email protected]>
please specify on which board you test it
Best Regards,
J.
Wolfgang Denk
AppliedPATCH 1/1 omap3: bug fix for NOR boot support
In reply to PendaDear "Penda, Naveen Kumar",
cpu/arm_cortexa8/omap3/lowlevel_init.S
Quoted 10 lines · In message <[email protected]> you…
From: Penda Naveen Kumar<[email protected]>
This patch provides bug fix, when omap3 uses nor boot.
Signed-off-by Penda Naveen Kumar<[email protected]>Index:
u-boot/cpu/arm_cortexa8/omap3/lowlevel_init.S
===================================================================cpu/arm_cortexa8/omap3/lowlevel_init.S +0
-0
Applied, thanks.
Best regards,
Wolfgang Denk
Signature · 4 lines
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