fsl diu, edid info and i2c platform data
Subsystems (3)
Hi,
I am messing about with the fsl-diu-fb.c which handles the display on mpc512x platforms. The display panels we are using provide EDID information and I would like to use that to setup the display modes etc. The current fsl-diu-fb.c is hard coding display modes into the driver.
I have started this and it is working more or less but I appreciate all input from more knowledgeable people about how to do this "correctly" with the aim that others could benefit.
I have the feeling I am not approaching this correctly.
One option I was looking into was to use platform data for the i2c edid driver, e.g. for the platform to provide default fb_mode. But I have a big problem on how to attach the platform data to the i2cedid driver. I tried few options and while I think using code like :
np = of_find_compatible_node( NULL, NULL, "vesa,edid" );
if( np )
{
struct i2c_client * tsc2007 = NULL;
// tsc2007 = of_find_i2c_device_by_node( np );
if( tsc2007 )
{
tsc2007->dev.platform_data = &v39_edid_data;
put_device( &tsc2007->dev );
}
of_node_put( np );
}is the correct way to do it. The function of_find_i2c_device_by_node() hangs the kernel.
Attached is the patch as I have it now. It compiles and works on our custom mpc5121 board for two different LCD panels.
rg
kd
Forgot the patch.
Quoted 30 lines · Kári Davíðsson
Hi,
I am messing about with the
fsl-diu-fb.cwhich handles the display on mpc512x platforms. The display panels we are using provide EDID information and I would like to use that to setup the display modes etc. The currentfsl-diu-fb.cis hard coding display modes into the driver.I have started this and it is working more or less but I appreciate all input from more knowledgeable people about how to do this "correctly" with the aim that others could benefit.
I have the feeling I am not approaching this correctly.One option I was looking into was to use platform data for the i2c edid driver, e.g. for the platform to provide default
fb_mode. But I have a big problem on how to attach the platform data to the i2cedid driver. I tried few options and while I think using code like :np = of_find_compatible_node( NULL, NULL, "vesa,edid" ); if( np ) { struct i2c_client * tsc2007 = NULL; // tsc2007 = of_find_i2c_device_by_node( np ); if( tsc2007 ) { tsc2007->dev.platform_data = &v39_edid_data; put_device( &tsc2007->dev ); } of_node_put( np ); }is the correct way to do it. The function
of_find_i2c_device_by_node()hangs the kernel.
Quoted 9 lines
Attached is the patch as I have it now. It compiles and works on our custom mpc5121 board for two different LCD panels.
rg
kd
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arch/powerpc/boot/dts/v39.dts new file +285 -0
@@ -0,0 +1,285 @@ +/* + * V39 Device Tree Source + * + * Copyright 2009 Marel ehf. + * Copyright 2007,2008 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "v39"; + compatible = "marel,v39"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,5121@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <0x20>; // 32 bytes + i-cache-line-size = <0x20>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <49500000>;// 49.5 MHz (csb/4) + bus-frequency = <198000000>; // 198 MHz csb bus + clock-frequency = <396000000>; // 396 MHz ppc core + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; // 256MB at 0 + }; + + mbx@20000000 { + compatible = "fsl,mpc5121-mbx"; + reg = <0x20000000 0x4000>; + interrupts = <66 0x8>; + interrupt-parent = < &ipic >; + }; + + sram@30000000 { + compatible = "fsl,mpc5121-sram"; + reg = <0x30000000 0x20000>; // 128K at 0x30000000 + }; + + soc@80000000 { + compatible = "fsl,mpc5121-immr"; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + ranges = <0x0 0x80000000 0x400000>; + reg = <0x80000000 0x400000>; + bus-frequency = <66000000>; // 66 MHz ips bus + + + // IPIC + // interrupts cell = <intr #, sense> + // sense values match linux IORESOURCE_IRQ_* defines: + // sense == 8: Level, low assertion + // sense == 2: Edge, high-to-low change + // + ipic: interrupt-controller@c00 { + compatible = "fsl,mpc5121-ipic", "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0xc00 0x100>; + }; + + rtc@a00 { // Real time clock + compatible = "fsl,mpc5121-rtc"; + reg = <0xa00 0x100>; + interrupts = <79 0x8 80 0x8>; + interrupt-parent = < &ipic >; + }; + + clock@f00 { // Clock control + compatible = "fsl,mpc5121-clock"; + reg = <0xf00 0x100>; + }; + +/* + gpio@1100 { + compatible = "fsl,mpc5121-gpio"; + reg = <0x1100 0x100>; + interrupts = <78 0x8>; + interrupt-parent = < &ipic >; + }; +*/ + + mscan@1300 { + compatible = "fsl,mpc5121-mscan"; + cell-index = <0>; + interrupts = <12 0x8>; + interrupt-parent = < &ipic >; + reg = <0x1300 0x80>; + clock-ipb; + }; + + mscan@1380 { + compatible = "fsl,mpc5121-mscan"; + cell-index = <1>; + interrupts = <13 0x8>; + interrupt-parent = < &ipic >; + reg = <0x1380 0x80>; + clock-ipb; + }; + + edidbus: i2c@1700 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; + cell-index = <0>; + reg = <0x1700 0x20>; + interrupts = <9 0x8>; + interrupt-parent = < &ipic >; + fsl5200-clocking; + edid: edid@50 { + compatible = "vesa,edid"; + reg = <0x50>; + }; + }; + + i2c@1720 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; + cell-index = <1>; + reg = <0x1720 0x20>; + interrupts = <10 0x8>; + interrupt-parent = < &ipic >; + fsl5200-clocking; + }; + + i2c@1740 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; + cell-index = <2>; + reg = <0x1740 0x20>; + interrupts = <11 0x8>; + interrupt-parent = < &ipic >; + fsl5200-clocking; + ts@49 { + compatible = "bb,tsc2007"; + reg = <0x49>; + interrupts = <17 0x8>; // IRQ1 (17) + interrupt-parent = < &ipic >; + device_type="tsc"; + }; + + }; + + i2ccontrol@1760 { + compatible = "fsl,mpc5121-i2c-ctrl"; + reg = <0x1760 0x8>; + }; + + axe@2000 { + compatible = "fsl,mpc5121-axe"; + reg = <0x2000 0x100>; + interrupts = <42 0x8>; + interrupt-parent = < &ipic >; + }; + + display@2100 { + device_type = "display"; + compatible = "fsl,diu"; + reg = <0x2100 0x100>; + interrupts = <64 0x8>; + interrupt-parent = < &ipic >; + edid = < &edidbus >; + }; + + mdio@2800 { + compatible = "fsl,mpc5121-fec-mdio"; + reg = <0x2800 0x800>; + #address-cells = <1>; + #size-cells = <0>; + phy: ethernet-phy@0 { + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@2800 { + device_type = "network"; + compatible = "fsl,mpc5121-fec"; + reg = <0x2800 0x800>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <4 0x8>; + interrupt-parent = < &ipic >; + phy-handle = < &phy >; + fsl,align-tx-packets = <4>; + }; + + // 5121e has two dr usb modules + // USB1 using external ULPI PHY + usb@3000 { + compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; + reg = <0x3000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <43 0x8>; + dr_mode = "otg"; + phy_type = "ulpi"; + port1; + }; + + // USB0 using internal UTMI PHY + usb@4000 { + compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; + reg = <0x4000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <44 0x8>; + dr_mode = "otg"; + phy_type = "utmi_wide"; + port0; + }; + + // IO control + ioctl@a000 { + compatible = "fsl,mpc5121-ioctl"; + reg = <0xA000 0x1000>; + }; + + // 512x PSCs are not 52xx PSC compatible + // PSC3 serial port A aka ttyPSC0 + serial@11300 { + device_type = "serial"; + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; + // Logical port assignment needed until driver + // learns to use aliases + port-number = <0>; + cell-index = <3>; + reg = <0x11300 0x100>; + interrupts = <40 0x8>; + interrupt-parent = < &ipic >; + rx-fifo-size = <16>; + tx-fifo-size = <16>; + }; + + // PSC4 serial port B aka ttyPSC1 + serial@11400 { + device_type = "serial"; + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; + // Logical port assignment needed until driver + // learns to use aliases + port-number = <1>; + cell-index = <4>; + reg = <0x11400 0x100>; + interrupts = <40 0x8>; + interrupt-parent = < &ipic >; + rx-fifo-size = <16>; + tx-fifo-size = <16>; + }; + + pscfifo@11f00 { + compatible = "fsl,mpc5121-psc-fifo"; + reg = <0x11f00 0x100>; + interrupts = <40 0x8>; + interrupt-parent = < &ipic >; + }; + + dma@14000 { + compatible = "fsl,mpc5121-dma2", "fsl,mpc512x-dma2", "mpc512x-dma2"; + reg = <0x14000 0x1800>; + interrupts = <65 0x8>; + interrupt-parent = < &ipic >; + }; + + }; +};
drivers/video/Kconfig +11 -0
@@ -218,6 +218,15 @@ config FB_MODE_HELPERS your driver does not take advantage of this feature, choosing Y will just increase the kernel size by about 5K. +config I2CEDID + bool "Encapsulate EDID functions with i2c driver" + depends on I2C + default n + ---help--- + This helps with automatic probing of the EDID information from + of tree. Can probably help others where instantiation of the EDID + instantiation could be factored out of the console driver. + config FB_TILEBLITTING bool "Enable Tile Blitting Support" depends on FB
@@ -1827,6 +1836,8 @@ config FB_FSL_DIU select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT select PPC_LIB_RHEAP + select I2CEDID + select FB_DDC ---help--- Framebuffer driver for the Freescale SoC DIU
drivers/video/Makefile +1 -0
@@ -4,6 +4,7 @@ # Each configuration option enables a list of files. +obj-$(CONFIG_I2CEDID) += i2cedid.o obj-$(CONFIG_VGASTATE) += vgastate.o obj-y += fb_notify.o obj-$(CONFIG_FB) += fb.o
drivers/video/fsl-diu-fb.c +13 -138
204 lines not on this page · raw message
drivers/video/i2cedid.c new file +102 -0
102 lines not on this page · raw message
drivers/video/i2cedid.h new file +14 -0
@@ -0,0 +1,14 @@ +/* Copyright 2009 Marel ehf. All Rights Reserverd. +* +* Author Kári Davíðsson <[email protected]> +* +* Header file to Of platform driver for edid reading. +*/ + +#ifndef __I2CEDID_H__ +#define __I2CEDID_H__ + +extern struct fb_monspecs * edid_fbmonspec; +extern char * edid_fbmodetxt; + +#endif /* __I2CEDID_H__ */