Skip to contentSkip to conversation

intel_txt: fix the build errors of intel_txt patch on non-X86 platforms (resend)

PATCH New Shane Wang 6 participants 30 messages Sep 1, 2009 – Mar 19, 2010

Subsystems (8)
Documentation x86 ACPI PCI +4 more subsystems
lore
Share & tools
lore

Shane Wang

author
#0 lore raw

PATCH 1/1 intel_txt: fix the build errors of intel_txt patch on non-X86 platforms (resend)

Move tboot.h from asm to linux to fix the build errors of intel_txt patch on non-X86 platforms. Remove the tboot code from generic code init/main.c and kernel/cpu.c.

---
 arch/x86/Kconfig              |    4
 arch/x86/include/asm/tboot.h  |  197 --------------------------------
 arch/x86/kernel/reboot.c      |    3
 arch/x86/kernel/setup.c       |    3
 arch/x86/kernel/smpboot.c     |    2
 arch/x86/kernel/tboot.c       |   58 +++++++--
 drivers/acpi/acpica/hwsleep.c |    2
 drivers/pci/dmar.c            |    2
 drivers/pci/intel-iommu.c     |    2
 include/linux/tboot.h         |  162 ++++++++++++++++++++++++++
 init/main.c                   |    3
 kernel/cpu.c                  |    6
 security/Kconfig              |    2
 13 files changed, 221 insertions(+), 225 deletions(-)
arch/x86/Kconfig +4 -0
diff -r c6f74b152a32 arch/x86/Kconfig
@@ -179,6 +179,10 @@ config ARCH_SUPPORTS_OPTIMIZED_INLINING
 
 config ARCH_SUPPORTS_DEBUG_PAGEALLOC
 	def_bool y
+
+config HAVE_INTEL_TXT
+	def_bool y
+	depends on EXPERIMENTAL && DMAR && ACPI
 
 # Use the generic interrupt handling code in kernel/irq/:
 config GENERIC_HARDIRQS
arch/x86/include/asm/tboot.h deleted +0 -197

197 lines not on this page · raw message

arch/x86/kernel/reboot.c +1 -2
diff -r c6f74b152a32 arch/x86/kernel/reboot.c
@@ -4,6 +4,7 @@
 #include <linux/pm.h>
 #include <linux/efi.h>
 #include <linux/dmi.h>
+#include <linux/tboot.h>
 #include <acpi/reboot.h>
 #include <asm/io.h>
 #include <asm/apic.h>
@@ -23,8 +24,6 @@
 #else
 # include <asm/iommu.h>
 #endif
-
-#include <asm/tboot.h>
 
 /*
  * Power off function, if any
arch/x86/kernel/setup.c +1 -2
diff -r c6f74b152a32 arch/x86/kernel/setup.c
@@ -66,6 +66,7 @@
 
 #include <linux/percpu.h>
 #include <linux/crash_dump.h>
+#include <linux/tboot.h>
 
 #include <video/edid.h>
 
@@ -140,8 +141,6 @@ struct boot_params __initdata boot_param
 #else
 struct boot_params boot_params;
 #endif
-
-#include <asm/tboot.h>
 
 /*
  * Machine setup..
arch/x86/kernel/smpboot.c +1 -1
diff -r c6f74b152a32 arch/x86/kernel/smpboot.c
@@ -47,6 +47,7 @@
 #include <linux/bootmem.h>
 #include <linux/err.h>
 #include <linux/nmi.h>
+#include <linux/tboot.h>
 
 #include <asm/acpi.h>
 #include <asm/desc.h>
@@ -62,7 +63,6 @@
 #include <asm/vmi.h>
 #include <asm/apic.h>
 #include <asm/setup.h>
-#include <asm/tboot.h>
 #include <asm/uv/uv.h>
 #include <asm/debugreg.h>
 #include <linux/mc146818rtc.h>
arch/x86/kernel/tboot.c +47 -11

97 lines not on this page · raw message

drivers/acpi/acpica/hwsleep.c +1 -1
diff -r c6f74b152a32 drivers/acpi/acpica/hwsleep.c
@@ -45,7 +45,7 @@
 #include <acpi/acpi.h>
 #include "accommon.h"
 #include "actables.h"
-#include <asm/tboot.h>
+#include <linux/tboot.h>
 
 #define _COMPONENT          ACPI_HARDWARE
 ACPI_MODULE_NAME("hwsleep")
drivers/pci/dmar.c +1 -1
diff -r c6f74b152a32 drivers/pci/dmar.c
@@ -33,7 +33,7 @@
 #include <linux/timer.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <asm/tboot.h>
+#include <linux/tboot.h>
 
 #undef PREFIX
 #define PREFIX "DMAR:"
drivers/pci/intel-iommu.c +1 -1
diff -r c6f74b152a32 drivers/pci/intel-iommu.c
@@ -37,8 +37,8 @@
 #include <linux/iommu.h>
 #include <linux/intel-iommu.h>
 #include <linux/sysdev.h>
+#include <linux/tboot.h>
 #include <asm/cacheflush.h>
-#include <asm/tboot.h>
 #include <asm/iommu.h>
 #include "pci.h"
 
include/linux/tboot.h new file +162 -0

162 lines not on this page · raw message

init/main.c +0 -3
diff -r c6f74b152a32 init/main.c
@@ -73,7 +73,6 @@
 #include <asm/io.h>
 #include <asm/bugs.h>
 #include <asm/setup.h>
-#include <asm/tboot.h>
 #include <asm/sections.h>
 #include <asm/cacheflush.h>
 
@@ -716,8 +715,6 @@ asmlinkage void __init start_kernel(void
 
 	ftrace_init();
 
-	tboot_create_trampoline();
-
 	/* Do the rest non-__init'ed, we're now alive */
 	rest_init();
 }
kernel/cpu.c +1 -5
diff -r c6f74b152a32 kernel/cpu.c
@@ -14,7 +14,6 @@
 #include <linux/kthread.h>
 #include <linux/stop_machine.h>
 #include <linux/mutex.h>
-#include <asm/tboot.h>
 
 #ifdef CONFIG_SMP
 /* Serializes the updates to cpu_online_mask, cpu_present_mask */
@@ -377,7 +376,7 @@ static cpumask_var_t frozen_cpus;
 
 int disable_nonboot_cpus(void)
 {
-	int cpu, first_cpu, error, num_cpus = 0;
+	int cpu, first_cpu, error;
 
 	error = stop_machine_create();
 	if (error)
@@ -392,7 +391,6 @@ int disable_nonboot_cpus(void)
 	for_each_online_cpu(cpu) {
 		if (cpu == first_cpu)
 			continue;
-		num_cpus++;
 		error = _cpu_down(cpu, 1);
 		if (!error) {
 			cpumask_set_cpu(cpu, frozen_cpus);
@@ -403,8 +401,6 @@ int disable_nonboot_cpus(void)
 			break;
 		}
 	}
-	/* ensure all CPUs have gone into wait-for-SIPI */
-	error |= tboot_wait_for_aps(num_cpus);
 
 	if (!error) {
 		BUG_ON(num_online_cpus() > 1);
security/Kconfig +1 -1
diff -r c6f74b152a32 security/Kconfig
@@ -131,7 +131,7 @@ config LSM_MMAP_MIN_ADDR
 
 config INTEL_TXT
 	bool "Enable Intel(R) Trusted Execution Technology (Intel(R) TXT)"
-	depends on EXPERIMENTAL && X86 && DMAR && ACPI
+	depends on HAVE_INTEL_TXT
 	help
 	  This option enables support for booting the kernel with the
 	  Trusted Boot (tboot) module. This will utilize

Move tboot.h from asm to linux to fix the build errors of intel_txt patch on non-X86 platforms. Remove the tboot code from generic code init/main.c and kernel/cpu.c.

arch/x86/Kconfig +4 -0
diff -r c6f74b152a32 arch/x86/Kconfig
@@ -179,6 +179,10 @@ config ARCH_SUPPORTS_OPTIMIZED_INLINING
 
 config ARCH_SUPPORTS_DEBUG_PAGEALLOC
 	def_bool y
+
+config HAVE_INTEL_TXT
+	def_bool y
+	depends on EXPERIMENTAL && DMAR && ACPI
 
 # Use the generic interrupt handling code in kernel/irq/:
 config GENERIC_HARDIRQS
arch/x86/include/asm/tboot.h deleted +0 -197

197 lines not on this page · raw message

arch/x86/kernel/reboot.c +1 -2
diff -r c6f74b152a32 arch/x86/kernel/reboot.c
@@ -4,6 +4,7 @@
 #include <linux/pm.h>
 #include <linux/efi.h>
 #include <linux/dmi.h>
+#include <linux/tboot.h>
 #include <acpi/reboot.h>
 #include <asm/io.h>
 #include <asm/apic.h>
@@ -23,8 +24,6 @@
 #else
 # include <asm/iommu.h>
 #endif
-
-#include <asm/tboot.h>
 
 /*
  * Power off function, if any
arch/x86/kernel/setup.c +1 -2
diff -r c6f74b152a32 arch/x86/kernel/setup.c
@@ -66,6 +66,7 @@
 
 #include <linux/percpu.h>
 #include <linux/crash_dump.h>
+#include <linux/tboot.h>
 
 #include <video/edid.h>
 
@@ -140,8 +141,6 @@ struct boot_params __initdata boot_param
 #else
 struct boot_params boot_params;
 #endif
-
-#include <asm/tboot.h>
 
 /*
  * Machine setup..
arch/x86/kernel/smpboot.c +1 -1
diff -r c6f74b152a32 arch/x86/kernel/smpboot.c
@@ -47,6 +47,7 @@
 #include <linux/bootmem.h>
 #include <linux/err.h>
 #include <linux/nmi.h>
+#include <linux/tboot.h>
 
 #include <asm/acpi.h>
 #include <asm/desc.h>
@@ -62,7 +63,6 @@
 #include <asm/vmi.h>
 #include <asm/apic.h>
 #include <asm/setup.h>
-#include <asm/tboot.h>
 #include <asm/uv/uv.h>
 #include <asm/debugreg.h>
 #include <linux/mc146818rtc.h>
arch/x86/kernel/tboot.c +47 -11

97 lines not on this page · raw message

drivers/acpi/acpica/hwsleep.c +1 -1
diff -r c6f74b152a32 drivers/acpi/acpica/hwsleep.c
@@ -45,7 +45,7 @@
 #include <acpi/acpi.h>
 #include "accommon.h"
 #include "actables.h"
-#include <asm/tboot.h>
+#include <linux/tboot.h>
 
 #define _COMPONENT          ACPI_HARDWARE
 ACPI_MODULE_NAME("hwsleep")
drivers/pci/dmar.c +1 -1
diff -r c6f74b152a32 drivers/pci/dmar.c
@@ -33,7 +33,7 @@
 #include <linux/timer.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <asm/tboot.h>
+#include <linux/tboot.h>
 
 #undef PREFIX
 #define PREFIX "DMAR:"
drivers/pci/intel-iommu.c +1 -1
diff -r c6f74b152a32 drivers/pci/intel-iommu.c
@@ -37,8 +37,8 @@
 #include <linux/iommu.h>
 #include <linux/intel-iommu.h>
 #include <linux/sysdev.h>
+#include <linux/tboot.h>
 #include <asm/cacheflush.h>
-#include <asm/tboot.h>
 #include <asm/iommu.h>
 #include "pci.h"
 
include/linux/tboot.h new file +162 -0

162 lines not on this page · raw message

init/main.c +0 -3
diff -r c6f74b152a32 init/main.c
@@ -73,7 +73,6 @@
 #include <asm/io.h>
 #include <asm/bugs.h>
 #include <asm/setup.h>
-#include <asm/tboot.h>
 #include <asm/sections.h>
 #include <asm/cacheflush.h>
 
@@ -716,8 +715,6 @@ asmlinkage void __init start_kernel(void
 
 	ftrace_init();
 
-	tboot_create_trampoline();
-
 	/* Do the rest non-__init'ed, we're now alive */
 	rest_init();
 }
kernel/cpu.c +1 -5
diff -r c6f74b152a32 kernel/cpu.c
@@ -14,7 +14,6 @@
 #include <linux/kthread.h>
 #include <linux/stop_machine.h>
 #include <linux/mutex.h>
-#include <asm/tboot.h>
 
 #ifdef CONFIG_SMP
 /* Serializes the updates to cpu_online_mask, cpu_present_mask */
@@ -377,7 +376,7 @@ static cpumask_var_t frozen_cpus;
 
 int disable_nonboot_cpus(void)
 {
-	int cpu, first_cpu, error, num_cpus = 0;
+	int cpu, first_cpu, error;
 
 	error = stop_machine_create();
 	if (error)
@@ -392,7 +391,6 @@ int disable_nonboot_cpus(void)
 	for_each_online_cpu(cpu) {
 		if (cpu == first_cpu)
 			continue;
-		num_cpus++;
 		error = _cpu_down(cpu, 1);
 		if (!error) {
 			cpumask_set_cpu(cpu, frozen_cpus);
@@ -403,8 +401,6 @@ int disable_nonboot_cpus(void)
 			break;
 		}
 	}
-	/* ensure all CPUs have gone into wait-for-SIPI */
-	error |= tboot_wait_for_aps(num_cpus);
 
 	if (!error) {
 		BUG_ON(num_online_cpus() > 1);
security/Kconfig +1 -1
diff -r c6f74b152a32 security/Kconfig
@@ -131,7 +131,7 @@ config LSM_MMAP_MIN_ADDR
 
 config INTEL_TXT
 	bool "Enable Intel(R) Trusted Execution Technology (Intel(R) TXT)"
-	depends on EXPERIMENTAL && X86 && DMAR && ACPI
+	depends on HAVE_INTEL_TXT
 	help
 	  This option enables support for booting the kernel with the
 	  Trusted Boot (tboot) module. This will utilize
author
#1 lore raw

PATCH 1/1 intel_txt: add s3 userspace memory integrity verification

This patch added verification for userspace memory integrity after s3 resume. Integrity verification for other memory (say kernel itself) has been done by tboot.

Thanks for your comments.
Shane

---
 arch/x86/kernel/tboot.c |  170 ++++++++++++++++++++++++++++++++++++++
 drivers/acpi/sleep.c    |    4
 include/linux/tboot.h   |    7 +
 security/Kconfig        |    2
 4 files changed, 182 insertions(+), 1 deletion(-)
arch/x86/kernel/tboot.c +170 -0
diff -r 42870e183bd5 arch/x86/kernel/tboot.c
@@ -20,6 +20,7 @@
  */
 
 #include <linux/dma_remapping.h>
+#include <linux/scatterlist.h>
 #include <linux/init_task.h>
 #include <linux/spinlock.h>
 #include <linux/delay.h>
@@ -30,12 +31,17 @@
 #include <linux/pfn.h>
 #include <linux/mm.h>
 #include <linux/tboot.h>
+#include <linux/random.h>
+
+#include <crypto/vmac.h>
+#include <crypto/hash.h>
 
 #include <asm/trampoline.h>
 #include <asm/processor.h>
 #include <asm/bootparam.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
+#include <asm/percpu.h>
 #include <asm/fixmap.h>
 #include <asm/proto.h>
 #include <asm/setup.h>
@@ -168,6 +174,80 @@ static void tboot_create_trampoline(void
 		      map_base, map_size);
 }
 
+static vmac_t mem_mac;
+static struct crypto_hash *tfm;
+
+static int tboot_gen_mem_integrity(const uint8_t key[], vmac_t *mac)
+{
+	int i, j, ret;
+	pg_data_t *pgdat;
+	struct hash_desc desc;
+	struct scatterlist sg[1];
+	struct page *page;
+	uint64_t paddr, rstart, rend;
+	unsigned long pfn;
+	uint8_t zeroed_key[VMAC_KEY_LEN];
+
+	if (!tfm)
+		tfm = crypto_alloc_hash("vmac(aes)", 0, CRYPTO_ALG_ASYNC);
+
+	if (IS_ERR(tfm)) {
+		tfm = NULL;
+		return -ENOMEM;
+	}
+
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	sg_init_table(sg, 1);
+
+	ret = crypto_hash_init(&desc);
+	if (ret)
+		return ret;
+	ret = crypto_hash_setkey(desc.tfm, key, VMAC_KEY_LEN);
+	if (ret)
+		return ret;
+
+	for_each_online_pgdat(pgdat) {
+		for (i = 0, pfn = pgdat->node_start_pfn;
+			i < pgdat->node_spanned_pages;
+			i++, pfn = pgdat->node_start_pfn + i) {
+
+			if (!pfn_valid(pfn) || !page_is_ram(pfn))
+				continue;
+
+			page = pfn_to_page(pfn);
+			paddr = page_to_phys(page);
+
+			/* If pg will be MACed by tboot, no need to MAC here */
+			for (j = 0; j < tboot->num_mac_regions; j++) {
+				rstart = tboot->mac_regions[j].start;
+				rend = rstart +	tboot->mac_regions[j].size;
+				if (((paddr + PAGE_SIZE) <= rstart)
+					|| (rend <= paddr))
+					continue;
+				break;
+			}
+
+			if (j == tboot->num_mac_regions) {
+				sg_set_page(sg, page, PAGE_SIZE, 0);
+				ret = crypto_hash_update(&desc, sg, PAGE_SIZE);
+				if (ret)
+					return ret;
+			}
+		}
+	}
+	ret = crypto_hash_final(&desc, (uint8_t *)mac);
+	if (ret)
+		return ret;
+
+	/* Clean the key */
+	memset(zeroed_key, 0, sizeof(zeroed_key));
+	crypto_hash_setkey(desc.tfm, zeroed_key, VMAC_KEY_LEN);
+
+	return 0;
+}
+
 #ifdef CONFIG_ACPI_SLEEP
 
 static void add_mac_region(phys_addr_t start, unsigned long size)
@@ -197,6 +277,16 @@ static int tboot_setup_sleep(void)
 	/* kernel code + data + bss */
 	add_mac_region(virt_to_phys(_text), _end - _text);
 
+	/* stack */
+	add_mac_region(virt_to_phys(current_thread_info()), THREAD_SIZE);
+
+	/* MAC userspace memory not handled by tboot */
+	get_random_bytes(tboot->s3_key, sizeof(tboot->s3_key));
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mem_mac)) {
+		panic("tboot: vmac generation failed\n");
+		return -1;
+	}
+
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 
 	return 0;
@@ -212,6 +302,68 @@ static int tboot_setup_sleep(void)
 }
 
 #endif
+
+static struct thread_info *low_ti, *current_ti;
+
+static void tboot_do_stack_switch(struct thread_info *new_ti,
+				struct thread_info *old_ti)
+{
+	memcpy(new_ti, old_ti, THREAD_SIZE);
+#ifdef CONFIG_X86_32
+	asm volatile (
+		" and %0, %%esp;        "
+		" add %1, %%esp;        "
+		: : "i" (THREAD_SIZE - 1), "r" (new_ti));
+#else
+	asm volatile (
+		" and %0, %%rsp;        "
+		" add %1, %%rsp;        "
+		: : "i" (THREAD_SIZE - 1), "r" (new_ti));
+	percpu_write(kernel_stack, (unsigned long)new_ti -
+				KERNEL_STACK_OFFSET + THREAD_SIZE);
+#endif
+	current->stack = new_ti;
+}
+
+void tboot_switch_stack(void)
+{
+	if (!tboot_enabled())
+		return;
+
+	current_ti = current_thread_info();
+
+	/* If thread info is above 4G, then switch stack */
+	if (!((PFN_PHYS(PFN_DOWN(virt_to_phys(current_ti)))
+		+ (PFN_UP(THREAD_SIZE) << PAGE_SHIFT))
+		& 0xffffffff00000000ULL))
+		return;
+
+	if (low_ti == NULL)
+		low_ti = (struct thread_info *)
+				__get_free_pages(GFP_DMA32, THREAD_ORDER);
+
+	tboot_do_stack_switch(low_ti, current_ti);
+}
+
+void tboot_restore_stack(void)
+{
+	if (!tboot_enabled())
+		return;
+
+	if (current_ti == NULL)
+		BUG();
+
+	/* If thread info is above 4G, then restore stack */
+	if (!((PFN_PHYS(PFN_DOWN(virt_to_phys(current_ti)))
+		+ (PFN_UP(THREAD_SIZE) << PAGE_SHIFT))
+		& 0xffffffff00000000ULL))
+		return;
+
+	if (low_ti == NULL)
+		BUG();
+
+	tboot_do_stack_switch(current_ti, low_ti);
+}
 
 void tboot_shutdown(u32 shutdown_type)
 {
@@ -292,6 +444,24 @@ void tboot_sleep(u8 sleep_state, u32 pm1
 	}
 
 	tboot_shutdown(acpi_shutdown_map[sleep_state]);
+}
+
+void tboot_sx_resume(void)
+{
+	vmac_t mac;
+
+	if (!tboot_enabled())
+		return;
+
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mac))
+		panic("tboot: vmac generation failed\n");
+	else if (mac != mem_mac)
+		panic("tboot: memory integrity was lost on resume\n");
+	else
+		pr_info("memory integrity OK\n");
+
+	/* Clean s3_key */
+	memset(tboot->s3_key, 0, sizeof(tboot->s3_key));
 }
 
 static atomic_t ap_wfs_count;
drivers/acpi/sleep.c +4 -0
diff -r 42870e183bd5 drivers/acpi/sleep.c
@@ -16,6 +16,7 @@
 #include <linux/device.h>
 #include <linux/suspend.h>
 #include <linux/reboot.h>
+#include <linux/tboot.h>
 
 #include <asm/io.h>
 
@@ -244,7 +245,10 @@ static int acpi_suspend_enter(suspend_st
 		break;
 
 	case ACPI_STATE_S3:
+		tboot_switch_stack();
 		do_suspend_lowlevel();
+		tboot_sx_resume();
+		tboot_restore_stack();
 		break;
 	}
 
include/linux/tboot.h +6 -1
diff -r 42870e183bd5 include/linux/tboot.h
@@ -147,7 +147,9 @@ extern struct acpi_table_header *tboot_g
 extern struct acpi_table_header *tboot_get_dmar_table(
 				      struct acpi_table_header *dmar_tbl);
 extern int tboot_force_iommu(void);
-
+extern void tboot_sx_resume(void);
+extern void tboot_switch_stack(void);
+extern void tboot_restore_stack(void);
 #else
 
 #define tboot_probe()			do { } while (0)
@@ -156,6 +158,9 @@ extern int tboot_force_iommu(void);
 					do { } while (0)
 #define tboot_get_dmar_table(dmar_tbl)	(dmar_tbl)
 #define tboot_force_iommu()		0
+#define tboot_sx_resume()		do { } while (0)
+#define tboot_switch_stack()		do { } while (0)
+#define tboot_restore_stack()		do { } while (0)
 
 #endif /* !CONFIG_INTEL_TXT */
 
security/Kconfig +2 -0
diff -r 42870e183bd5 security/Kconfig
@@ -116,6 +116,8 @@ config INTEL_TXT
 config INTEL_TXT
 	bool "Enable Intel(R) Trusted Execution Technology (Intel(R) TXT)"
 	depends on HAVE_INTEL_TXT
+	select CRYPTO_VMAC
+	select CRYPTO_AES
 	help
 	  This option enables support for booting the kernel with the
 	  Trusted Boot (tboot) module. This will utilize

This patch added verification for userspace memory integrity after s3 resume. Integrity verification for other memory (say kernel itself) has been done by tboot.

arch/x86/kernel/tboot.c +170 -0

212 lines not on this page · raw message

drivers/acpi/sleep.c +4 -0
diff -r 42870e183bd5 drivers/acpi/sleep.c
@@ -16,6 +16,7 @@
 #include <linux/device.h>
 #include <linux/suspend.h>
 #include <linux/reboot.h>
+#include <linux/tboot.h>
 
 #include <asm/io.h>
 
@@ -244,7 +245,10 @@ static int acpi_suspend_enter(suspend_st
 		break;
 
 	case ACPI_STATE_S3:
+		tboot_switch_stack();
 		do_suspend_lowlevel();
+		tboot_sx_resume();
+		tboot_restore_stack();
 		break;
 	}
 
include/linux/tboot.h +6 -1
diff -r 42870e183bd5 include/linux/tboot.h
@@ -147,7 +147,9 @@ extern struct acpi_table_header *tboot_g
 extern struct acpi_table_header *tboot_get_dmar_table(
 				      struct acpi_table_header *dmar_tbl);
 extern int tboot_force_iommu(void);
-
+extern void tboot_sx_resume(void);
+extern void tboot_switch_stack(void);
+extern void tboot_restore_stack(void);
 #else
 
 #define tboot_probe()			do { } while (0)
@@ -156,6 +158,9 @@ extern int tboot_force_iommu(void);
 					do { } while (0)
 #define tboot_get_dmar_table(dmar_tbl)	(dmar_tbl)
 #define tboot_force_iommu()		0
+#define tboot_sx_resume()		do { } while (0)
+#define tboot_switch_stack()		do { } while (0)
+#define tboot_restore_stack()		do { } while (0)
 
 #endif /* !CONFIG_INTEL_TXT */
 
security/Kconfig +2 -0
diff -r 42870e183bd5 security/Kconfig
@@ -116,6 +116,8 @@ config INTEL_TXT
 config INTEL_TXT
 	bool "Enable Intel(R) Trusted Execution Technology (Intel(R) TXT)"
 	depends on HAVE_INTEL_TXT
+	select CRYPTO_VMAC
+	select CRYPTO_AES
 	help
 	  This option enables support for booting the kernel with the
 	  Trusted Boot (tboot) module. This will utilize
author
#2 lore raw

PATCH 1/1 intel_txt: fix the buggy timeout warning logic in tboot

This patch based on an original version by H. Peter Anvin fixed the buggy timeout warning logic in tboot.

---
 arch/x86/kernel/tboot.c |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)
arch/x86/kernel/tboot.c +5 -4
diff -r 0edd117ada44 arch/x86/kernel/tboot.c
@@ -301,16 +301,17 @@ static int tboot_wait_for_aps(int num_ap
 	unsigned long timeout;
 
 	timeout = AP_WAIT_TIMEOUT*HZ;
-	while (atomic_read((atomic_t *)&tboot->num_in_wfs) != num_aps &&
-	       timeout) {
+	while (timeout) {
+		if (atomic_read((atomic_t *)&tboot->num_in_wfs) == num_aps)
+			break;
 		mdelay(1);
 		timeout--;
 	}
 
-	if (timeout)
+	if (!timeout)
 		pr_warning("tboot wait for APs timeout\n");
 
-	return !(atomic_read((atomic_t *)&tboot->num_in_wfs) == num_aps);
+	return !timeout;
 }
 
 static int __cpuinit tboot_cpu_callback(struct notifier_block *nfb,

This patch based on an original version by H. Peter Anvin fixed the buggy timeout warning logic in tboot.

arch/x86/kernel/tboot.c +5 -4
diff -r 0edd117ada44 arch/x86/kernel/tboot.c
@@ -301,16 +301,17 @@ static int tboot_wait_for_aps(int num_ap
 	unsigned long timeout;
 
 	timeout = AP_WAIT_TIMEOUT*HZ;
-	while (atomic_read((atomic_t *)&tboot->num_in_wfs) != num_aps &&
-	       timeout) {
+	while (timeout) {
+		if (atomic_read((atomic_t *)&tboot->num_in_wfs) == num_aps)
+			break;
 		mdelay(1);
 		timeout--;
 	}
 
-	if (timeout)
+	if (!timeout)
 		pr_warning("tboot wait for APs timeout\n");
 
-	return !(atomic_read((atomic_t *)&tboot->num_in_wfs) == num_aps);
+	return !timeout;
 }
 
 static int __cpuinit tboot_cpu_callback(struct notifier_block *nfb,
#3 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

In reply to Shane Wang
Quoted 3 lines · Shane Wang

This patch added verification for userspace memory integrity after s3 resume. Integrity verification for other memory (say kernel itself) has been done by tboot.

AFAICT, it verifies userspace _and_ kernel memory, that's why it does magic stack switching. Why not verify everything in tboot?

Is kernel<->tboot abi described somewhere?

arch/x86/kernel/tboot.c static void tboot_create_trampoline(void · line 178

Quoted 6 lines
arch/x86/kernel/tboot.c +2 -0
@@ -168,6 +174,80 @@ static void tboot_create_trampoline(void
 		      map_base, map_size);
 }
 
+static vmac_t mem_mac;
+static struct crypto_hash *tfm;

Could these be automatic?

Quoted 19 lines
arch/x86/kernel/tboot.c +19 -0
+	for_each_online_pgdat(pgdat) {
+		for (i = 0, pfn = pgdat->node_start_pfn;
+			i < pgdat->node_spanned_pages;
+			i++, pfn = pgdat->node_start_pfn + i) {
+
+			if (!pfn_valid(pfn) || !page_is_ram(pfn))
+				continue;
+
+			page = pfn_to_page(pfn);
+			paddr = page_to_phys(page);
+
+			/* If pg will be MACed by tboot, no need to MAC here */
+			for (j = 0; j < tboot->num_mac_regions; j++) {
+				rstart = tboot->mac_regions[j].start;
+				rend = rstart +	tboot->mac_regions[j].size;
+				if (((paddr + PAGE_SIZE) <= rstart)
+					|| (rend <= paddr))
+					continue;
+				break;

arch/x86/kernel/tboot.c static void tboot_create_trampoline(void · line 239

Quoted 10 lines
arch/x86/kernel/tboot.c +10 -0
+			}
+
+			if (j == tboot->num_mac_regions) {
+				sg_set_page(sg, page, PAGE_SIZE, 0);
+				ret = crypto_hash_update(&desc, sg, PAGE_SIZE);
+				if (ret)
+					return ret;
+			}
+		}
+	}

This looks over all memory, afaict. Does it correctly handle highmem?

Quoted 18 lines
arch/x86/kernel/tboot.c +10 -0
@@ -197,6 +277,16 @@ static int tboot_setup_sleep(void)
 	/* kernel code + data + bss */
 	add_mac_region(virt_to_phys(_text), _end - _text);
 
+	/* stack */
+	add_mac_region(virt_to_phys(current_thread_info()), THREAD_SIZE);
+
+	/* MAC userspace memory not handled by tboot */
+	get_random_bytes(tboot->s3_key, sizeof(tboot->s3_key));
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mem_mac)) {
+		panic("tboot: vmac generation failed\n");
+		return -1;
+	}
+
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 
 	return 0;

arch/x86/kernel/tboot.c static int tboot_setup_sleep(void) · line 311

Quoted 10 lines
arch/x86/kernel/tboot.c +7 -0
@@ -212,6 +302,68 @@ static int tboot_setup_sleep(void)
 }
 
 #endif
+
+static struct thread_info *low_ti, *current_ti;
+
+static void tboot_do_stack_switch(struct thread_info *new_ti,
+				struct thread_info *old_ti)
+{
+	memcpy(new_ti, old_ti, THREAD_SIZE);

Memcpy does some rather odd stuff with fpu in some configs. Like... you may get copy of thread info with fpu marked enabled, while it really is disabled when memcpy exits.

Quoted 5 lines
arch/x86/kernel/tboot.c +5 -0
+#ifdef CONFIG_X86_32
+	asm volatile (
+		" and %0, %%esp;        "
+		" add %1, %%esp;        "
+		: : "i" (THREAD_SIZE - 1), "r" (new_ti));

arch/x86/kernel/tboot.c static int tboot_setup_sleep(void) · line 326

Quoted 10 lines
arch/x86/kernel/tboot.c +10 -0
+#else
+	asm volatile (
+		" and %0, %%rsp;        "
+		" add %1, %%rsp;        "
+		: : "i" (THREAD_SIZE - 1), "r" (new_ti));
+	percpu_write(kernel_stack, (unsigned long)new_ti -
+				KERNEL_STACK_OFFSET + THREAD_SIZE);
+#endif
+	current->stack = new_ti;
+}

This is pretty subtle&fragile -- see memcpy above. Why is it needed?

arch/x86/kernel/tboot.c static int tboot_setup_sleep(void) · line 339

Quoted 7 lines
arch/x86/kernel/tboot.c +7 -0
+	current_ti = current_thread_info();
+
+	/* If thread info is above 4G, then switch stack */
+	if (!((PFN_PHYS(PFN_DOWN(virt_to_phys(current_ti)))
+		+ (PFN_UP(THREAD_SIZE) << PAGE_SHIFT))
+		& 0xffffffff00000000ULL))
+		return;

How can thread info be above 4G on 32-bit?

Why does 4G limit matter on 64-bit?

arch/x86/kernel/tboot.c void tboot_sleep(u8 sleep_state, u32 pm1 · line 461

Quoted 13 lines
arch/x86/kernel/tboot.c +13 -0
+void tboot_sx_resume(void)
+{
+	vmac_t mac;
+
+	if (!tboot_enabled())
+		return;
+
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mac))
+		panic("tboot: vmac generation failed\n");
+	else if (mac != mem_mac)
+		panic("tboot: memory integrity was lost on resume\n");
+	else
+		pr_info("memory integrity OK\n");

So I corrupt memory, but also corrupt tboot_enabled() to return 0....

And... does panic kill the machine quickly enough that no 'bad stuff' happens? (Whats bad stuff in this context, anyway?).

drivers/acpi/sleep.c static int acpi_suspend_enter(suspend_st · line 254

Quoted 11 lines
drivers/acpi/sleep.c +3 -0
@@ -244,7 +245,10 @@ static int acpi_suspend_enter(suspend_st
 		break;
 
 	case ACPI_STATE_S3:
+		tboot_switch_stack();
 		do_suspend_lowlevel();
+		tboot_sx_resume();
+		tboot_restore_stack();
 		break;
 	}
 

Did you audit all code before sx_resume()? If it trusts data not checksummed by tboot, attacker may be able to hijack code execution and bypass your protection, no?

What about S1?

And what about hibernation, btw?
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#4 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 4 lines

So I corrupt memory, but also corrupt tboot_enabled() to return 0....

And... does panic kill the machine quickly enough that no 'bad stuff' happens? (Whats bad stuff in this context, anyway?).

panic has notifiers, so indeed someone could put arbitary code into panic.

-Andi

Signature · 1 line
[email protected] -- Speaking for myself only.
#5 lore raw

RE: [PATCH] intel_txt: add s3 userspace memory integrity verification

In reply to Pavel Machek

part of answers.

Quoted 8 lines · Pavel Machek
Quoted 4 lines · Shane Wang

This patch added verification for userspace memory integrity after s3 resume. Integrity verification for other memory (say kernel itself) has been done by tboot.

AFAICT, it verifies userspace _and_ kernel memory, that's why it does magic stack switching. Why not verify everything in tboot?

Because tboot only can access <4G mem and the memory is sparse. Tboot likes to MAC the continuous mem.

Quoted 10 lines

Is kernel<->tboot abi described somewhere?

arch/x86/kernel/tboot.c static void tboot_create_trampoline(void · line 177

Quoted 5 lines
arch/x86/kernel/tboot.c +2 -0
@@ -168,6 +174,80 @@ static void tboot_create_trampoline(void  		   
 map_base, map_size); }
 
+static vmac_t mem_mac;
+static struct crypto_hash *tfm;

Could these be automatic?

We don't wish the memory is changing when MACing, including the static variables.

Quoted 6 lines
Quoted 6 lines
arch/x86/kernel/tboot.c +6 -0
+void tboot_sx_resume(void)
+{
+	vmac_t mac;
+
+	if (!tboot_enabled())
+		return;
Quoted 8 lines

arch/x86/kernel/tboot.c void tboot_sleep(u8 sleep_state, u32 pm1 · line 461

Quoted 6 lines
arch/x86/kernel/tboot.c +6 -0
+
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mac))
+		panic("tboot: vmac generation failed\n");
+	else if (mac != mem_mac)
+		panic("tboot: memory integrity was lost on resume\n"); +	else
+		pr_info("memory integrity OK\n");

So I corrupt memory, but also corrupt tboot_enabled() to return 0....

You corrupt the memory and tboot_enabled(). tboot MACing will find it.

Quoted 2 lines

And... does panic kill the machine quickly enough that no 'bad stuff' happens? (Whats bad stuff in this context, anyway?).

Do you have some suggestions on it?

Shane

#6 lore raw

RE: [PATCH] intel_txt: add s3 userspace memory integrity verification

In reply to Pavel Machek

(Sorry for so late response)

Thanks.
Shane

Quoted 8 lines · Pavel Machek
Quoted 4 lines · Shane Wang

This patch added verification for userspace memory integrity after s3 resume. Integrity verification for other memory (say kernel itself) has been done by tboot.

AFAICT, it verifies userspace _and_ kernel memory, that's why it does magic stack switching. Why not verify everything in tboot?

Because tboot only can access <4G mem without paging. And the memory is sparse. We can't/needn't set unlimited sparse mem ranges to the MAC array with limited elements in the shared page, in order to pass the parameters. On the other hand, it is reasonable for tboot to verify kernel, and kernel to verify userspace memory.

Quoted 7 lines

arch/x86/kernel/tboot.c static void tboot_create_trampoline(void · line 177

Quoted 5 lines
arch/x86/kernel/tboot.c +2 -0
@@ -168,6 +174,80 @@ static void tboot_create_trampoline(void  		   
 map_base, map_size); }
 
+static vmac_t mem_mac;
+static struct crypto_hash *tfm;

Could these be automatic?

Maybe, but I don't wish other files can access the variables and take tfm as an example, I'd like to allocate memory to it once and then initialize it once in order to avoid impact of memory change to MACing.

Quoted 23 lines
Quoted 23 lines
arch/x86/kernel/tboot.c +22 -0
+	for_each_online_pgdat(pgdat) {
+		for (i = 0, pfn = pgdat->node_start_pfn;
+			i < pgdat->node_spanned_pages;
+			i++, pfn = pgdat->node_start_pfn + i) {
+
+			if (!pfn_valid(pfn) || !page_is_ram(pfn))
+				continue;
+
+			page = pfn_to_page(pfn);
+			paddr = page_to_phys(page);
+
+			/* If pg will be MACed by tboot, no need to MAC here */
+			for (j = 0; j < tboot->num_mac_regions; j++) {
+				rstart = tboot->mac_regions[j].start;
+				rend = rstart +	tboot->mac_regions[j].size;
+				if (((paddr + PAGE_SIZE) <= rstart)
+					|| (rend <= paddr))
+					continue;
+				break;
+			}
+
+			if (j == tboot->num_mac_regions) {
Quoted 8 lines

arch/x86/kernel/tboot.c static void tboot_create_trampoline(void · line 239

Quoted 6 lines
arch/x86/kernel/tboot.c +6 -0
+				sg_set_page(sg, page, PAGE_SIZE, 0);
+				ret = crypto_hash_update(&desc, sg, PAGE_SIZE); +				if (ret)
+					return ret;
+			}
+		}
+	}

This looks over all memory, afaict. Does it correctly handle highmem?

It looks over all online memory, and should handle highmem since highmem has been added into the online nodes. refer to show_mem() in lib/show_mem.c.

Quoted 19 lines
Quoted 19 lines
arch/x86/kernel/tboot.c +9 -0
@@ -197,6 +277,16 @@ static int tboot_setup_sleep(void)
 	/* kernel code + data + bss */
 	add_mac_region(virt_to_phys(_text), _end - _text);
 
+	/* stack */
+	add_mac_region(virt_to_phys(current_thread_info()), THREAD_SIZE); +
+	/* MAC userspace memory not handled by tboot */
+	get_random_bytes(tboot->s3_key, sizeof(tboot->s3_key));
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mem_mac)) {
+		panic("tboot: vmac generation failed\n");
+		return -1;
+	}
+
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 
 	return 0;
@@ -212,6 +302,68 @@ static int tboot_setup_sleep(void)  }
 
Quoted 12 lines

arch/x86/kernel/tboot.c static int tboot_setup_sleep(void) · line 311

Quoted 8 lines
arch/x86/kernel/tboot.c +7 -0
 #endif
+
+static struct thread_info *low_ti, *current_ti;
+
+static void tboot_do_stack_switch(struct thread_info *new_ti,
+				struct thread_info *old_ti)
+{
+	memcpy(new_ti, old_ti, THREAD_SIZE);

Memcpy does some rather odd stuff with fpu in some configs. Like... you may get copy of thread info with fpu marked enabled, while it really is disabled when memcpy exits.

We gave up thread_info but stack, like interrupt stack and call.

Quoted 10 lines
Quoted 10 lines
arch/x86/kernel/tboot.c +9 -0
+#ifdef CONFIG_X86_32
+	asm volatile (
+		" and %0, %%esp;        "
+		" add %1, %%esp;        "
+		: : "i" (THREAD_SIZE - 1), "r" (new_ti));
+#else
+	asm volatile (
+		" and %0, %%rsp;        "
+		" add %1, %%rsp;        "
Quoted 8 lines

arch/x86/kernel/tboot.c static int tboot_setup_sleep(void) · line 326

Quoted 6 lines
arch/x86/kernel/tboot.c +6 -0
+		: : "i" (THREAD_SIZE - 1), "r" (new_ti));
+	percpu_write(kernel_stack, (unsigned long)new_ti -
+				KERNEL_STACK_OFFSET + THREAD_SIZE);
+#endif
+	current->stack = new_ti;
+}

This is pretty subtle&fragile -- see memcpy above. Why is it needed?

Gave it up.

Quoted 10 lines

arch/x86/kernel/tboot.c static int tboot_setup_sleep(void) · line 339

Quoted 8 lines
arch/x86/kernel/tboot.c +7 -0
+	current_ti = current_thread_info();
+
+	/* If thread info is above 4G, then switch stack */
+	if (!((PFN_PHYS(PFN_DOWN(virt_to_phys(current_ti)))
+		+ (PFN_UP(THREAD_SIZE) << PAGE_SHIFT))
+		& 0xffffffff00000000ULL))
+		return;

How can thread info be above 4G on 32-bit?

OK, I fixed it.

Quoted 2 lines

Why does 4G limit matter on 64-bit?

tboot can't access >4G, see above.

Quoted 22 lines

arch/x86/kernel/tboot.c void tboot_sleep(u8 sleep_state, u32 pm1 · line 461

Quoted 13 lines
arch/x86/kernel/tboot.c +12 -0
+void tboot_sx_resume(void)
+{
+	vmac_t mac;
+
+	if (!tboot_enabled())
+		return;
+
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mac))
+		panic("tboot: vmac generation failed\n");
+	else if (mac != mem_mac)
+		panic("tboot: memory integrity was lost on resume\n"); +	else
+		pr_info("memory integrity OK\n");

So I corrupt memory, but also corrupt tboot_enabled() to return 0....

And... does panic kill the machine quickly enough that no 'bad stuff' happens? (Whats bad stuff in this context, anyway?).

Quoted 3 lines
(quoted diff) +0 -0
@@ -244,7 +245,10 @@ static int acpi_suspend_enter(suspend_st 
 break; 
 
Quoted 12 lines

drivers/acpi/sleep.c static int acpi_suspend_enter(suspend_st · line 254

Quoted 8 lines
drivers/acpi/sleep.c +3 -0
 	case ACPI_STATE_S3:
+		tboot_switch_stack();
 		do_suspend_lowlevel();
+		tboot_sx_resume();
+		tboot_restore_stack();
 		break;
 	}
 

Did you audit all code before sx_resume()? If it trusts data not checksummed by tboot, attacker may be able to hijack code execution and bypass your protection, no?

Yes, kernel code is audited by tboot before resume.

Quoted 4 lines

What about S1?

And what about hibernation, btw

No need memory MACing for S1/S4, it is another way in the tboot code.

Quoted 1 line

Pavel

#7 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Hi!

Please wrap mails at column 72 (or so).

Quoted 5 lines
Quoted 2 lines

AFAICT, it verifies userspace _and_ kernel memory, that's why it does magic stack switching. Why not verify everything in tboot?

Because tboot only can access <4G mem without paging. And the memory is sparse. We can't/needn't set unlimited sparse mem ranges to the MAC array with limited elements in the shared page, in order to pass the parameters. On the other hand, it is reasonable for tboot to verify kernel, and kernel to verify userspace memory.

Are you sure x86-64 kernel & modules is always below 4GB? I don't think so.

Quoted 6 lines
Quoted 4 lines

Review

Quoted 2 lines
(quoted diff) +2 -0
+static vmac_t mem_mac;
+static struct crypto_hash *tfm;

Could these be automatic?

Maybe, but I don't wish other files can access the variables and take tfm as an example, I'd like to allocate memory to it once and then initialize it once in order to avoid impact of memory change to MACing.

You use stack, anyway.

Quoted 2 lines
Quoted 1 line

Why does 4G limit matter on 64-bit?

tboot can't access >4G, see above.

Too bad, then its broken by design.

Quoted 10 lines
Quoted 10 lines

arch/x86/kernel/tboot.c void tboot_sleep(u8 sleep_state, u32 pm1 · line 461

Quoted 5 lines
arch/x86/kernel/tboot.c +5 -0
+	if (tboot_gen_mem_integrity(tboot->s3_key, &mac))
+		panic("tboot: vmac generation failed\n");
+	else if (mac != mem_mac)
+		panic("tboot: memory integrity was lost on resume\n"); +	else
+		pr_info("memory integrity OK\n");

So I corrupt memory, but also corrupt tboot_enabled() to return 0....

And... does panic kill the machine quickly enough that no 'bad stuff' happens? (Whats bad stuff in this context, anyway?).

I'd really like you to answer that.

Quoted 15 lines
Quoted 15 lines

drivers/acpi/sleep.c static int acpi_suspend_enter(suspend_st · line 254

Quoted 11 lines
drivers/acpi/sleep.c +3 -0
@@ -244,7 +245,10 @@ static int acpi_suspend_enter(suspend_st 
 break; 
 
 	case ACPI_STATE_S3:
+		tboot_switch_stack();
 		do_suspend_lowlevel();
+		tboot_sx_resume();
+		tboot_restore_stack();
 		break;
 	}
 

Did you audit all code before sx_resume()? If it trusts data not checksummed by tboot, attacker may be able to hijack code execution and bypass your protection, no?

Quoted 1 line

Yes, kernel code is audited by tboot before resume.

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#8 lore raw

RE: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 10 lines

From: Pavel Machek [mailto:[email protected]]
Sent: Friday, December 04, 2009 12:20 AM

Hi!

Please wrap mails at column 72 (or so).

Quoted 3 lines
Quoted 2 lines

AFAICT, it verifies userspace _and_ kernel memory, that's why it does magic stack switching. Why not verify everything in tboot?

Because tboot only can access <4G mem without paging. And the memory is sparse. We

Quoted 8 lines

can't/needn't set unlimited sparse mem ranges to the MAC array with limited elements in the shared page, in order to pass the parameters.

Quoted 1 line

On the other hand, it is reasonable for tboot to verify kernel, and kernel to verify

userspace memory.

Quoted 1 line

Are you sure x86-64 kernel & modules is always below 4GB? I don't think so.

The only part of the kernel that really needs to be below 4GB is what is used by the code on resume to do the MAC verification of the remainder of the memory. This is all static code and variables. The regions we pass to tboot for MAC'ing are:

S3 real mode resume code:  acpi_wakeup_address, WAKEUP_SIZE
AP trampoline code:  virt_to_phys(trampoline_base), TRAMPOLINE_SIZE
kernel static code and data:  virt_to_phys(_text), _end - _text

the stack we use (either new one or existing depending--see code):
virt_to_phys(new_stack), IRQ_STACK_SIZE virt_to_phys(current_thread_info()), THREAD_SIZE

Can you post a .config and platform configuration for which the tboot, MAC, or do_suspend_lowlevel() are not within the regions above? We'll be happy to address the issue once we understand the conditions.

Quoted 10 lines
Quoted 5 lines
Quoted 4 lines

Review

Quoted 2 lines
(quoted diff) +2 -0
+static vmac_t mem_mac;
+static struct crypto_hash *tfm;

Could these be automatic?

Maybe, but I don't wish other files can access the variables and take tfm as an example, I'd

like to allocate memory to it once and then initialize it once in order to avoid impact of memory change to MACing.

Quoted 1 line

You use stack, anyway.

Do you mean as static local variables? If so, I'm not sure if that would be any better.

Quoted 4 lines
Quoted 2 lines
Quoted 1 line

Why does 4G limit matter on 64-bit?

tboot can't access >4G, see above.

Too bad, then its broken by design.

See above.

Quoted 6 lines
Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
arch/x86/kernel/tboot.c +5 -0
+        if (tboot_gen_mem_integrity(tboot->s3_key, &mac))
+                panic("tboot: vmac generation failed\n");
+        else if (mac != mem_mac)
+                panic("tboot: memory integrity was lost on resume\n"); +        else
+                pr_info("memory integrity OK\n");
Quoted 6 lines
Quoted 4 lines
Quoted 4 lines

So I corrupt memory, but also corrupt tboot_enabled() to return 0....

And... does panic kill the machine quickly enough that no 'bad stuff' happens? (Whats bad stuff in this context, anyway?).

I'd really like you to answer that.

"bad stuff" would be the execution of any code (or use of any data that affects execution) that was not verified by tboot. As long as panic() is within the code ranges MAC'ed by tboot (see above), it would be covered. Do you know of some panic() code paths that are outside of this?

Quoted 15 lines
Quoted 15 lines
Quoted 15 lines

drivers/acpi/sleep.c static int acpi_suspend_enter(suspend_st · line 254

Quoted 11 lines
drivers/acpi/sleep.c +3 -0
@@ -244,7 +245,10 @@ static int acpi_suspend_enter(suspend_st
 break;
 
         case ACPI_STATE_S3:
+                tboot_switch_stack();
                 do_suspend_lowlevel();
+                tboot_sx_resume();
+                tboot_restore_stack();
                 break;
         }
 

Did you audit all code before sx_resume()? If it trusts data not checksummed by tboot, attacker may be able to hijack code execution and bypass your protection, no?

Quoted 4 lines
Quoted 1 line

Yes, kernel code is audited by tboot before resume.

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.

We aren't aware of any code or data used by the resume path that is outside of the tboot-MAC'ed regions above--if you can point out any then we will gladly address them.

Quoted 4 lines

Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

#9 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 2 lines

"bad stuff" would be the execution of any code (or use of any data that affects execution) that was not verified by tboot. As long as panic() is within the code ranges MAC'ed by tboot (see above), it would be covered. Do you know of some panic() code paths that are outside of this?

Not code path, but the code called by panic (console drivers, debuggers etc.) can well use data that is stored >4GB

This can include structures with indirect pointers, like notifier chains.

Notifier chains have a special checker than can check for <4GB, but there are other call vectors too.

Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
Quoted 2 lines

checksummed by tboot, attacker may be able to hijack code execution and bypass your protection, no?

Yes, kernel code is audited by tboot before resume.

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.

We aren't aware of any code or data used by the resume path that is outside of the tboot-MAC'ed regions above--if you can point out any then we will gladly address them.

Code coverage is not enough, you need data coverage too. If someone modifies kernel data it's typically easy to subvert code as a next step.

-Andi

Signature · 1 line
[email protected] -- Speaking for myself only.
#10 lore raw

RE: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 8 lines

From: Andi Kleen [mailto:[email protected]]
Sent: Friday, December 04, 2009 9:14 AM

Quoted 1 line

"bad stuff" would be the execution of any code (or use of any data that affects execution)

that was not verified by tboot. As long as panic() is within the code ranges MAC'ed by tboot (see above), it would be covered. Do you know of some panic() code paths that are outside of this?

Quoted 7 lines

Not code path, but the code called by panic (console drivers, debuggers etc.) can well use data that is stored >4GB

This can include structures with indirect pointers, like notifier chains.

Notifier chains have a special checker than can check for <4GB, but there are other call vectors too.

Since, as you pointed out in a previous email, it is doubtful that there will be any user-visible output at this point, we can change this path to a tboot reset (which will give us some serial output at least). Is it going to be similarly unsafe to do a printk()?

Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
Quoted 3 lines
Quoted 2 lines

checksummed by tboot, attacker may be able to hijack code execution and bypass your protection, no?

Yes, kernel code is audited by tboot before resume.

Quoted 8 lines
Quoted 4 lines
Quoted 2 lines

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.

We aren't aware of any code or data used by the resume path that is outside of the tboot-

MAC'ed regions above--if you can point out any then we will gladly address them.

Code coverage is not enough, you need data coverage too. If someone modifies kernel data it's typically easy to subvert code as a next step.

Agreed, which is why I said "code or data". We'll take another look at the couple of fns that are within this path, but if you have any specific examples can you please post them.

Quoted 5 lines

-Andi
--
[email protected] -- Speaking for myself only.

#11 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 11 lines · Joseph
Quoted 11 lines

From: Andi Kleen [mailto:[email protected]]
Sent: Friday, December 04, 2009 9:14 AM

Quoted 1 line

"bad stuff" would be the execution of any code (or use of any data that affects execution)

that was not verified by tboot. As long as panic() is within the code ranges MAC'ed by tboot (see above), it would be covered. Do you know of some panic() code paths that are outside of this?

Not code path, but the code called by panic (console drivers, debuggers etc.) can well use data that is stored >4GB

Quoted 6 lines
Quoted 4 lines

This can include structures with indirect pointers, like notifier chains.

Notifier chains have a special checker than can check for <4GB, but there are other call vectors too.

Since, as you pointed out in a previous email, it is doubtful that there will be any user-visible output at this point, we can change this path to a tboot reset (which will give us some serial output at least). Is it going to be similarly unsafe to do a printk()?

Yes printk is similarly unsafe. It calls all the console machinery, which has a lot of data.

Perhaps early_printk(), that is relatively self contained, but doesn't always work.

Of course you would need to have a timeout before reset, and at this point the delay loops are not calibrated yet, so you don't know how to wait.

-Andi

Signature · 1 line
[email protected] -- Speaking for myself only.
#12 lore raw

RE: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 27 lines

From: Andi Kleen [mailto:[email protected]]
Sent: Friday, December 04, 2009 12:10 PM

Quoted 4 lines · Joseph
Quoted 4 lines

From: Andi Kleen [mailto:[email protected]]
Sent: Friday, December 04, 2009 9:14 AM

Quoted 1 line

"bad stuff" would be the execution of any code (or use of any data that affects

execution)

Quoted 1 line
Quoted 1 line

that was not verified by tboot. As long as panic() is within the code ranges MAC'ed by

tboot

Quoted 1 line
Quoted 1 line

(see above), it would be covered. Do you know of some panic() code paths that are outside

of

Quoted 11 lines
Quoted 9 lines

this?

Not code path, but the code called by panic (console drivers, debuggers etc.) can well use data that is stored >4GB

This can include structures with indirect pointers, like notifier chains.

Notifier chains have a special checker than can check for <4GB, but there are other call vectors too.

Since, as you pointed out in a previous email, it is doubtful that there will be any user-

visible output at this point, we can change this path to a tboot reset (which will give us some serial output at least). Is it going to be similarly unsafe to do a printk()?

Quoted 8 lines

Yes printk is similarly unsafe. It calls all the console machinery, which has a lot of data.

Perhaps early_printk(), that is relatively self contained, but doesn't always work.

Of course you would need to have a timeout before reset, and at this point the delay loops are not calibrated yet, so you don't know how to wait.

I would expect that early_printk() coupled with tboot's serial output would be sufficient for a case such as this. If we've done our work correctly, loss of integrity should only occur when the system is attacked across the S3 transition--which should be fairly rare and which should place a premium on prevention of the attacked code from executing. Esp. on servers, there may not be anyone to see console output anyway. Does early_printk() and a tboot reset seem like a reasonable approach?

Quoted 5 lines

-Andi

--
[email protected] -- Speaking for myself only.

#13 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 2 lines
Quoted 2 lines

Of course you would need to have a timeout before reset, and at this point the delay loops are not calibrated yet, so you don't know how to wait.

That was actually wrong, since you're coming back from S3 udelay should work. nm.

Quoted 2 lines

I would expect that early_printk() coupled with tboot's serial output would be sufficient for a case such as this. If we've done our work correctly, loss of integrity should only occur when the system is attacked across the S3 transition--which should be fairly rare and which should place a premium on prevention of the attacked code from executing. Esp. on servers, there may not be anyone to see console output anyway. Does early_printk() and a tboot reset seem like a reasonable approach?

At least classical vga/serial early_printk should be safe, I'm not sure about the early USB code recently added though, some auditing on that first would be good.

early_printk defaults to VGA text output, so if you do a reset you would need a delay first, otherwise noone can see it ever. But one could be done with udelay()

It'll be also invisible with frame buffer active, which is the common case for distributions. So basically in most cases the message would be invisible.

(not that panic is much better by default in this regard though, at least not without Jesse's recent frame buffer work ...)

-Andi

Signature · 1 line
[email protected] -- Speaking for myself only.
#14 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

In reply to Cihula, Joseph
Quoted 3 lines · Joseph

I would expect that early_printk() coupled with tboot's serial output would be sufficient for a case such as this. If we've done our work correctly, loss of integrity should only occur when the system is attacked across the S3 transition--which should be fairly rare and which should place a premium on prevention of the attacked code from executing. Esp. on servers, there may not be anyone to see console output anyway. Does early_printk() and a tboot reset seem like a reasonable approach?

The zeroeth-order thing is you should reliably crash and reboot. This is pretty normal for most S3 resume failures anyway, so although it is somewhat unfortunate for debugging, it is isn't exactly an unreasonable thing to do.

Getting a message out is a nice plus, but not a requirement. Guaranteeing the integrity is an absolute requirement.

-hpa

#15 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

In reply to Andi Kleen
Quoted 9 lines · Andi Kleen
Quoted 5 lines
Quoted 3 lines

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.

We aren't aware of any code or data used by the resume path that is outside of the tboot-MAC'ed regions above--if you can point out any then we will gladly address them.

Code coverage is not enough, you need data coverage too. If someone modifies kernel data it's typically easy to subvert code as a next step.

The only function pointers that are invoked on the do_suspend_lowlevel path are some paravirt_crap pointers, but those are located inside kernel static data.

This is not to say that this isn't a new constraint, and should be documented, and checked ahead of time...

-hpa

Signature · 2 lines
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.
#16 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 7 lines · H. Peter Anvin
Quoted 6 lines · Andi Kleen
Quoted 5 lines
Quoted 3 lines

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.

We aren't aware of any code or data used by the resume path that is outside of the tboot-MAC'ed regions above--if you can point out any then we will gladly address them.

Quoted 7 lines
Quoted 3 lines

Code coverage is not enough, you need data coverage too. If someone modifies kernel data it's typically easy to subvert code as a next step.

The only function pointers that are invoked on the do_suspend_lowlevel path are some paravirt_crap pointers, but those are located inside kernel static data.

Was referring to panic(), like Pavel said.

It would be relatively easy to subvert something called by panic that just jumps back to after the MAC checks.

-Andi

Signature · 1 line
[email protected] -- Speaking for myself only.
#17 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

In reply to H. Peter Anvin
Quoted 7 lines · H. Peter Anvin
Quoted 6 lines · Andi Kleen
Quoted 5 lines
Quoted 3 lines

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.

We aren't aware of any code or data used by the resume path that is outside of the tboot-MAC'ed regions above--if you can point out any then we will gladly address them.

Quoted 7 lines
Quoted 3 lines

Code coverage is not enough, you need data coverage too. If someone modifies kernel data it's typically easy to subvert code as a next step.

The only function pointers that are invoked on the do_suspend_lowlevel path are some paravirt_crap pointers, but those are located inside kernel static data.

What guarantees kernel static data are below 4GB? What prevents me from booting with funny memmap where first 1MB is mapped, and then memory above 4GB? What prevents Chinese company to ship machine with such funny memmap?
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#18 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

In reply to Cihula, Joseph
Quoted 19 lines · Joseph
Quoted 10 lines

From: Pavel Machek [mailto:[email protected]]
Sent: Friday, December 04, 2009 12:20 AM

Hi!

Please wrap mails at column 72 (or so).

Quoted 3 lines
Quoted 2 lines

AFAICT, it verifies userspace _and_ kernel memory, that's why it does magic stack switching. Why not verify everything in tboot?

Because tboot only can access <4G mem without paging. And the memory is sparse. We

Quoted 8 lines

can't/needn't set unlimited sparse mem ranges to the MAC array with limited elements in the shared page, in order to pass the parameters.

Quoted 1 line

On the other hand, it is reasonable for tboot to verify kernel, and kernel to verify

userspace memory.

Quoted 1 line

Are you sure x86-64 kernel & modules is always below 4GB? I don't think so.

Quoted 8 lines

The only part of the kernel that really needs to be below 4GB is what is used by the code on resume to do the MAC verification of the remainder of the memory. This is all static code and variables. The regions we pass to tboot for MAC'ing are:

S3 real mode resume code:  acpi_wakeup_address, WAKEUP_SIZE
AP trampoline code:  virt_to_phys(trampoline_base), TRAMPOLINE_SIZE
kernel static code and data:  virt_to_phys(_text), _end - _text

the stack we use (either new one or existing depending--see code):
virt_to_phys(new_stack), IRQ_STACK_SIZE virt_to_phys(current_thread_info()), THREAD_SIZE

Yes, so... what guarantees these actually are under 4GB? Perhaps you should put them to spearate section and use linker magic?

You certainly should annotate them somehow so people modifying the code know about this new requirement.

Quoted 2 lines

Can you post a .config and platform configuration for which the tboot, MAC, or do_suspend_lowlevel() are not within the regions above? We'll be happy to address the issue once we understand the conditions.

Can you prove that for all .config s on all machines they are under 4GB? On all future kernels, too? I thought so.

Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines

Review

Quoted 2 lines
(quoted diff) +2 -0
+static vmac_t mem_mac;
+static struct crypto_hash *tfm;

Could these be automatic?

Quoted 9 lines
Quoted 6 lines
Quoted 1 line

Maybe, but I don't wish other files can access the variables and take tfm as an example, I'd

like to allocate memory to it once and then initialize it once in order to avoid impact of memory change to MACing.

Quoted 1 line

You use stack, anyway.

Do you mean as static local variables? If so, I'm not sure if that would be any better.

Those two variables (mem_mac and tfm) are static. I do not think they need to be, and code would be much nicer if they were not.

Quoted 9 lines
Quoted 6 lines
Quoted 4 lines
Quoted 4 lines

So I corrupt memory, but also corrupt tboot_enabled() to return 0....

And... does panic kill the machine quickly enough that no 'bad stuff' happens? (Whats bad stuff in this context, anyway?).

I'd really like you to answer that.

"bad stuff" would be the execution of any code (or use of any data that affects execution) that was not verified by tboot. As long as panic() is within the code ranges MAC'ed by tboot (see above), it would be covered. Do you know of some panic() code paths that are outside of this?

(Please wrap at column 72).

Yes, I know that panic() has problems.

Quoted 10 lines
Quoted 7 lines
Quoted 4 lines
Quoted 3 lines

Did you audit all code before sx_resume()? If it trusts data not checksummed by tboot, attacker may be able to hijack code execution and bypass your protection, no?

Yes, kernel code is audited by tboot before resume.

So no, you did not audit do_suspend_lowlevel to make sure it does not follow function pointers. Bad.

We aren't aware of any code or data used by the resume path that is outside of the tboot-MAC'ed regions above--if you can point out any then we will gladly address them.

I'm asking you to do the code audit, and you tell me to do it myself. I'm not interested in doing your work. Yes, they are some obvious places (like panic), that you missed. There are probably more.

Design your code properly so that it does not depend on details like that. That means checksumming in tboot.

[Or do the auditing work. But don't try playing "we fixed all bugs you told us about, so it must be perfect" game with me.]
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#19 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 3 lines · Pavel Machek
Quoted 3 lines
Quoted 3 lines

Are you sure x86-64 kernel & modules is always below 4GB? I don't think so.

The x86-64 kernel is run where it is loaded by the boot loader. For most boot loaders, that will mean < 4 GB. This is not the case for modules, and they cannot and should not rely on modules inside restricted zone.

This effectively becomes a constraint on whatever boot loader is used to load the kernel for it to be compatible with tboot.

-hpa

#20 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 5 lines · H. Peter Anvin
Quoted 3 lines · Pavel Machek
Quoted 3 lines
Quoted 3 lines

Are you sure x86-64 kernel & modules is always below 4GB? I don't think so.

Quoted 7 lines

The x86-64 kernel is run where it is loaded by the boot loader. For most boot loaders, that will mean < 4 GB. This is not the case for modules, and they cannot and should not rely on modules inside restricted zone.

This effectively becomes a constraint on whatever boot loader is used to load the kernel for it to be compatible with tboot.

Having "security" technology that silently fails with funny bootloader is pretty bad, I'd say.

Instead of doing this properly (in tboot), Joseph hopes to save some work by basically splitting kernel into two parts, "trusted" and "untrusted". But doing that properly would be too much work, so he just handwaves and hopes for the best.

Unfortunately that

a) does not work (panic, printks)

b) places funny constraints all over the code (documenting them would be too much work, so we get more handwaving)

c) reduces future flexibility (trusted code can not be over 4GB, it is silent security hole when it is)

I'd prefer to see this done properly; tboot should simply verify all the memory for us. It is separate piece of code, trusted, and can probably fit itself under 4GB.

If that seems like too much work, then please go all over the code, and mark all the code that is "trusted" (has to be under 4GB) and properly document it, so that future modifications will not break that assumption. Putting all that code into one section should be enough.

(Going into infinite loop is probably enough when memory corruption is detected; there's no chance you can put printk/panic/neccessary drivers all into the "trusted" section.)

Aha, and look. Your tboot_gen_mem_integrity is ran on resume, so it is "trusted". Unfortunately, it calls crypto_alloc_hash, so you need to audit that, and probably kmalloc it boils down into. I bet kmalloc touches memory >4GB. And I bet crypto modules can be
... well... modules. That means over 4GB.

This is broken by design, right?
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#21 lore raw

Re: [PATCH] intel_txt: add s3 userspace memory integrity verification

Quoted 4 lines · Pavel Machek

Having "security" technology that silently fails with funny bootloader is pretty bad, I'd say.

Yes, but this wouldn't be a silent failure -- such a boot loader wouldn't be able to boot tboot itself either, nor would be able to boot 32-bit kernels (which, in fact, not all boot loaders can); the tboot boot process in fact in many ways treats tboot itself as a 32-bit primary kernel, with the Linux kernel as a secondary kernel.

So, this particular failure would not be silent by any means.

-hpa

#22 lore raw

PATCH v2 1/1 intel_txt: add support for S3 memory integrity protection within Intel(R) TXT launched kernel

In reply to Pavel Machek

v2: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

 Documentation/intel_txt.txt |   14 +++++++-------
 MAINTAINERS                 |   11 +++++++++++
 arch/x86/include/asm/e820.h |    7 ++++++-
 arch/x86/kernel/tboot.c     |   17 ++++++++---------
 4 files changed, 32 insertions(+), 17 deletions(-)
Documentation/intel_txt.txt +7 -7
diff -r d2911aa1461d Documentation/intel_txt.txt
@@ -161,13 +161,13 @@ o  In order to put a system into any of 
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
 
 That's pretty much it for TXT support.
 
MAINTAINERS +11 -0
diff -r d2911aa1461d MAINTAINERS
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
 F:	Documentation/networking/README.ipw2200
 F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:	Inaky Perez-Gonzalez <[email protected]>
 M:	[email protected]
arch/x86/include/asm/e820.h +6 -1
diff -r d2911aa1461d arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
 #define E820_NVS	4
 #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__
arch/x86/kernel/tboot.c +8 -9
diff -r d2911aa1461d arch/x86/kernel/tboot.c
@@ -139,18 +139,17 @@ static void add_mac_region(phys_addr_t s
 
 static void __init tboot_setup_sleep(void)
 {
+	int i;
+
 	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 }

v2: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

Documentation/intel_txt.txt +7 -7
diff -r d2911aa1461d Documentation/intel_txt.txt
@@ -161,13 +161,13 @@ o  In order to put a system into any of 
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
 
 That's pretty much it for TXT support.
 
MAINTAINERS +11 -0
diff -r d2911aa1461d MAINTAINERS
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
 F:	Documentation/networking/README.ipw2200
 F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:	Inaky Perez-Gonzalez <[email protected]>
 M:	[email protected]
arch/x86/include/asm/e820.h +6 -1
diff -r d2911aa1461d arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
 #define E820_NVS	4
 #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__
arch/x86/kernel/tboot.c +8 -9
diff -r d2911aa1461d arch/x86/kernel/tboot.c
@@ -139,18 +139,17 @@ static void add_mac_region(phys_addr_t s
 
 static void __init tboot_setup_sleep(void)
 {
+	int i;
+
 	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 }
#23 lore raw

PATCH v2 1/1 intel_txt: add support for S3 memory integrity protection within Intel(R) TXT launched kernel

In reply to Pavel Machek

v2: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

 Documentation/intel_txt.txt |   14 +++++++-------
 MAINTAINERS                 |   11 +++++++++++
 arch/x86/include/asm/e820.h |    7 ++++++-
 arch/x86/kernel/tboot.c     |   17 ++++++++---------
 4 files changed, 32 insertions(+), 17 deletions(-)
Documentation/intel_txt.txt +7 -7
diff -r d2911aa1461d Documentation/intel_txt.txt
@@ -161,13 +161,13 @@ o  In order to put a system into any of 
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
 
 That's pretty much it for TXT support.
 
MAINTAINERS +11 -0
diff -r d2911aa1461d MAINTAINERS
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
 F:	Documentation/networking/README.ipw2200
 F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:	Inaky Perez-Gonzalez <[email protected]>
 M:	[email protected]
arch/x86/include/asm/e820.h +6 -1
diff -r d2911aa1461d arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
 #define E820_NVS	4
 #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__
arch/x86/kernel/tboot.c +8 -9
diff -r d2911aa1461d arch/x86/kernel/tboot.c
@@ -139,18 +139,17 @@ static void add_mac_region(phys_addr_t s
 
 static void __init tboot_setup_sleep(void)
 {
+	int i;
+
 	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 }

v2: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

Documentation/intel_txt.txt +7 -7
diff -r d2911aa1461d Documentation/intel_txt.txt
@@ -161,13 +161,13 @@ o  In order to put a system into any of 
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
 
 That's pretty much it for TXT support.
 
MAINTAINERS +11 -0
diff -r d2911aa1461d MAINTAINERS
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
 F:	Documentation/networking/README.ipw2200
 F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:	Inaky Perez-Gonzalez <[email protected]>
 M:	[email protected]
arch/x86/include/asm/e820.h +6 -1
diff -r d2911aa1461d arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
 #define E820_NVS	4
 #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__
arch/x86/kernel/tboot.c +8 -9
diff -r d2911aa1461d arch/x86/kernel/tboot.c
@@ -139,18 +139,17 @@ static void add_mac_region(phys_addr_t s
 
 static void __init tboot_setup_sleep(void)
 {
+	int i;
+
 	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 }
#24 lore raw

Re: [PATCH v2] intel_txt: add support for S3 memory integrity protection within Intel(R) TXT launched kernel

Quoted 4 lines

v2: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

Please wrap at 80 columns.

Quoted 5 lines

The MAINTAINERS file is also updated to reflect the maintainers of
the TXT-related code.

Certainly looks better now. ACK.

Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#25 lore raw

Re: [PATCH v2] intel_txt: add support for S3 memory integrity protection within Intel(R) TXT launched kernel

In reply to Wang, Shane
Quoted 4 lines

v2: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

Please wrap at 80 columns.

Quoted 5 lines

The MAINTAINERS file is also updated to reflect the maintainers of
the TXT-related code.

Certainly looks better now. ACK.

Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
author
#26 lore raw

PATCH v3 1/1 intel_txt: add support for S3 memory integrity protection within Intel(R) TXT launched kernel

In reply to Wang, Shane

<compared with v2, this patch adds a check of array size in tboot.c, and a note to specify which c/s of tboot supports this kind of MACing in intel_txt.txt>

v3: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

 Documentation/intel_txt.txt |   16 +++++++++-------
 MAINTAINERS                 |   11 +++++++++++
 arch/x86/include/asm/e820.h |    7 ++++++-
 arch/x86/kernel/tboot.c     |   20 +++++++++++---------
 4 files changed, 37 insertions(+), 17 deletions(-)
Documentation/intel_txt.txt +9 -7
diff -r d2911aa1461d Documentation/intel_txt.txt
@@ -161,13 +161,15 @@ o  In order to put a system into any of
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
+      Note that the c/s 194 of tboot which has the new MAC code supports
+      this.
 
 That's pretty much it for TXT support.
 
MAINTAINERS +11 -0
diff -r d2911aa1461d MAINTAINERS
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
 F:	Documentation/networking/README.ipw2200
 F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:	Inaky Perez-Gonzalez <[email protected]>
 M:	[email protected]
arch/x86/include/asm/e820.h +6 -1
diff -r d2911aa1461d arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
 #define E820_NVS	4
 #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__
arch/x86/kernel/tboot.c +11 -9
diff -r d2911aa1461d arch/x86/kernel/tboot.c
@@ -130,6 +130,9 @@ static void add_mac_region(phys_addr_t s
 	struct tboot_mac_region *mr;
 	phys_addr_t end = start + size;
 
+	if (tboot->num_mac_regions >= MAX_TB_MAC_REGIONS)
+		panic("tboot: Too many MAC regions\n");
+
 	if (start && size) {
 		mr = &tboot->mac_regions[tboot->num_mac_regions++];
 		mr->start = round_down(start, PAGE_SIZE);
@@ -139,18 +142,17 @@ static void add_mac_region(phys_addr_t s
 
 static void __init tboot_setup_sleep(void)
 {
+	int i;
+
 	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 }

v3: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

Documentation/intel_txt.txt +9 -7
diff -r d2911aa1461d Documentation/intel_txt.txt
@@ -161,13 +161,15 @@ o  In order to put a system into any of 
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
+      Note that the c/s 194 of tboot which has the new MAC code supports
+      this.
 
 That's pretty much it for TXT support.
 
MAINTAINERS +11 -0
diff -r d2911aa1461d MAINTAINERS
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
 F:	Documentation/networking/README.ipw2200
 F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:	Inaky Perez-Gonzalez <[email protected]>
 M:	[email protected]
arch/x86/include/asm/e820.h +6 -1
diff -r d2911aa1461d arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
 #define E820_NVS	4
 #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__
arch/x86/kernel/tboot.c +11 -9
diff -r d2911aa1461d arch/x86/kernel/tboot.c
@@ -130,6 +130,9 @@ static void add_mac_region(phys_addr_t s
 	struct tboot_mac_region *mr;
 	phys_addr_t end = start + size;
 
+	if (tboot->num_mac_regions >= MAX_TB_MAC_REGIONS)
+		panic("tboot: Too many MAC regions\n");
+
 	if (start && size) {
 		mr = &tboot->mac_regions[tboot->num_mac_regions++];
 		mr->start = round_down(start, PAGE_SIZE);
@@ -139,18 +142,17 @@ static void add_mac_region(phys_addr_t s
 
 static void __init tboot_setup_sleep(void)
 {
+	int i;
+
 	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
 }
Acked-by on v3 1/1
#27 lore raw

Re: [PATCH v3] intel_txt: add support for S3 memory integrity protection within Intel(R) TXT launched kernel

Quoted 11 lines · Shane Wang

<compared with v2, this patch adds a check of array size in tboot.c, and a note to specify which c/s of tboot supports this kind of MACing in intel_txt.txt>

v3: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

Quoted 5 lines

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

Quoted 112 lines
  Documentation/intel_txt.txt |   16 +++++++++-------
  MAINTAINERS                 |   11 +++++++++++
  arch/x86/include/asm/e820.h |    7 ++++++-
  arch/x86/kernel/tboot.c     |   20 +++++++++++---------
  4 files changed, 37 insertions(+), 17 deletions(-)

diff -r d2911aa1461d Documentation/intel_txt.txt

Documentation/intel_txt.txt +9 -7
@@ -161,13 +161,15 @@ o  In order to put a system into any of
        has been restored, it will restore the TPM PCRs and then
        transfer control back to the kernel's S3 resume vector.
        In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
+      Note that the c/s 194 of tboot which has the new MAC code supports
+      this.
 
  That's pretty much it for TXT support.
 

diff -r d2911aa1461d MAINTAINERS

MAINTAINERS +11 -0
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
  F:	Documentation/networking/README.ipw2200
  F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
  INTEL WIRELESS WIMAX CONNECTION 2400
  M:	Inaky Perez-Gonzalez <[email protected]>
  M:	[email protected]

diff -r d2911aa1461d arch/x86/include/asm/e820.h

arch/x86/include/asm/e820.h +6 -1
@@ -45,7 +45,12 @@
  #define E820_NVS	4
  #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
  #define E820_RESERVED_KERN        128
 
  #ifndef __ASSEMBLY__

diff -r d2911aa1461d arch/x86/kernel/tboot.c

arch/x86/kernel/tboot.c +11 -9
@@ -130,6 +130,9 @@ static void add_mac_region(phys_addr_t s
  	struct tboot_mac_region *mr;
  	phys_addr_t end = start + size;
 
+	if (tboot->num_mac_regions >= MAX_TB_MAC_REGIONS)
+		panic("tboot: Too many MAC regions\n");
+
  	if (start && size) {
  		mr = &tboot->mac_regions[tboot->num_mac_regions++];
  		mr->start = round_down(start, PAGE_SIZE);
@@ -139,18 +142,17 @@ static void add_mac_region(phys_addr_t s
 
  static void __init tboot_setup_sleep(void)
  {
+	int i;
+
  	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
  	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
  }
Acked-by on v3 1/1
#28 lore raw

Re: [PATCH v3] intel_txt: add support for S3 memory integrity protection within Intel(R) TXT launched kernel

In reply to Shane Wang
Quoted 11 lines · Shane Wang

<compared with v2, this patch adds a check of array size in tboot.c, and a note to specify which c/s of tboot supports this kind of MACing in intel_txt.txt>

v3: Based on a complexity analysis and tradeoff, we moved all MAC'ing into tboot.

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

Quoted 5 lines

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

Quoted 112 lines
  Documentation/intel_txt.txt |   16 +++++++++-------
  MAINTAINERS                 |   11 +++++++++++
  arch/x86/include/asm/e820.h |    7 ++++++-
  arch/x86/kernel/tboot.c     |   20 +++++++++++---------
  4 files changed, 37 insertions(+), 17 deletions(-)

diff -r d2911aa1461d Documentation/intel_txt.txt

Documentation/intel_txt.txt +9 -7
@@ -161,13 +161,15 @@ o  In order to put a system into any of
        has been restored, it will restore the TPM PCRs and then
        transfer control back to the kernel's S3 resume vector.
        In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
+      Note that the c/s 194 of tboot which has the new MAC code supports
+      this.
 
  That's pretty much it for TXT support.
 

diff -r d2911aa1461d MAINTAINERS

MAINTAINERS +11 -0
@@ -2891,6 +2891,17 @@ F:	Documentation/networking/README.ipw22
  F:	Documentation/networking/README.ipw2200
  F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
  INTEL WIRELESS WIMAX CONNECTION 2400
  M:	Inaky Perez-Gonzalez <[email protected]>
  M:	[email protected]

diff -r d2911aa1461d arch/x86/include/asm/e820.h

arch/x86/include/asm/e820.h +6 -1
@@ -45,7 +45,12 @@
  #define E820_NVS	4
  #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
  #define E820_RESERVED_KERN        128
 
  #ifndef __ASSEMBLY__

diff -r d2911aa1461d arch/x86/kernel/tboot.c

arch/x86/kernel/tboot.c +11 -9
@@ -130,6 +130,9 @@ static void add_mac_region(phys_addr_t s
  	struct tboot_mac_region *mr;
  	phys_addr_t end = start + size;
 
+	if (tboot->num_mac_regions >= MAX_TB_MAC_REGIONS)
+		panic("tboot: Too many MAC regions\n");
+
  	if (start && size) {
  		mr = &tboot->mac_regions[tboot->num_mac_regions++];
  		mr->start = round_down(start, PAGE_SIZE);
@@ -139,18 +142,17 @@ static void add_mac_region(phys_addr_t s
 
  static void __init tboot_setup_sleep(void)
  {
+	int i;
+
  	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
  	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
  }
#29 lore raw

[tip:x86/txt] x86, tboot: Add support for S3 memory integrity protection

In reply to Shane Wang
Commit-ID:  4bd96a7a8185755b091233b16034c7436cbf57af
Gitweb:     http://git.kernel.org/tip/4bd96a7a8185755b091233b16034c7436cbf57af
Author:     Shane Wang <[email protected]>
AuthorDate: Wed, 10 Mar 2010 14:36:10 +0800
Committer:  H. Peter Anvin <[email protected]>
CommitDate: Fri, 19 Mar 2010 13:39:58 -0700

x86, tboot: Add support for S3 memory integrity protection

This patch adds support for S3 memory integrity protection within an Intel(R) TXT launched kernel, for all kernel and userspace memory. All RAM used by the kernel and userspace, as indicated by memory ranges of type E820_RAM and E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the TXT-related code.

All MACing is done in tboot, based on a complexity analysis and tradeoff.

v3: Compared with v2, this patch adds a check of array size in tboot.c, and a note to specify which c/s of tboot supports this kind of MACing in intel_txt.txt.

LKML-Reference: <[email protected]>

---
 Documentation/intel_txt.txt |   16 +++++++++-------
 MAINTAINERS                 |   11 +++++++++++
 arch/x86/include/asm/e820.h |    7 ++++++-
 arch/x86/kernel/tboot.c     |   20 +++++++++++---------
 4 files changed, 37 insertions(+), 17 deletions(-)
Documentation/intel_txt.txt +9 -7
index f40a1f0..87c8990 100644
@@ -161,13 +161,15 @@ o  In order to put a system into any of the sleep states after a TXT
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
+      Note that the c/s 194 of tboot which has the new MAC code supports
+      this.
 
 That's pretty much it for TXT support.
 
MAINTAINERS +11 -0
index 47cc449..d3072cb 100644
@@ -2940,6 +2940,17 @@ S:	Odd Fixes
 F:	Documentation/networking/README.ipw2200
 F:	drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:	Joseph Cihula <[email protected]>
+M:	Shane Wang <[email protected]>
+L:	[email protected]
+W:	http://tboot.sourceforge.net
+T:	Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:	Supported
+F:	Documentation/intel_txt.txt
+F:	include/linux/tboot.h
+F:	arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:	Inaky Perez-Gonzalez <[email protected]>
 M:	[email protected]
arch/x86/include/asm/e820.h +6 -1
index 0e22296..ec8a52d 100644
@@ -45,7 +45,12 @@
 #define E820_NVS	4
 #define E820_UNUSABLE	5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__
arch/x86/kernel/tboot.c +11 -9
index 86c9f91..cc2c604 100644
@@ -175,6 +175,9 @@ static void add_mac_region(phys_addr_t start, unsigned long size)
 	struct tboot_mac_region *mr;
 	phys_addr_t end = start + size;
 
+	if (tboot->num_mac_regions >= MAX_TB_MAC_REGIONS)
+		panic("tboot: Too many MAC regions\n");
+
 	if (start && size) {
 		mr = &tboot->mac_regions[tboot->num_mac_regions++];
 		mr->start = round_down(start, PAGE_SIZE);
@@ -184,18 +187,17 @@ static void add_mac_region(phys_addr_t start, unsigned long size)
 
 static int tboot_setup_sleep(void)
 {
+	int i;
+
 	tboot->num_mac_regions = 0;
 
-	/* S3 resume code */
-	add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+	for (i = 0; i < e820.nr_map; i++) {
+		if ((e820.map[i].type != E820_RAM)
+		 && (e820.map[i].type != E820_RESERVED_KERN))
+			continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-	/* AP trampoline code */
-	add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-	/* kernel code + data + bss */
-	add_mac_region(virt_to_phys(_text), _end - _text);
+		add_mac_region(e820.map[i].addr, e820.map[i].size);
+	}
 
 	tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;