PCIe, USB: Replace 'end point' references with 'endpoint'

PATCH New Peter Tyser 4 participants 6 messages Jan 6, 2010 – Jan 17, 2010

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USB MUSB multipoint high speed dual-role controller

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Peter Tyser

author

2010-01-06 23:41 UTC #0 lore raw

PATCH 1/1 PCIe, USB: Replace 'end point' references with 'endpoint'

When referring to PCIe and USB 'endpoint' is the standard naming convention.

Signed-off-by Peter Tyser <[email protected]>

---
I could only take so much of seeing "End Point" on every bootup before I cracked:)

 board/amcc/yucca/yucca.c                  |    2 +-
 board/atum8548/atum8548.c                 |    2 +-
 board/freescale/mpc8536ds/mpc8536ds.c     |    6 +++---
 board/freescale/mpc8544ds/mpc8544ds.c     |    6 +++---
 board/freescale/mpc8548cds/mpc8548cds.c   |    2 +-
 board/freescale/mpc8568mds/mpc8568mds.c   |    2 +-
 board/freescale/mpc8569mds/mpc8569mds.c   |    2 +-
 board/freescale/mpc8572ds/mpc8572ds.c     |    6 +++---
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |    4 ++--
 board/freescale/p1_p2_rdb/pci.c           |    4 ++--
 board/freescale/p2020ds/p2020ds.c         |    6 +++---
 board/tqc/tqm85xx/tqm85xx.c               |    2 +-
 board/xes/common/fsl_8xxx_pci.c           |    6 +++---
 cpu/ppc4xx/4xx_pcie.c                     |    4 ++--
 drivers/usb/musb/musb_core.h              |    2 +-
 include/usb/ehci-fsl.h                    |   24 ++++++++++++------------
 16 files changed, 40 insertions(+), 40 deletions(-)

board/amcc/yucca/yucca.c +1 -1

index 67a0167..8c65cfb 100644
@@ -609,7 +609,7 @@ int board_pcie_card_present(int port)
 /*
  * For the given slot, set endpoint mode, send power to the slot,
  * turn on the green LED and turn off the yellow LED, enable the
- * clock. In end point mode reset bit is read only.
+ * clock. In endpoint mode reset bit is read only.
  */
 void board_pcie_setup_port(int port, int rootpoint)
 {

board/atum8548/atum8548.c +1 -1

index a220ad4..1c73e60 100644
@@ -208,7 +208,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE1 connected to slot as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

board/freescale/mpc8536ds/mpc8536ds.c +3 -3

index da72916..5f4c3bb 100644
@@ -222,7 +222,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE3 connected to Slot3 as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

@@ -271,7 +271,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE1 connected to Slot1 as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

@@ -328,7 +328,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE2 connected to Slot 2 as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

board/freescale/mpc8544ds/mpc8544ds.c +3 -3

index 244a197..53baf98 100644
@@ -131,7 +131,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE3 connected to ULI as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

@@ -194,7 +194,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE1 connected to Slot2 as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

@@ -252,7 +252,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE2 connected to Slot 1 as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

board/freescale/mpc8548cds/mpc8548cds.c +1 -1

index 73e7c21..3371c74 100644
@@ -361,7 +361,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE connected to slot as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 
 		if (pci->pme_msg_det) {

board/freescale/mpc8568mds/mpc8568mds.c +1 -1

index e2dc69e..f3f263d 100644
@@ -429,7 +429,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE connected to slot as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 
 		if (pci->pme_msg_det) {

board/freescale/mpc8569mds/mpc8569mds.c +1 -1

index cdd7813..7e7da6e 100644
@@ -544,7 +544,7 @@ pci_init_board(void)
 
 	if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("\n    PCIE connected to slot as %s (base address %x)",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 
 		if (pci->pme_msg_det) {

board/freescale/mpc8572ds/mpc8572ds.c +3 -3

index 933dd12..74d7e95 100644
@@ -196,7 +196,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
 		SET_STD_PCIE_INFO(pci_info[num], 3);
 		printf ("    PCIE3 connected to ULI as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie3_hose, first_free_busno);

@@ -228,7 +228,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		printf ("    PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);

@@ -248,7 +248,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		printf ("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);

board/freescale/mpc8610hpcd/mpc8610hpcd.c +2 -2

index f42c316..0306607 100644
@@ -249,7 +249,7 @@ void pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)) {
 		printf(" PCIe 1 connected to Uli as %s (base address %x)\n",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det)
 			pci->pme_msg_det = 0xffffffff;

@@ -298,7 +298,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)) {
 		printf(" PCI-Express 2 connected to slot as %s" \
 			" (base address %x)\n",
-			pcie_ep ? "End Point" : "Root Complex",
+			pcie_ep ? "Endpoint" : "Root Complex",
 			(uint)pci);
 		if (pci->pme_msg_det)
 			pci->pme_msg_det = 0xffffffff;

board/freescale/p1_p2_rdb/pci.c +2 -2

index 4c08f9e..dc94f43 100644
@@ -68,7 +68,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		printf("    PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);

@@ -87,7 +87,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		printf("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);

board/freescale/p2020ds/p2020ds.c +3 -3

index e38c014..714a04d 100644
@@ -224,7 +224,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) {
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		printf("    PCIE2 connected to ULI as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);

@@ -264,7 +264,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) {
 		SET_STD_PCIE_INFO(pci_info[num], 3);
 		printf("    PCIE3 connected to Slot 1 as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie3_hose, first_free_busno);

@@ -283,7 +283,7 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		printf("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
-				pcie_ep ? "End Point" : "Root Complex",
+				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);

board/tqc/tqm85xx/tqm85xx.c +1 -1

index 3931ec5..085f8d5 100644
@@ -636,7 +636,7 @@ static inline void init_pcie1(void)
 
 	if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
 		printf ("PCIe:  %s, base address %x",
-			pcie_ep ? "End point" : "Root complex", (uint)pci);
+			pcie_ep ? "Endpoint" : "Root complex", (uint)pci);
 
 		if (pci->pme_msg_det) {
 			pci->pme_msg_det = 0xffffffff;

board/xes/common/fsl_8xxx_pci.c +3 -3

index a615820..3a81827 100644
@@ -256,7 +256,7 @@ void pci_init_board(void)
 
 	if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
 		printf("\n    PCIE1 connected as %s (x%d)",
-			host ? "Root Complex" : "End Point", width);
+			host ? "Root Complex" : "Endpoint", width);
 		if (in_be32(&pci->pme_msg_det)) {
 			out_be32(&pci->pme_msg_det, 0xffffffff);
 			debug(" with errors.  Clearing.  Now 0x%08x",

@@ -305,7 +305,7 @@ void pci_init_board(void)
 
 	if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) {
 		printf("\n    PCIE2 connected as %s (x%d)",
-			host ? "Root Complex" : "End Point", width);
+			host ? "Root Complex" : "Endpoint", width);
 		if (in_be32(&pci->pme_msg_det)) {
 			out_be32(&pci->pme_msg_det, 0xffffffff);
 			debug(" with errors.  Clearing.  Now 0x%08x",

@@ -354,7 +354,7 @@ void pci_init_board(void)
 
 	if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) {
 		printf("\n    PCIE3 connected as %s (x%d)",
-			host ? "Root Complex" : "End Point", width);
+			host ? "Root Complex" : "Endpoint", width);
 		if (in_be32(&pci->pme_msg_det)) {
 			out_be32(&pci->pme_msg_det, 0xffffffff);
 			debug(" with errors.  Clearing.  Now 0x%08x",

cpu/ppc4xx/4xx_pcie.c +2 -2

index d9605c3..f3b9214 100644
@@ -924,7 +924,7 @@ static inline u64 ppc4xx_get_cfgaddr(int port)
 }
 
 /*
- *  4xx boards as end point and root point setup
+ *  4xx boards as endpoint and root point setup
  *                    and
  *    testing inbound and out bound windows
  *

@@ -940,7 +940,7 @@ static inline u64 ppc4xx_get_cfgaddr(int port)
  *
  *  Once your board came up as root point , you can verify by reading
  *  /proc/bus/pci/devices. Where you can see the configuration registers
- *  of end point device attached to the port.
+ *  of endpoint device attached to the port.
  *
  *  Enpoint cofiguration can be verified by connecting 4xx board to any
  *  host or another 4xx board. Then try to scan the device. In case of

drivers/usb/musb/musb_core.h +1 -1

index 15c7f49..0c02085 100644
@@ -128,7 +128,7 @@ struct musb_regs {
 		u8	rxhubport;
 	} tar[16];
 	/*
-	 * end point registers
+	 * endpoint registers
 	 * ep0 elements are valid when array index is 0
 	 * otherwise epN is valid
 	 */

include/usb/ehci-fsl.h +12 ~~-12~~

index 3b99456..f48945a 100644
@@ -112,7 +112,7 @@ struct usb_ehci {
 	u32	perlistbase;	/* 0x154 - Periodic List Base
 					 - USB Device Address */
 	u32	ep_list_addr;	/* 0x158 - Next Asynchronous List
-					 - End Point Address */
+					 - Endpoint Address */
 	u8	res5[0x4];
 	u32	burstsize;	/* 0x160 - Programmable Burst Size */
 	u32	txfilltuning;	/* 0x164 - Host TT Transmit

@@ -124,17 +124,17 @@ struct usb_ehci {
 	u32	portsc;		/* 0x184 - Port status/control */
 	u8	res8[0x20];
 	u32	usbmode;	/* 0x1a8 - USB Device Mode */
-	u32	epsetupstat;	/* 0x1ac - End Point Setup Status */
-	u32	epprime;	/* 0x1b0 - End Point Init Status */
-	u32	epflush;	/* 0x1b4 - End Point De-initlialize */
-	u32	epstatus;	/* 0x1b8 - End Point Status */
-	u32	epcomplete;	/* 0x1bc - End Point Complete */
-	u32	epctrl0;	/* 0x1c0 - End Point Control 0 */
-	u32	epctrl1;	/* 0x1c4 - End Point Control 1 */
-	u32	epctrl2;	/* 0x1c8 - End Point Control 2 */
-	u32	epctrl3;	/* 0x1cc - End Point Control 3 */
-	u32	epctrl4;	/* 0x1d0 - End Point Control 4 */
-	u32	epctrl5;	/* 0x1d4 - End Point Control 5 */
+	u32	epsetupstat;	/* 0x1ac - Endpoint Setup Status */
+	u32	epprime;	/* 0x1b0 - Endpoint Init Status */
+	u32	epflush;	/* 0x1b4 - Endpoint De-initlialize */
+	u32	epstatus;	/* 0x1b8 - Endpoint Status */
+	u32	epcomplete;	/* 0x1bc - Endpoint Complete */
+	u32	epctrl0;	/* 0x1c0 - Endpoint Control 0 */
+	u32	epctrl1;	/* 0x1c4 - Endpoint Control 1 */
+	u32	epctrl2;	/* 0x1c8 - Endpoint Control 2 */
+	u32	epctrl3;	/* 0x1cc - Endpoint Control 3 */
+	u32	epctrl4;	/* 0x1d0 - Endpoint Control 4 */
+	u32	epctrl5;	/* 0x1d4 - Endpoint Control 5 */
 	u8	res9[0x228];
 	u32	snoop1;		/* 0x400 - Snoop 1 */
 	u32	snoop2;		/* 0x404 - Snoop 2 */

Signature · 1 line

1.6.2.1

Remy Bohmer

2010-01-09 09:34 UTC #1 lore raw

PATCH 1/1 PCIe, USB: Replace 'end point' references with 'endpoint'

Hi,

2010/1/7 Peter Tyser <[email protected]>:

Quoted 8 lines

When referring to PCIe and USB 'endpoint' is the standard naming convention.
Signed-off-by Peter Tyser <[email protected]>
---
I could only take so much of seeing "End Point" on every bootup before I cracked:)

Quoted 16 lines

?board/amcc/yucca/yucca.c ? ? ? ? ? ? ? ? ?| ? ?2 +-
?board/atum8548/atum8548.c ? ? ? ? ? ? ? ? | ? ?2 +-
?board/freescale/mpc8536ds/mpc8536ds.c ? ? | ? ?6 +++---
?board/freescale/mpc8544ds/mpc8544ds.c ? ? | ? ?6 +++---
?board/freescale/mpc8548cds/mpc8548cds.c ? | ? ?2 +-
?board/freescale/mpc8568mds/mpc8568mds.c ? | ? ?2 +-
?board/freescale/mpc8569mds/mpc8569mds.c ? | ? ?2 +-
?board/freescale/mpc8572ds/mpc8572ds.c ? ? | ? ?6 +++---
?board/freescale/mpc8610hpcd/mpc8610hpcd.c | ? ?4 ++--
?board/freescale/p1_p2_rdb/pci.c ? ? ? ? ? | ? ?4 ++--
?board/freescale/p2020ds/p2020ds.c ? ? ? ? | ? ?6 +++---
?board/tqc/tqm85xx/tqm85xx.c ? ? ? ? ? ? ? | ? ?2 +-
?board/xes/common/fsl_8xxx_pci.c ? ? ? ? ? | ? ?6 +++---
?cpu/ppc4xx/4xx_pcie.c ? ? ? ? ? ? ? ? ? ? | ? ?4 ++--
?drivers/usb/musb/musb_core.h ? ? ? ? ? ? ?| ? ?2 +-
?include/usb/ehci-fsl.h ? ? ? ? ? ? ? ? ? ?| ? 24 ++++++++++++------------

Since this patch mostly touches board files I suggest this patch goes through the board maintainers tree.

Acked-by Remy Bohmer <[email protected]>

Remy

Peter Tyser

author

2010-01-09 16:06 UTC #2 lore raw

PATCH 1/1 PCIe, USB: Replace 'end point' references with 'endpoint'

Hi Remy,

Quoted 26 lines

2010/1/7 Peter Tyser <[email protected]>:

Quoted 8 lines

When referring to PCIe and USB 'endpoint' is the standard naming convention.
Signed-off-by Peter Tyser <[email protected]>
---
I could only take so much of seeing "End Point" on every bootup before I cracked:)

Quoted 16 lines

 board/amcc/yucca/yucca.c                  |    2 +-
 board/atum8548/atum8548.c                 |    2 +-
 board/freescale/mpc8536ds/mpc8536ds.c     |    6 +++---
 board/freescale/mpc8544ds/mpc8544ds.c     |    6 +++---
 board/freescale/mpc8548cds/mpc8548cds.c   |    2 +-
 board/freescale/mpc8568mds/mpc8568mds.c   |    2 +-
 board/freescale/mpc8569mds/mpc8569mds.c   |    2 +-
 board/freescale/mpc8572ds/mpc8572ds.c     |    6 +++---
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |    4 ++--
 board/freescale/p1_p2_rdb/pci.c           |    4 ++--
 board/freescale/p2020ds/p2020ds.c         |    6 +++---
 board/tqc/tqm85xx/tqm85xx.c               |    2 +-
 board/xes/common/fsl_8xxx_pci.c           |    6 +++---
 cpu/ppc4xx/4xx_pcie.c                     |    4 ++--
 drivers/usb/musb/musb_core.h              |    2 +-
 include/usb/ehci-fsl.h                    |   24 ++++++++++++------------

Quoted 3 lines

Since this patch mostly touches board files I suggest this patch goes through the board maintainers tree.
Acked-by Remy Bohmer <[email protected]>

I wasn't aware of a board maintainers tree... I was assuming Wolfgang would pick this up directly, or possibly Kumar since the majority of changes are to Freescale boards. I've added Stefan on CC for the 4xx changes and Robert L for the ATUM8548 in case they want to ACK/NACK.

Thanks,
Peter

Stefan Roese

2010-01-10 08:53 UTC #3 lore raw

PATCH 1/1 PCIe, USB: Replace 'end point' references with 'endpoint'

Quoted 8 lines · On Saturday 09 January 2010 17:06:15 Peter Tyser wrote:

Quoted 3 lines
Since this patch mostly touches board files I suggest this patch goes through the board maintainers tree.
Acked-by Remy Bohmer <[email protected]>
I wasn't aware of a board maintainers tree... I was assuming Wolfgang would pick this up directly, or possibly Kumar since the majority of changes are to Freescale boards. I've added Stefan on CC for the 4xx changes and Robert L for the ATUM8548 in case they want to ACK/NACK.

Acked-by Stefan Roese <[email protected]>

Thanks.

Cheers,
Stefan

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DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de

Wolfgang Denk

2010-01-17 21:18 UTC #4 lore raw

PATCH 1/1 PCIe, USB: Replace 'end point' references with 'endpoint'

In reply to Peter Tyser

Dear Peter Tyser,

Quoted 9 lines · In message <[email protected]> you wrote:

Quoted 4 lines
Since this patch mostly touches board files I suggest this patch goes through the board maintainers tree.
Acked-by Remy Bohmer <[email protected]>
I wasn't aware of a board maintainers tree... I was assuming Wolfgang would pick this up directly, or possibly Kumar since the majority of changes are to Freescale boards. I've added Stefan on CC for the 4xx changes and Robert L for the ATUM8548 in case they want to ACK/NACK.

I would take it, but it doesn't work on my current HEAD.

Best regards,

Wolfgang Denk

Signature · 6 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
You humans have that emotional need  to  express  gratitude.  "You're
welcome," I believe, is the correct response.
	-- Spock, "Bread and Circuses", stardate 4041.2

Wolfgang Denk

2010-01-17 21:17 UTC #5 lore raw

PATCH 1/1 PCIe, USB: Replace 'end point' references with 'endpoint'

In reply to Peter Tyser

Dear Peter Tyser,

Quoted 17 lines · In message <[email protected]> you wrote:

When referring to PCIe and USB 'endpoint' is the standard naming convention.

Signed-off-by Peter Tyser <[email protected]>

---
I could only take so much of seeing "End Point" on every bootup before I cracked:)

 board/amcc/yucca/yucca.c                  |    2 +-
 board/atum8548/atum8548.c                 |    2 +-
 board/freescale/mpc8536ds/mpc8536ds.c     |    6 +++---
 board/freescale/mpc8544ds/mpc8544ds.c     |    6 +++---
 board/freescale/mpc8548cds/mpc8548cds.c   |    2 +-
 board/freescale/mpc8568mds/mpc8568mds.c   |    2 +-
 board/freescale/mpc8569mds/mpc8569mds.c   |    2 +-
 board/freescale/mpc8572ds/mpc8572ds.c     |    6 +++---
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |    4 ++--

Quoted 8 lines

 board/freescale/p1_p2_rdb/pci.c           |    4 ++--
 board/freescale/p2020ds/p2020ds.c         |    6 +++---
 board/tqc/tqm85xx/tqm85xx.c               |    2 +-
 board/xes/common/fsl_8xxx_pci.c           |    6 +++---
 cpu/ppc4xx/4xx_pcie.c                     |    4 ++--
 drivers/usb/musb/musb_core.h              |    2 +-
 include/usb/ehci-fsl.h                    |   24 ++++++++++++------------
 16 files changed, 40 insertions(+), 40 deletions(-)

This patch does not apply:

Applying: PCIe, USB: Replace 'end point' references with 'endpoint'
error: patch failed: board/atum8548/atum8548.c:208
error: board/atum8548/atum8548.c: patch does not apply
error: patch failed: board/freescale/mpc8536ds/mpc8536ds.c:222
error: board/freescale/mpc8536ds/mpc8536ds.c: patch does not apply
error: patch failed: board/freescale/mpc8544ds/mpc8544ds.c:131
error: board/freescale/mpc8544ds/mpc8544ds.c: patch does not apply
error: patch failed: board/freescale/mpc8548cds/mpc8548cds.c:361
error: board/freescale/mpc8548cds/mpc8548cds.c: patch does not apply
error: patch failed: board/freescale/mpc8568mds/mpc8568mds.c:429
error: board/freescale/mpc8568mds/mpc8568mds.c: patch does not apply
error: patch failed: board/freescale/mpc8569mds/mpc8569mds.c:544
error: board/freescale/mpc8569mds/mpc8569mds.c: patch does not apply
error: patch failed: board/freescale/mpc8572ds/mpc8572ds.c:196
error: board/freescale/mpc8572ds/mpc8572ds.c: patch does not apply
error: patch failed: board/freescale/mpc8610hpcd/mpc8610hpcd.c:249
error: board/freescale/mpc8610hpcd/mpc8610hpcd.c: patch does not apply
error: patch failed: board/freescale/p1_p2_rdb/pci.c:68
error: board/freescale/p1_p2_rdb/pci.c: patch does not apply
error: patch failed: board/freescale/p2020ds/p2020ds.c:224
error: board/freescale/p2020ds/p2020ds.c: patch does not apply Using index info to reconstruct a base tree...
Falling back to patching base and 3-way merge...
Auto-merging board/atum8548/atum8548.c
CONFLICT (content): Merge conflict in board/atum8548/atum8548.c Auto-merging board/freescale/mpc8536ds/mpc8536ds.c
CONFLICT (content): Merge conflict in board/freescale/mpc8536ds/mpc8536ds.c Auto-merging board/freescale/mpc8544ds/mpc8544ds.c
CONFLICT (content): Merge conflict in board/freescale/mpc8544ds/mpc8544ds.c Auto-merging board/freescale/mpc8548cds/mpc8548cds.c
CONFLICT (content): Merge conflict in board/freescale/mpc8548cds/mpc8548cds.c Auto-merging board/freescale/mpc8568mds/mpc8568mds.c
CONFLICT (content): Merge conflict in board/freescale/mpc8568mds/mpc8568mds.c Auto-merging board/freescale/mpc8569mds/mpc8569mds.c
CONFLICT (content): Merge conflict in board/freescale/mpc8569mds/mpc8569mds.c Auto-merging board/freescale/mpc8572ds/mpc8572ds.c
Auto-merging board/freescale/mpc8610hpcd/mpc8610hpcd.c
CONFLICT (content): Merge conflict in board/freescale/mpc8610hpcd/mpc8610hpcd.c Auto-merging board/freescale/p1_p2_rdb/pci.c
Auto-merging board/freescale/p2020ds/p2020ds.c
Auto-merging board/tqc/tqm85xx/tqm85xx.c
Auto-merging drivers/usb/musb/musb_core.h
Failed to merge in the changes.

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
It's a small world, but I wouldn't want to paint it.