SPEAr : Support added for SPEAr600 board

SPEAr600 SoC support contains basic spear600 support along with the usage of following drivers
- serial driver
- i2c driver
- smi driver
- nand driver
- usbd driver

---
  MAKEALL                                        |    1 +
  Makefile                                       |    3 +

optionally add self to MAINTAINERS for boards

  board/spear/common/Makefile                    |   54 +++++
  board/spear/common/spr_lowlevel_init.S         |  197 +++++++++++++++++++
  board/spear/common/spr_misc.c                  |  169 ++++++++++++++++
  board/spear/spear600/Makefile                  |   51 +++++
  board/spear/spear600/config.mk                 |   39 ++++
  board/spear/spear600/spear600.c                |   52 +++++
  include/asm-arm/arch-spear/spr_defs.h          |   38 ++++
  include/asm-arm/arch-spear/spr_xloader_table.h |   67 +++++++
  include/configs/spear.h                        |  251 ++++++++++++++++++++++++
  11 files changed, 922 insertions(+), 0 deletions(-)

create mode 100644 board/spear/common/Makefile
create mode 100755 board/spear/common/spr_lowlevel_init.S create mode 100755 board/spear/common/spr_misc.c create mode 100755 board/spear/spear600/Makefile create mode 100755 board/spear/spear600/config.mk create mode 100755 board/spear/spear600/spear600.c create mode 100644 include/asm-arm/arch-spear/spr_defs.h create mode 100755 include/asm-arm/arch-spear/spr_xloader_table.h create mode 100755 include/configs/spear.h

<snip>

+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+/*
+ * platform specific initializations are already done in Xloader
+ * Initializations already done include
+ * DDR, PLLs, IP's clock enable and reset release etc
+ */
+.globl lowlevel_init
+lowlevel_init:
+ /* By default, U-Boot switches CPU to low-vector */
+ /* Revert this as we work in high vector even in U-Boot */
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x00002000
+ mcr p15, 0, r0, c1, c0, 0
+ mov pc, lr
+
+/* ;void setfreq(unsigned int device, unsigned int frequency) */ ';' typo ?

+.global setfreq
+setfreq:
+ stmfd sp!,{r14}
+ stmfd sp!,{r0-r12}
+
+ mov r8,sp
+ ldr sp,SRAM_STACK_V
+
+ /* ;Saving the function arguements for later use */
';' ?
Looks like a lot of these comments have them. They are not necessay, please remove globally
+ mov r4,r0
+ mov r5,r1
+
+ /* ;Putting DDR into self refresh */
+ ldr r0,DDR_07_V
+ ldr r1,[r0]
+ ldr r2,DDR_ACTIVE_V
+ bic r1, r1, r2
+ str r1,[r0]
+ ldr r0,DDR_57_V
+ ldr r1,[r0]
+ ldr r2,CYCLES_MASK_V
+ bic r1, r1, r2
+ ldr r2,REFRESH_CYCLES_V
+ orr r1, r1, r2, lsl #16
+ str r1,[r0]
+ ldr r0,DDR_07_V
+ ldr r1,[r0]
+ ldr r2,SREFRESH_MASK_V
+ orr r1, r1, r2
+ str r1,[r0]
+
+ b 1f
where is this branching to ?
+ .align 5
+1:
Please use a more meaningful label or remove if not needed Apply globally

+ /* ;Delay to ensure self refresh mode */
+ ldr r0,SREFRESH_DELAY_V
+1:

+	sub  	r0,r0,#1
+	cmp  	r0,#0
+	bne  	1b

Where is this branching to?
change these to labels
+
+ /* ;Putting system in slow mode */

+	ldr  	r0,SCCTRL_V
+	mov  	r1,#2
+	str  	r1,[r0]

+
+ /* ;Changing PLL(1/2) frequency */
+ mov r0,r4
+ mov r1,r5
+
+ cmp r4,#0
+ beq 1f
+
+ /* ;Change PLL2 (DDR frequency) */

+	ldr  	r6,PLL2_FREQ_V
+	ldr  	r7,PLL2_CNTL_V
+	b    	2f

+
+1:
+ /* ;Change PLL1 (CPU frequency) */
+ ldr r6,PLL1_FREQ_V
+ ldr r7,PLL1_CNTL_V
+
+2:

+	mov  	r0,r6
+	ldr  	r1,[r0]
+	ldr  	r2,PLLFREQ_MASK_V
+	bic  	r1,r1,r2
+	mov  	r2,r5,lsr#1
+	orr  	r1,r1,r2,lsl#24
+	str  	r1,[r0]
+
+	mov  	r0,r7
+	ldr  	r1,P1C0A_V
+	str  	r1,[r0]

+ /* ;ldr r0,r7 */

This looks like you have commented out this code. Please remove or if-def appropiately if not needed

+ ldr r1,P1C0E_V
+ str r1,[r0]
+ /* ;ldr r0,r7 */
+ ldr r1,P1C06_V
+ str r1,[r0]
+ /* ;ldr r0,r7 */
+ ldr r1,P1C0E_V
+ str r1,[r0]
+
+1:

+	ldr  	r1,[r0]
+	and  	r1,r1,#1
+	cmp  	r1,#0
+	beq  	1b
+
+	/* ;Putting system back to normal mode */
+	ldr  	r0,SCCTRL_V
+	mov  	r1,#4
+	str  	r1,[r0]

+
+ /* ;Putting DDR back to normal */
+ ldr r0,DDR_07_V
+ ldr r1,[R0]
+ ldr r2,SREFRESH_MASK_V
+ bic r1, r1, r2
+ str r1,[r0]
+ ldr r2,DDR_ACTIVE_V
+ orr r1, r1, r2
+ str r1,[r0]
+
+ /* ;Delay to ensure self refresh mode */
+ ldr r0,SREFRESH_DELAY_V
+1:

+	sub  	r0,r0,#1
+	cmp  	r0,#0
+	bne  	1b

+
+ mov sp,r8
+ /* ;Resuming back to code */
+ ldmia sp!,{r0-r12}
+ ldmia sp!,{pc}
ws
most of the above operator's have 1 or two trailing spaces +
+SCCTRL_V:
+ .word 0xfca00000
+PLL1_FREQ_V:
+ .word 0xfca8000C
+PLL1_CNTL_V:
+ .word 0xfca80008
+PLL2_FREQ_V:
+ .word 0xfca80018
+PLL2_CNTL_V:
+ .word 0xfca80014
+PLLFREQ_MASK_V:
+ .word 0xff000000
+P1C0A_V:
+ .word 0x1C0A
+P1C0E_V:
+ .word 0x1C0E
+P1C06_V:
+ .word 0x1C06
+
+SREFRESH_DELAY_V:
+ .word 0x9999
+SRAM_STACK_V:
+ .word 0xD2800600
+DDR_07_V:
+ .word 0xfc60001c
+DDR_ACTIVE_V:
+ .word 0x01000000
+DDR_57_V:
+ .word 0xfc6000e4
+CYCLES_MASK_V:
+ .word 0xffff0000
+REFRESH_CYCLES_V:
+ .word 0xf0f0
+SREFRESH_MASK_V:
+ .word 0x00010000
+
+.global setfreq_sz
+setfreq_sz:
+ .word setfreq_sz - setfreq

new file mode 100755
index 0000000..d70252b
@@ -0,0 +1,169 @@

<snip>

+
+ return 0;
+}
+
+#define CPU 0
+#define DDR 1

Make these name more specific and move them to them to either the top of this file or to a header file.
+
+int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{
+ void (*sram_setfreq) (unsigned int, unsigned int);
+ struct chip_data *chip = &chip_data;
+ unsigned int frequency;
+
+ if ((argc > 3) || (argc < 2)) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
+
+ frequency = simple_strtoul(argv[2], NULL, 0);
+
+ if (frequency > 333) {
+ printf("Frequency is limited to 333MHz\n");
+ return 1;
+ }
May want to check lower range

+
+ sram_setfreq = memcpy((void *)0xD2801000, setfreq, setfreq_sz);

Change this magic # to a #define or appropriate register value

+
+ if (!strcmp(argv[1], "cpufreq")) {
+ sram_setfreq(CPU, frequency);
+ printf("CPU frequency changed to %u\n", frequency);
+
+ chip->cpufreq = frequency;
+ } else {
+ sram_setfreq(DDR, frequency);
+ printf("DDR frequency changed to %u\n", frequency);
+
+ chip->dramfreq = frequency;
+ }
+
+ return 0;
+ } else if (!strcmp(argv[1], "display")) {

Perhaps change this to 'printinfo' or something else. I though 'display' was to setup video.

+
+ if (chip->cpufreq == -1)
+ printf("CPU Freq = Not Known\n");
+ else
+ printf("CPU Freq = %d MHz\n", chip->cpufreq);
+
+ if (chip->dramfreq == -1)
+ printf("DDR Freq = Not Known\n");
+ else
+ printf("DDR Freq = %d MHz\n", chip->dramfreq);
+
+ if (chip->dramtype == DDRMOBILE)
+ printf("DDR Type = MOBILE\n");
+ else if (chip->dramtype == DDR2)
+ printf("DDR Type = DDR2\n");
+ else
+ printf("DDR Type = Not Known\n");
+
+ printf("Xloader Rev = %s\n", chip->version);
+
+ return 0;
+ }
+
+ cmd_usage(cmdtp);
+ return 1;
+}
+
+U_BOOT_CMD(chip_config, 3, 1, do_chip_config,

+	   "configure chip",
+	   "ethaddr XX:XX:XX:XX:XX:XX\n"
+	   "chip_config cpufreq/ddrfreq frequency\n"
+	   "chip_config display");

<snip>

+ * MA 02111-1307 USA
+ */
+
+#ifndef _SPR_XLOADER_TABLE_H
+#define _SPR_XLOADER_TABLE_H
+
+#define XLOADER_TABLE_VERSION_1_1 2
+#define XLOADER_TABLE_VERSION_1_2 3
ws
these 2 lines have extras trailing spaces
+
+#define XLOADER_TABLE_ADDRESS 0xD2801FF0
+
+#define DDRMOBILE 1
+#define DDR2 2
ws
these 2 lines have trailing spaces
+
+#define REV_BA 1
+#define REV_AA 2
+#define REV_AB 3
+
+struct xloader_table_1_1 {
+ unsigned short ddrfreq;
+ unsigned char ddrsize;
+ unsigned char ddrtype;
+
+ unsigned char soc_rev;
+} __attribute__ ((packed));
+
+struct xloader_table_1_2 {
+ unsigned const char *version;
+
+ unsigned short ddrfreq;
+ unsigned char ddrsize;
+ unsigned char ddrtype;
+
+ unsigned char soc_rev;
+} __attribute__ ((packed));
+
+union table_contents {
+ struct xloader_table_1_1 table_1_1;
+ struct xloader_table_1_2 table_1_2;
+};
+
+struct xloader_table {
+ unsigned char table_version;
+ union table_contents table;
+} __attribute__ ((packed));
+
+#endif

new file mode 100755
index 0000000..a625c31
@@ -0,0 +1,251 @@

<snip>

+/*
+ * Serial Configuration (PL011)
+ */
+#define CONFIG_PL011_SERIAL
+#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
+#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \
+ (void *)CONFIG_SYS_SERIAL1 }
+#define CONFIG_CONS_INDEX 0
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
+ 57600, 115200 }
+#define CONFIG_SYS_SERIAL0 0xD0000000
+#define CONFIG_SYS_SERIAL1 0xD0080000

Is serial config and usbtty mutually exclusive ?

+
+#define CONFIG_SYS_LOADS_BAUD_CHANGE
+
+/*
+ * Platform specific defines (SPEAr)
+ */
+#define CONFIG_SYS_USBD_BASE (0xE1100000)
+#define CONFIG_SYS_PLUG_BASE (0xE1200000)
+#define CONFIG_SYS_FIFO_BASE (0xE1000800)
+#define CONFIG_SYS_SMI_BASE (0xFC000000)
+#define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000)
+#define CONFIG_SPEAR_TIMERBASE (0xFC800000)
+#define CONFIG_SPEAR_MISCBASE (0xFCA80000)
+

As per comments in patch #2.
These #defines should move to the include/asm/arch level in their appropriate files.

Tom

Hello Tom,

Yes, serial is working over UART and USBTTY gives a TTY port over USB device

Regards
Vipin