MCF528x cache errata / fix [PATCH]

patch created against u-boot-2009.11 release

cpu_mcf52x2_cache.patch
- Setup CACR, bit 5 set to 0 per Freescale chip errata

     (MCF5282DE, Rev. 6, 5/2009)

--
Michael Durrant
mdurrant at arcturusnetworks.com

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cpu_mcf52x2_cache.patch
- Setup CACR, bit 5 set to 0 per Freescale chip errata

     (MCF5282DE, Rev. 6, 5/2009)

---
 cpu/mcf52x2/cpu_init.c |    6 ++++--
 cpu/mcf52x2/start.S    |    5 ++++-
 2 files changed, 8 insertions(+), 3 deletions(-)

index 5b06930..60b55ce 100644
@@ -609,8 +609,10 @@ void cpu_init_f(void)
 
 #endif                /* CONFIG_MONITOR_IS_IN_RAM */
 
-    /* defer enabling cache until boot (see do_go) */
-    /* icache_enable(); */
+#if defined(CONFIG_SYS_ENABLE_ICACHE)
+    /* enable instruction cache now */
+    icache_enable();
+#endif
 }
 
 /*

index 0dd4de5..5540c95 100644
@@ -417,7 +417,10 @@ icache_enable:
     movec    %d0, %ACR0            /* Enable cache */
     move.l    #0xff00c000, %d0        /* Setup cache mask */
     movec    %d0, %ACR1            /* Enable cache */
-    move.l    #0x80400100, %d0        /* Setup cache mask, data cache

disabel*/
+ move.l #0x80400000, %d0 /* Setup cache mask, data cache
disabled,
+ bit 5 set to 0 per chip errata
+ (MCF5282DE, Rev. 6, 5/2009)
+ */
movec %d0, %CACR /* Enable cache */
moveq #1, %d0
icache_state_access_1:
-- 1.4.3.4