Fix lost serial TX interrupts. Report receive overruns.
PATCH 1/1 Fix lost serial TX interrupts. Report receive overruns.
This patch compliments the patch submitted by Jergen Lock and further improves the performance of QEMU's serial emulation with FreeBSD's uart(9) driver.
o Implement receive overrun status. The FreeBSD uart driver relies on this status in it's probe routine to determine the size of the FIFO supported.
o As per the 16550 spec, do not overwrite the RX FIFO on an RX overrun.
o Do not allow TX or RX FIFO overruns to increment the data valid count beyond the size of the FIFO.
o For reads of the IIR register, only clear the "TX holding register emtpy interrupt" if the read reports this interrupt. This is required by the specification and avoids losing TX interrupts when other, higher priority interrupts (usually RX) are reported first.
serial.c Thu Jan 28 15:36:04 2010 renamed from serial.c.orig Thu Jan 14 15:18:00 2010 +18 -8
@@ -169,11 +169,19 @@ { SerialFIFO *f = (fifo) ? &s->recv_fifo : &s->xmit_fifo; - f->data[f->head++] = chr; + /* Receive overruns do not overwrite FIFO contents. */ + if (fifo == XMIT_FIFO || f->count < UART_FIFO_LENGTH) { - if (f->head == UART_FIFO_LENGTH) - f->head = 0; - f->count++; + f->data[f->head++] = chr; + + if (f->head == UART_FIFO_LENGTH) + f->head = 0; + } + + if (f->count < UART_FIFO_LENGTH) + f->count++; + else if (fifo == RECV_FIFO) + s->lsr |= UART_LSR_OE; return 1; }
@@ -533,8 +541,10 @@ break; case 2: ret = s->iir; + if (ret & UART_IIR_THRI) { s->thr_ipending = 0; - serial_update_irq(s); + serial_update_irq(s); + } break; case 3: ret = s->lcr;
@@ -544,9 +554,9 @@ break; case 5: ret = s->lsr; - /* Clear break interrupt */ - if (s->lsr & UART_LSR_BI) { - s->lsr &= ~UART_LSR_BI; + /* Clear break and overrun interrupts */ + if (s->lsr & (UART_LSR_BI|UART_LSR_OE)) { + s->lsr &= ~(UART_LSR_BI|UART_LSR_OE); serial_update_irq(s); } break;
@@ -629,6 +639,8 @@ /* call the timeout receive callback in 4 char transmit time */ qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock
(vm_clock) + s->char_transmit_time * 4);
} else {
+ if (s->lsr & UART_LSR_DR)
+ s->lsr |= UART_LSR_OE;
s->rbr = buf[0];
s->lsr |= UART_LSR_DR;
}Quoted 16 lines · Justin T. Gibbs
This patch compliments the patch submitted by Jergen Lock and further improves the performance of QEMU's serial emulation with FreeBSD's uart(9) driver.
o Implement receive overrun status. The FreeBSD uart driver relies on this status in it's probe routine to determine the size of the FIFO supported.
o As per the 16550 spec, do not overwrite the RX FIFO on an RX overrun.
o Do not allow TX or RX FIFO overruns to increment the data valid count beyond the size of the FIFO.
o For reads of the IIR register, only clear the "TX holding register emtpy interrupt" if the read reports this interrupt. This is required by the specification and avoids losing TX interrupts when other,
higher
priority interrupts (usually RX) are reported first.
Quoted 1 line
Signed-off-by Justin T. Gibbs <[email protected]>
This patch is malformed. Please export the patch from a git tree via git-format-patch.
Regards,
Anthony Liguori
Quoted 66 lines
serial.c Thu Jan 28 15:36:04 2010 renamed from serial.c.orig Thu Jan 14 15:18:00 2010 +20
-8@@ -169,11 +169,19 @@ { SerialFIFO *f = (fifo) ? &s->recv_fifo : &s->xmit_fifo; - f->data[f->head++] = chr; + /* Receive overruns do not overwrite FIFO contents. */ + if (fifo == XMIT_FIFO || f->count < UART_FIFO_LENGTH) { - if (f->head == UART_FIFO_LENGTH) - f->head = 0; - f->count++; + f->data[f->head++] = chr; + + if (f->head == UART_FIFO_LENGTH) + f->head = 0; + } + + if (f->count < UART_FIFO_LENGTH) + f->count++; + else if (fifo == RECV_FIFO) + s->lsr |= UART_LSR_OE; return 1; }@@ -533,8 +541,10 @@ break; case 2: ret = s->iir; + if (ret & UART_IIR_THRI) { s->thr_ipending = 0; - serial_update_irq(s); + serial_update_irq(s); + } break; case 3: ret = s->lcr;@@ -544,9 +554,9 @@ break; case 5: ret = s->lsr; - /* Clear break interrupt */ - if (s->lsr & UART_LSR_BI) { - s->lsr &= ~UART_LSR_BI; + /* Clear break and overrun interrupts */ + if (s->lsr & (UART_LSR_BI|UART_LSR_OE)) { + s->lsr &= ~(UART_LSR_BI|UART_LSR_OE); serial_update_irq(s); } break;@@ -629,6 +639,8 @@ /* call the timeout receive callback in 4 char transmit time */ qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock (vm_clock) + s->char_transmit_time * 4); } else { + if (s->lsr & UART_LSR_DR) + s->lsr |= UART_LSR_OE; s->rbr = buf[0]; s->lsr |= UART_LSR_DR;}
Properly formatted patch now attached.
--
Justin
Quoted 1 line
From
7a941b3fcd298b60bb14744b8fae422d86298197Mon Sep 17 00:00:00 2001
From: Justin T. Gibbs <[email protected]>
Date: Wed, 10 Feb 2010 14:35:54 -0700
Subject: [PATCH] Fix lost serial TX interrupts. Report receive overruns.
o Implement receive overrun status. The FreeBSD uart driver relies on this status in it's probe routine to determine the size of the FIFO supported.
o As per the 16550 spec, do not overwrite the RX FIFO on an RX overrun.
o Do not allow TX or RX FIFO overruns to increment the data valid count beyond the size of the FIFO.
o For reads of the IIR register, only clear the "TX holding register emtpy interrupt" if the read reports this interrupt. This is required by the specification and avoids losing TX interrupts when other, higher priority interrupts (usually RX) are reported first.
--- hw/serial.c | 28 ++++++++++++++++++++-------- 1 files changed, 20 insertions(+), 8 deletions(-)
hw/serial.c +20 -8
@@ -169,11 +169,19 @@ static int fifo_put(SerialState *s, int fifo, uint8_t chr) {SerialFIFO *f = (fifo) ? &s->recv_fifo : &s->xmit_fifo; - f->data[f->head++] = chr; +/* Receive overruns do not overwrite FIFO contents. */ +if (fifo ==XMIT_FIFO || f->count <UART_FIFO_LENGTH ) { -if (f->head ==UART_FIFO_LENGTH ) - f->head =0 ; - f->count++; + f->data[f->head++] = chr; + +if (f->head ==UART_FIFO_LENGTH ) + f->head =0 ; + } + +if (f->count <UART_FIFO_LENGTH ) + f->count++; +else if (fifo ==RECV_FIFO ) + s->lsr |=UART_LSR_OE ;return 1 ; }
@@ -533,8 +541,10 @@ static uint32_t serial_ioport_read(void *opaque, uint32_t addr)break ;case 2 : ret = s->iir; +if (ret &UART_IIR_THRI ) { s->thr_ipending =0 ; -serial_update_irq (s); +serial_update_irq (s); + }break ;case 3 : ret = s->lcr;
@@ -544,9 +554,9 @@ static uint32_t serial_ioport_read(void *opaque, uint32_t addr)break ;case 5 : ret = s->lsr; -/* Clear break interrupt */ -if (s->lsr &UART_LSR_BI ) { - s->lsr &= ~UART_LSR_BI ; +/* Clear break and overrun interrupts */ +if (s->lsr & (UART_LSR_BI |UART_LSR_OE )) { + s->lsr &= ~(UART_LSR_BI |UART_LSR_OE );serial_update_irq (s); }break ;
@@ -629,6 +639,8 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size)/* call the timeout receive callback in 4 char transmit time */ qemu_mod_timer (s->fifo_timeout_timer,qemu_get_clock (vm_clock) + s->char_transmit_time *4 ); }else { +if (s->lsr &UART_LSR_DR ) + s->lsr |=UART_LSR_OE ; s->rbr = buf[0 ]; s->lsr |=UART_LSR_DR ; }
Signature · 1 line
1.6.6
Anthony Liguori
AppliedQuoted 2 lines · Justin T. Gibbs
Properly formatted patch now attached.
Applied. Thanks.
Regards,
Anthony Liguori
Quoted 3 lines
--
Justin