via-velocity: FLOW_CNTL_RX does not disable Asymmetric pause in set_mii_flow_control()

Asymmetric pause was not disabled in the RX case.

---
I spotted this because In the FLOW_CNTL_RX and FLOW_CNTL_TX_RX cases the same code is executed, is the amendment below required?

index 3a486f3..2d478cf 100644
@@ -807,7 +807,7 @@ static void set_mii_flow_control(struct velocity_info *vptr)
 
 	case FLOW_CNTL_RX:
 		MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
-		MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
+		MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
 		break;
 
 	case FLOW_CNTL_TX_RX:

From: Roel Kluin <[email protected]>
Date: Mon, 22 Mar 2010 21:25:14 +0100

The bit settings in the MII_ADVERTISE register should be:

1) RX and TX pause both requested

set only ADVERTISE_PAUSE_CAP

2) Only TX pause requested

set only ADVERTISE_PAUSE_ASYM

3) Only RX pause requested

set both ADVERTISE_PAUSE_CAP and ADVERTISE_PAUSE_ASYM

4) Neither TX nor RX pause requested

set nothing

(drivers/net/tg3.c:tg3_advert_flowctrl_1000t() is a good
reference point)

It would be easier to compare the VIA driver with the rest of the world if it used the standard mii.h defines instead of it's own private ones. That would be a good change to make at some point.

Anyways, the correct fix is therefore something like:

index 3a486f3..bc278d4 100644
@@ -812,7 +812,7 @@ static void set_mii_flow_control(struct velocity_info *vptr)
 
 	case FLOW_CNTL_TX_RX:
 		MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
-		MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
+		MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
 		break;
 
 	case FLOW_CNTL_DISABLE: