KVM MMU: check reserved bits only if CR4.PSE=1 or CR4.PAE=1
PATCH v3 1/1 KVM MMU: check reserved bits only if CR4.PSE=1 or CR4.PAE=1
- Check reserved bits only if CR4.PAE=1 or CR4.PSE=1 when guest #PF occurs
- Fix a typo in reset_rsvds_bits_mask()
Signed-off-by Xiao Guangrong <[email protected]>
--- arch/x86/kvm/mmu.c | 12 +++++++++--- 1 files changed, 9 insertions(+), 3 deletions(-)
arch/x86/kvm/mmu.c +9 -3
@@ -2293,13 +2293,19 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)/* no rsvd bits for 2 level 4K page table entries */ context->rsvd_bits_mask[0 ][1 ] =0 ; context->rsvd_bits_mask[0 ][0 ] =0 ; + context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[0 ][0 ]; + +if (!is_pse (vcpu)) { + context->rsvd_bits_mask[1 ][1 ] =0 ; +break ; + } +if (is_cpuid_PSE36 ())/* 36bits PSE 4MB page */ context->rsvd_bits_mask[1 ][1 ] =rsvd_bits (17 ,21 );else /* 32 bits PSE 4MB page */ context->rsvd_bits_mask[1 ][1 ] =rsvd_bits (13 ,21 ); - context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[1 ][0 ];break ;case PT32E_ROOT_LEVEL : context->rsvd_bits_mask[0][2] =
@@ -2312,7 +2318,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) context->rsvd_bits_mask[1 ][1 ] = exb_bit_rsvd |rsvd_bits (maxphyaddr,62 ) |rsvd_bits (13 ,20 );/* large page */ - context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[1 ][0 ]; + context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[0 ][0 ];break ;case PT64_ROOT_LEVEL : context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
@@ -2330,7 +2336,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) context->rsvd_bits_mask[1 ][1 ] = exb_bit_rsvd |rsvd_bits (maxphyaddr,51 ) |rsvd_bits (13 ,20 );/* large page */ - context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[1 ][0 ]; + context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[0 ][0 ];break ; } }
Signature · 1 line
1.6.6.1
Quoted 4 lines · Xiao Guangrong
- Check reserved bits only if CR4.PAE=1 or CR4.PSE=1 when guest #PF occurs
- Fix a typo inreset_rsvds_bits_mask()Signed-off-by Xiao Guangrong <[email protected]>
Reviewed-by Marcelo Tosatti <[email protected]>
Quoted 49 lines
--- arch/x86/kvm/mmu.c | 12 +++++++++--- 1 files changed, 9 insertions(+), 3 deletions(-)arch/x86/kvm/mmu.c +9
-3@@ -2293,13 +2293,19 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)/* no rsvd bits for 2 level 4K page table entries */ context->rsvd_bits_mask[0 ][1 ] =0 ; context->rsvd_bits_mask[0 ][0 ] =0 ; + context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[0 ][0 ]; + +if (!is_pse (vcpu)) { + context->rsvd_bits_mask[1 ][1 ] =0 ; +break ; + } +if (is_cpuid_PSE36 ())/* 36bits PSE 4MB page */ context->rsvd_bits_mask[1 ][1 ] =rsvd_bits (17 ,21 );else /* 32 bits PSE 4MB page */ context->rsvd_bits_mask[1 ][1 ] =rsvd_bits (13 ,21 ); - context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[1 ][0 ];break ;case PT32E_ROOT_LEVEL : context->rsvd_bits_mask[0][2] =@@ -2312,7 +2318,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) context->rsvd_bits_mask[1 ][1 ] = exb_bit_rsvd |rsvd_bits (maxphyaddr,62 ) |rsvd_bits (13 ,20 );/* large page */ - context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[1 ][0 ]; + context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[0 ][0 ];break ;case PT64_ROOT_LEVEL : context->rsvd_bits_mask[0][3] = exb_bit_rsvd |@@ -2330,7 +2336,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) context->rsvd_bits_mask[1 ][1 ] = exb_bit_rsvd |rsvd_bits (maxphyaddr,51 ) |rsvd_bits (13 ,20 );/* large page */ - context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[1 ][0 ]; + context->rsvd_bits_mask[1 ][0 ] = context->rsvd_bits_mask[0 ][0 ];break ; } }Signature · 1 line
1.6.6.1
Avi Kivity
AppliedQuoted 4 lines · Xiao Guangrong
- Check reserved bits only if CR4.PAE=1 or CR4.PSE=1 when guest #PF occurs
- Fix a typo inreset_rsvds_bits_mask()
Applied, thanks.
Signature · 1 line
error compiling committee.c: too many arguments to function