nios2: add nios2-generic board

This patch supports the Altera CycloneII Nios dev board using

This patch supports the Altera CycloneII Nios dev board using the example FPGA design at http://nioswiki.com/Linux.

Signed-off-by Thomas Chou<[email protected]>

---

This patch supports the Altera CycloneIII Nios dev board using the example FPGA design at http://nioswiki.com/Linux.

This board servers as a configuration template for nios2-generic approach. Since each fpga board can have different designs, we will refer them as designs rather than boards. All designs can share the same nios2-generic board directory.

board/altera/nios2-generic/default_mmu.h new file +8 -0

+
+/*
+ * Macros for device 'descriptor_memory', class 'altera_avalon_onchip_memory2'
+ * The macros are prefixed with 'DESCRIPTOR_MEMORY_'.
+ * The prefix is the slave descriptor.
+ */
+#define DESCRIPTOR_MEMORY_BASE 0x8002000
+#define DESCRIPTOR_MEMORY_SPAN 8192u

board/altera/nios2-generic/default_mmu.h new file +8 -0

+
+/*
+ * Macros for device 'sgdma_tx', class 'altera_avalon_sgdma'
+ * The macros are prefixed with 'SGDMA_TX_'.
+ * The prefix is the slave descriptor.
+ */
+#define SGDMA_TX_BASE 0x8004800
+#define SGDMA_TX_SPAN 1024u

board/altera/nios2-generic/default_mmu.h new file +19 -0

+
+/*
+ * Macros for device 'sysid', class 'altera_avalon_sysid'
+ * The macros are prefixed with 'SYSID_'.
+ * The prefix is the slave descriptor.
+ */
+#define SYSID_BASE 0x8004d40
+#define SYSID_SPAN 8u
+#define SYSID_ID 1174346794u
+#define SYSID_TIMESTAMP 1233287581u
+
+/*
+ * Macros for device 'jtag_uart', class 'altera_avalon_jtag_uart'
+ * The macros are prefixed with 'JTAG_UART_'.
+ * The prefix is the slave descriptor.
+ */
+#define JTAG_UART_BASE 0x8004d50
+#define JTAG_UART_SPAN 8u
+#define JTAG_UART_IRQ 1

board/altera/nios2-generic/default_mmu.h new file +3 -0

+
+
+#endif /* _ALTERA_LINUX_CPU_H_ */

include/configs/EP3C120.h new file +23 -0

new file mode 100644
index 0000000..83f9e09
@@ -0,0 +1,376 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <[email protected]>
+ * (C) Copyright 2010, Thomas Chou <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

include/configs/EP3C120.h new file +4 -0

+
+#define CONFIG_SYS_CLK_FREQ		CPU_FREQ
+#define CONFIG_SYS_RESET_ADDR		RESET_ADDR
+#define CONFIG_SYS_EXCEPTION_ADDR	EXCEPTION_ADDR

include/configs/EP3C120.h new file +167 -0

+
+/*
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ */
+#define CONFIG_SYS_ICACHE_SIZE		ICACHE_SIZE
+#define CONFIG_SYS_ICACHELINE_SIZE	ICACHE_LINE_SIZE
+#define CONFIG_SYS_DCACHE_SIZE		DCACHE_SIZE
+#define CONFIG_SYS_DCACHELINE_SIZE	DCACHE_LINE_SIZE
+
+/*
+ * MEMORY BASE ADDRESSES
+ */
+#define CONFIG_SYS_SDRAM_BASE (DDR2_LO_LATENCY_128M_BASE | KERNEL_REGION_BASE)
+#define CONFIG_SYS_SDRAM_SIZE		(DDR2_LO_LATENCY_128M_SPAN)
+
+/*
+ * GPIO
+ */
+#define CONFIG_SYS_GPIO_BASE		(GPIO_BASE | IO_REGION_BASE)
+#ifdef CONFIG_SYS_GPIO_BASE
+# define CONFIG_SYS_GPIO_NRB 2
+# define CONFIG_SYS_GPIO_HBT 3
+#endif
+
+/*
+ * Flash Settings
+ */
+/* #define CONFIG_SYS_NO_FLASH */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+
+#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */
+#define CONFIG_SYS_FLASH_BASE		(CFI_FLASH_64M_BASE | IO_REGION_BASE)
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	512
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+
+/*
+ * SPI FLash,EPCS Settings
+ */
+/* #define CONFIG_CMD_SPI */
+/* #define CONFIG_CMD_SF */
+/* #define CONFIG_SPI_FLASH */
+/* #define CONFIG_ALTERA_SPI */
+
+#define CONFIG_ENV_SPI_MAX_HZ		30000000
+#define CONFIG_SF_DEFAULT_SPEED	30000000
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SYS_SPI_BASE		((EPCS_CONTROLLER_BASE + \
+					  EPCS_CONTROLLER_REGISTER_OFFSET) \
+					 | IO_REGION_BASE)
+
+/*
+ * NAND Flash
+ */
+/* #define CONFIG_CMD_NAND */
+/* #define CONFIG_NAND_PLAT */
+
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		(NAND_FLASH_BASE | IO_REGION_BASE)
+#define NIOS2_NAND_PLAT_CLE		2
+#define NIOS2_NAND_PLAT_ALE		3
+#define NAND_PLAT_WRITE_CMD(chip, cmd) \
+	writeb(cmd, (unsigned int)(this->IO_ADDR_W) + \
+	       (1 << NIOS2_NAND_PLAT_CLE))
+#define NAND_PLAT_WRITE_ADR(chip, cmd) \
+	writeb(cmd, (unsigned int)(this->IO_ADDR_W) + \
+	       (1 << NIOS2_NAND_PLAT_ALE))
+#define NAND_PLAT_INIT() {}
+#ifdef CONFIG_SYS_GPIO_NRB
+# define NAND_PLAT_DEV_READY(chip) \
+	readl(CONFIG_SYS_GPIO_BASE + ((CONFIG_SYS_GPIO_NRB) << 2))
+#endif
+
+/*
+ * SERIAL
+ */
+/* #define CONFIG_ALTERA_UART */
+#define CONFIG_ALTERA_JTAG_UART
+
+#if defined(CONFIG_ALTERA_JTAG_UART)
+#define CONFIG_SYS_NIOS_CONSOLE	(JTAG_UART_BASE | IO_REGION_BASE)
+#else
+#define CONFIG_SYS_NIOS_CONSOLE	(UART_BASE | IO_REGION_BASE)
+#endif
+
+#define CONFIG_ALTERA_JTAG_UART_BYPASS
+#define CONFIG_SYS_UART_FREQ		UART_FREQ
+#define CONFIG_BAUDRATE		UART_BAUD	/* Initial baudrate */
+#define CONFIG_SYS_BAUDRATE_TABLE	{UART_BAUD}
+#define CONFIG_SYS_CONSOLE_INFO_QUIET	1	/* Suppress console info */
+
+/*
+ * SYSID
+ */
+#define CONFIG_SYS_NIOS_SYSID_BASE	(SYSID_BASE | IO_REGION_BASE)
+
+/*
+ * TIMER
+ */
+#define CONFIG_SYS_NIOS_TMRBASE	(LINUX_TIMER_1MS_BASE | IO_REGION_BASE)
+#define CONFIG_SYS_NIOS_TMRIRQ		LINUX_TIMER_1MS_IRQ
+#define CONFIG_SYS_HZ			1000	/* Always 1000 */
+#define CONFIG_SYS_NIOS_TMRMS		1	/* Desired period (msec)*/
+#define CONFIG_SYS_NIOS_TMRCNT \
+	(CONFIG_SYS_NIOS_TMRMS * (LINUX_TIMER_1MS_FREQ / 1000) - 1)
+
+/*
+ * STATUS LED
+ */
+#define CONFIG_STATUS_LED		/* Enable status driver */
+#define CONFIG_EPLED			/* Enable LED PIO driver */
+#define CONFIG_SYS_LEDPIO_ADDR		(USER_LED_PIO_8OUT_BASE | \
+					 IO_REGION_BASE)
+/* #define CONFIG_GPIOLED */
+
+#define STATUS_LED_BIT			1	/* Bit-0 on PIO */
+#define STATUS_LED_STATE		1	/* Blinking */
+#define STATUS_LED_PERIOD	(500 / CONFIG_SYS_NIOS_TMRMS) /* 500 msec */
+
+/*
+ * IDE support
+ */
+/* #define CONFIG_CMD_IDE */
+
+#define CONFIG_SYS_PIO_MODE		1
+#define CONFIG_SYS_IDE_MAXBUS		1	/* IDE bus */
+#define CONFIG_SYS_IDE_MAXDEVICE	1
+#define CONFIG_SYS_ATA_BASE_ADDR	(CF_IDE_BASE | IO_REGION_BASE)
+#define CONFIG_SYS_ATA_STRIDE		4	/* 1bit shift */
+#define CONFIG_SYS_ATA_DATA_OFFSET	0x0	/* data reg offset */
+#define CONFIG_SYS_ATA_REG_OFFSET	0x0	/* reg offset */
+#define CONFIG_SYS_ATA_ALT_OFFSET	0x20	/* alternate register offset */
+#define CONFIG_SYS_CF_CTL_BASE		(CF_CTL_BASE | IO_REGION_BASE)
+#define CONFIG_IDE_RESET
+
+/*
+ * ETHERNET
+ */
+/* #define CONFIG_SMC91111 */
+#define CONFIG_SMC91111_BASE	((ENET_BASE + ENET_LAN91C111_REGISTERS_OFFSET) \
+				 | IO_REGION_BASE) /* Base addr	*/
+#undef	CONFIG_SMC91111_EXT_PHY		/* Internal PHY	*/
+#define CONFIG_SMC_USE_32_BIT			/* 32-bit interface	*/
+
+/* #define CONFIG_DRIVER_DM9000 */
+#define CONFIG_DM9000_BASE		(DM9000_BASE | IO_REGION_BASE)
+#define DM9000_IO			CONFIG_DM9000_BASE
+#define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
+#define CONFIG_DM9000_USE_16BIT	1
+#define CONFIG_DM9000_NO_SROM		1
+/* #define CONFIG_NET_RETRY_COUNT		20 */
+/* #define CONFIG_RESET_PHY_R		1 */
+
+/* #define CONFIG_ALTERA_TSE */
+/* #define CONFIG_MII		1 */
+/* #define CONFIG_CMD_MII */
+/* #define CONFIG_ETHPRIME "tse0" */
+#undef  CONFIG_PCI
+
+#define CONFIG_SYS_NUM_TSE_MACS			1
+#define CONFIG_SYS_ALTERA_TSE_0_NAME		"tse0"
+#define CONFIG_SYS_ALTERA_TSE_0_BASE		(TSE_MAC_BASE | IO_REGION_BASE)
+#define CONFIG_SYS_ALTERA_TSE_0_SGDMA_RX_BASE	(SGDMA_RX_BASE | IO_REGION_BASE)

include/configs/EP3C120.h new file +152 -0

+
+/* TSE Supported modes */
+/* GMII/MII	= 0 */
+/* RGMII	= 1 */
+/* RGMII_ID	= 2 */
+/* RGMII_TXID	= 3 */
+/* RGMII_RXID	= 4 */
+/* SGMII	= 5 */
+#define CONFIG_SYS_ALTERA_TSE_0_FLAGS		0x0
+
+/* #define CONFIG_ETHOC */
+#define CONFIG_SYS_ETHOC_BASE		(IGOR_MAC_BASE | IO_REGION_BASE)
+
+#define CONFIG_ETHADDR		08:00:3e:26:0a:5b
+#define CONFIG_NETMASK		255.255.255.0
+#define CONFIG_IPADDR		192.168.1.10
+#define CONFIG_GWADDR		192.168.1.1
+#define CONFIG_SERVERIP	192.168.1.1
+#define CONFIG_BOOTDELAY	5
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_BOOTD
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_ITEST
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
+
+#ifdef CONFIG_CMD_NET
+# define CONFIG_NET_MULTI
+# define CONFIG_CMD_DHCP
+# define CONFIG_CMD_PING
+#endif
+
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_JFFS2
+#define CONFIG_JFFS2_CMDLINE
+/* #define CONFIG_CMD_FAT */
+/* #define CONFIG_DOS_PARTITION */
+/* #define CONFIG_CMD_UBI */
+/* #define CONFIG_CMD_UBIFS */
+/* #define CONFIG_RBTREE */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_MTDPARTS
+/* #define CONFIG_LZO */
+
+/*
+ * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
+ * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
+ * reset address, no? This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ */
+#define CONFIG_ENV_IS_IN_FLASH
+/* #define CONFIG_ENV_IS_IN_SPI_FLASH */
+/* #define CONFIG_ENV_IS_IN_NAND */
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+# define CONFIG_ENV_SIZE		0x20000	/* 1 sector */
+# define CONFIG_ENV_OVERWRITE		/* Serial change Ok	*/
+# define CONFIG_ENV_ADDR		((CONFIG_SYS_RESET_ADDR + \
+					  CONFIG_SYS_MONITOR_LEN) | \
+					 IO_REGION_BASE)
+#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+# define CONFIG_ENV_OFFSET		0x7e0000	/* last sector */
+# define CONFIG_ENV_SIZE		0x20000	/* 1 sector */
+# define CONFIG_ENV_SECT_SIZE		0x20000
+# define CONFIG_ENV_SPI_BUS		0
+# define CONFIG_ENV_SPI_CS		0
+# define CONFIG_ENV_SPI_MAX_HZ		30000000	/*30Mhz */
+#elif defined(CONFIG_ENV_IS_IN_NAND)
+# define CONFIG_ENV_OFFSET		0x40000
+# define CONFIG_ENV_SIZE		0x40000	/* 1 sector */
+#else
+# define CONFIG_ENV_IS_NOWHERE		1	/* if env in SDRAM */
+# define CONFIG_ENV_SIZE		0x20000
+#endif
+
+/*
+ * MEMORY ORGANIZATION
+ *	-Monitor at top of sdram.
+ *	-The heap is placed below the monitor
+ *	-Global data is placed below the heap.
+ *	-The stack is placed below global data (&grows down).
+ */
+#define CONFIG_MONITOR_IS_IN_RAM
+#ifdef CONFIG_CMD_UBI
+# define CONFIG_SYS_MONITOR_LEN	0x80000	/* Reserve 512k */
+#else
+# define CONFIG_SYS_MONITOR_LEN	0x40000	/* Reserve 256k */
+#endif
+#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_SDRAM_BASE + \
+					 CONFIG_SYS_SDRAM_SIZE - \
+					 CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_SYS_GBL_DATA_SIZE	256	/* Global data size rsvd */
+#ifdef CONFIG_CMD_UBI			/* UBI needs >512KB malloc */
+# define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x100000)
+#else
+# define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x20000)
+#endif
+#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MONITOR_BASE - \
+					 CONFIG_SYS_MALLOC_LEN)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_MALLOC_BASE - \
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP		CONFIG_SYS_GBL_DATA_OFFSET
+
+/*
+ * MISC
+ */
+#define CONFIG_SYS_LONGHELP		/* Provide extended help */
+#define CONFIG_SYS_PROMPT		"==> "	/* Command prompt	*/
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O buf size */
+#define CONFIG_SYS_MAXARGS		16	/* Max command args	*/
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Bootarg buf size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + \
+					 16)	/* Print buf size */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_INIT_SP - 0x20000)
+
+#if defined(CONFIG_NAND_PLAT)
+# define MTD_ENV_SETTINGS \
+	"mtdids=nand0=nand0\0"						\
+	"mtdparts=mtdparts=nand0:-(data)\0"
+#elif defined(CONFIG_FLASH_CFI_DRIVER)
+# define MTD_ENV_SETTINGS \
+	"mtdids=nor0=physmap-flash.0\0"				\
+	"mtdparts=mtdparts=physmap-flash.0:40m(JFFS),1M(U-Boot),4m(uImage1)," \
+	"4m(uImage2),4m(uImage3),3584k(DEFAULT_MMU),3584k(MAXIMUM_MMU),"\
+	"3584k(USER_IMAGE),512k(options-bits)\0"
+#else
+# define MTD_ENV_SETTINGS
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	MTD_ENV_SETTINGS
+
+#define CONFIG_CMDLINE_EDITING
+
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#endif
+
+#endif /* __CONFIG_H */

This patch supports the Altera CycloneIII Nios dev board using the example FPGA design at http://nioswiki.com/Linux.

This board servers as a configuration template for nios2-generic approach. Since each fpga board can have different designs, we will refer them as designs rather than boards. All designs can share the same nios2-generic board directory.

To support a new design,
1. add a configuration file based on EP3C120.h.
2. include the fpga header file
3. add an entry to the NIOS2_GENERIC list in the top Makefile

Signed-off-by Thomas Chou<[email protected]>

---

This patch supports the Altera Nios2 Embedded Evaluation Kit using

This patch supports the Altera Nios2 Embedded Evaluation Kit using the example FPGA design at http://nioswiki.com/Linux.

Signed-off-by Thomas Chou<[email protected]>

---

This patch supports the Altera CycloneII Nios dev board using the example FPGA design at http://nioswiki.com/Linux.

Signed-off-by Thomas Chou <[email protected]>

---
 MAINTAINERS                          |    1 +
 MAKEALL                              |    1 +
 Makefile                             |    6 +
 board/altera/nios2-generic/2c35_cf.h |  757 ++++++++++++++++++++++++++++++++++
 include/configs/EP2C35.h             |  372 +++++++++++++++++
 5 files changed, 1137 insertions(+), 0 deletions(-)
 create mode 100644 board/altera/nios2-generic/2c35_cf.h
 create mode 100644 include/configs/EP2C35.h

I am strongly against this style of adding any specific nios board to U-BOOT.

1. I am not convinced that all information from 2c35_cf.h are important for U-BOOT.
What connection has for example "#define KERNEL_REGION_BASE 0xc0000000"? or others.

board/altera/nios2-generic/2c35_cf.h new file +4 -0

+#define PLL_COMPONENT_TYPE altera_avalon_pll
+#define PLL_COMPONENT_NAME pll
+#define PLL_BASE 0x1000020
+#define PLL_SPAN 32

It is the same situation as we solved for Xilinx boards. Create generic nios board and then generate only parameters which are necessary for U-BOOT itself.
For example I am using only one microblaze generic board to cover all microblaze boards.
Look at Microblaze or ppc405/440 solution. board/xilinx is good start for you.

This patch fixes error when CONFIG_SYS_NO_FLASH. And adds nand flash and mmc initialization, which should go before env initialization.

Signed-off-by Thomas Chou <[email protected]>

---
v3 include mmc.h and nand.h.
v2 arch dir reorganized.

 arch/nios2/lib/board.c |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

arch/nios2/lib/board.c +18 -0

index 8ec66a3..f83e691 100644
@@ -28,6 +28,7 @@
 #include <stdio_dev.h>
 #include <watchdog.h>
 #include <malloc.h>
+#include <mmc.h>
 #include <net.h>
 #ifdef CONFIG_STATUS_LED
 #include <status_led.h>

@@ -35,6 +36,9 @@
 #if defined(CONFIG_SYS_NIOS_EPCSBASE)
 #include <nios2-epcs.h>
 #endif
+#ifdef CONFIG_CMD_NAND
+#include <nand.h>	/* cannot even include nand.h if it isnt configured */
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -100,7 +104,9 @@ void board_init (void)
 	bd = gd->bd;
 	bd->bi_memstart	= CONFIG_SYS_SDRAM_BASE;
 	bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+#ifndef CONFIG_SYS_NO_FLASH
 	bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+#endif
 #if	defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
 	bd->bi_sramstart= CONFIG_SYS_SRAM_BASE;
 	bd->bi_sramsize	= CONFIG_SYS_SRAM_SIZE;

@@ -119,8 +125,20 @@ void board_init (void)
 	/* The Malloc area is immediately below the monitor copy in RAM */
 	mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
 
+#ifndef CONFIG_SYS_NO_FLASH
 	WATCHDOG_RESET ();
 	bd->bi_flashsize = flash_init();
+#endif
+
+#ifdef CONFIG_CMD_NAND
+	puts("NAND:  ");
+	nand_init();
+#endif
+
+#ifdef CONFIG_GENERIC_MMC
+	puts("MMC:   ");
+	mmc_initialize(bd);
+#endif
 
 	WATCHDOG_RESET ();
 	env_relocate();

This is a generic approach to port u-boot for nios2 boards. You may find the usage of this approach on the nioswiki,
http://nioswiki.com/DasUBoot

A fpga parameter file, which contains base address information and drivers declaration, is generated from Altera's hardware system description sopc file using tools.

The example fpga parameter file is compatible with EP1C20, EP1S10 and EP1S40 boards. So these boards can be removed after this commit. Though epcs controller is not included to cut the dependency of altera_spi driver.

Signed-off-by Thomas Chou <[email protected]>

---
fix board_eth_init() return.
add nios2-generic board template.

The fpga parameter file is generated with a script at
http://sopc.et.ntust.edu.tw/?p=toolchain-build.git;
a=blob_plain;f=tools/sopc-create-config-files;hb=HEAD

 MAINTAINERS                                |    1 +
 MAKEALL                                    |    1 +
 Makefile                                   |    6 +
 board/altera/nios2-generic/Makefile        |   60 +++++++++++
 board/altera/nios2-generic/config.mk       |   32 ++++++
 board/altera/nios2-generic/custom_fpga.h   |   66 ++++++++++++
 board/altera/nios2-generic/nios2-generic.c |   68 ++++++++++++
 board/altera/nios2-generic/text_base.S     |   21 ++++
 board/altera/nios2-generic/u-boot.lds      |  136 ++++++++++++++++++++++++
 include/configs/nios2-generic.h            |  153 ++++++++++++++++++++++++++++
 10 files changed, 544 insertions(+), 0 deletions(-)
 create mode 100644 board/altera/nios2-generic/Makefile
 create mode 100644 board/altera/nios2-generic/config.mk
 create mode 100644 board/altera/nios2-generic/custom_fpga.h
 create mode 100644 board/altera/nios2-generic/nios2-generic.c
 create mode 100644 board/altera/nios2-generic/text_base.S
 create mode 100644 board/altera/nios2-generic/u-boot.lds
 create mode 100644 include/configs/nios2-generic.h

MAINTAINERS +1 -0

index 04c8730..46e051b 100644
@@ -858,6 +858,7 @@ Scott McNutt <[email protected]>
 	EP1C20		Nios-II
 	EP1S10		Nios-II
 	EP1S40		Nios-II
+	nios2-generic	Nios-II
 
 #########################################################################
 # MicroBlaze Systems:							#

MAKEALL +1 -0

index fb1f7a3..216b89b 100755
@@ -824,6 +824,7 @@ LIST_nios2="		\
 	EP1S40		\
 	PCI5441		\
 	PK1C20		\
+	nios2-generic	\
 "
 
 #########################################################################

Makefile +6 -0

index 5d314c6..752f529 100644
@@ -3538,6 +3538,12 @@ PK1C20_config : unconfig
 PCI5441_config : unconfig
 	@$(MKCONFIG)  PCI5441 nios2 nios2 pci5441 psyent
 
+# nios2 generic boards
+NIOS2_GENERIC = nios2-generic
+
+$(NIOS2_GENERIC:%=%_config) : unconfig
+	@$(MKCONFIG) $(@:_config=) nios2 nios2 nios2-generic altera
+
 #========================================================================
 ## Microblaze
 #========================================================================

board/altera/nios2-generic/Makefile new file +60 -0

new file mode 100644
index 0000000..2a6f69b
@@ -0,0 +1,60 @@
+#
+# (C) Copyright 2001-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+# (C) Copyright 2010, Thomas Chou <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../common)
+endif
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o
+COBJS-$(CONFIG_CMD_IDE) += ../common/cfide.o
+COBJS-$(CONFIG_EPLED) += ../common/epled.o
+COBJS-$(CONFIG_GPIOLED) += ../common/gpioled.o
+COBJS-$(CONFIG_SEVENSEG) += ../common/sevenseg.o
+
+SOBJS-y	:= text_base.o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/altera/nios2-generic/config.mk new file +32 -0

new file mode 100644
index 0000000..cb7c68e
@@ -0,0 +1,32 @@
+#
+# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+# Scott McNutt <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# we get text_base from board config header, so do not use this
+#TEXT_BASE = do-not-use-me
+
+PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif

board/altera/nios2-generic/custom_fpga.h new file +66 -0

new file mode 100644
index 0000000..761f605
@@ -0,0 +1,66 @@
+/*
+ * (C) Copyright 2010, Thomas Chou <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file is generated by sopc-create-config-files.
+ */
+#ifndef _CUSTOM_FPGA_H_
+#define _CUSTOM_FPGA_H_
+
+/* generated from std_1c20.sopc */
+
+/* cpu.data_master is a altera_nios2 */
+#define CONFIG_SYS_CLK_FREQ 50000000
+#define CONFIG_SYS_RESET_ADDR 0x00000000
+#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020
+#define CONFIG_SYS_ICACHE_SIZE 4096
+#define CONFIG_SYS_ICACHELINE_SIZE 32
+#define CONFIG_SYS_DCACHE_SIZE 2048
+#define CONFIG_SYS_DCACHELINE_SIZE 4
+
+/* sdram.s1 is a altera_avalon_new_sdram_controller */
+#define CONFIG_SYS_SDRAM_BASE 0x01000000
+#define CONFIG_SYS_SDRAM_SIZE 0x01000000
+
+/* uart1.s1 is a altera_avalon_uart */
+#define CONFIG_SYS_UART_BASE 0x82120840
+#define CONFIG_SYS_UART_FREQ 50000000
+#define CONFIG_SYS_UART_BAUD 115200
+
+/* lan91c111.s1 is a altera_avalon_lan91c111 */
+#define CONFIG_SMC91111_BASE 0x82110300
+#define CONFIG_SMC91111
+#define CONFIG_SMC_USE_32_BIT
+
+/* jtag_uart.avalon_jtag_slave is a altera_avalon_jtag_uart */
+#define CONFIG_SYS_JTAG_UART_BASE 0x821208b0
+
+/* led_pio.s1 is a altera_avalon_pio */
+#define LED_PIO_BASE 0x82120870
+
+/* high_res_timer.s1 is a altera_avalon_timer */
+#define CONFIG_SYS_TIMER_BASE 0x82120820
+#define CONFIG_SYS_TIMER_IRQ 3
+#define CONFIG_SYS_TIMER_FREQ 50000000
+
+/* ext_flash.s1 is a altera_avalon_cfi_flash */
+#define CONFIG_SYS_FLASH_BASE 0x80000000
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 1024
+
+/* ext_ram.s1 is a altera_nios_dev_kit_stratix_edition_sram2 */
+#define CONFIG_SYS_SRAM_BASE 0x02000000
+#define CONFIG_SYS_SRAM_SIZE 0x00100000
+
+/* sysid.control_slave is a altera_avalon_sysid */
+#define CONFIG_SYS_SYSID_BASE 0x821208b8
+
+#endif /* _CUSTOM_FPGA_H_ */

board/altera/nios2-generic/nios2-generic.c new file +68 -0

new file mode 100644
index 0000000..89848cf
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <[email protected]>
+ * (C) Copyright 2010, Thomas Chou <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+void text_base_hook(void); /* nop hook for text_base.S */
+
+int board_early_init_f(void)
+{
+	text_base_hook();
+	return 0;
+}
+
+int checkboard(void)
+{
+	printf("BOARD : %s\n", CONFIG_BOARD_NAME);
+	return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+	return 0;
+}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+#ifdef CONFIG_SMC91111
+	rc += smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+#ifdef CONFIG_DRIVER_DM9000
+	rc += dm9000_initialize(bis);
+#endif
+#ifdef CONFIG_ALTERA_TSE
+	rc += altera_tse_initialize(0,
+				    CONFIG_SYS_ALTERA_TSE_MAC_BASE,
+				    CONFIG_SYS_ALTERA_TSE_SGDMA_RX_BASE,
+				    CONFIG_SYS_ALTERA_TSE_SGDMA_TX_BASE);
+#endif
+#ifdef CONFIG_ETHOC
+	rc += ethoc_initialize(0, CONFIG_SYS_ETHOC_BASE);
+#endif
+	return rc;
+}
+#endif

board/altera/nios2-generic/text_base.S new file +21 -0

new file mode 100644
index 0000000..f236db1
@@ -0,0 +1,21 @@
+/*
+ * text_base
+ *
+ * (C) Copyright 2010, Thomas Chou <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <config.h>
+
+#ifdef CONFIG_SYS_MONITOR_BASE
+	.text
+	/* text base used in link script u-boot.lds */
+	.global text_base
+	.equ text_base,CONFIG_SYS_MONITOR_BASE
+	/* dummy func to let linker include this file */
+	.global text_base_hook
+text_base_hook:
+	ret
+#endif

board/altera/nios2-generic/u-boot.lds new file +136 -0

new file mode 100644
index 0000000..fa7ed30
@@ -0,0 +1,136 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-littlenios2")
+OUTPUT_ARCH(nios2)
+ENTRY(_start)
+
+SECTIONS
+{
+	. = text_base;
+	.text :
+	{
+	  cpu/nios2/start.o (.text)
+	  *(.text)
+	  *(.text.*)
+	  *(.gnu.linkonce.t*)
+	  *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	  *(.gnu.linkonce.r*)
+	}
+	. = ALIGN (4);
+	_etext = .;
+	PROVIDE (etext = .);
+
+	/* CMD TABLE - sandwich this in between text and data so
+	 * the initialization code relocates the command table as
+	 * well -- admittedly, this is just pure laziness ;-)
+	 */
+	__u_boot_cmd_start = .;
+	.u_boot_cmd :
+	{
+	  *(.u_boot_cmd)
+	}
+	. = ALIGN(4);
+	__u_boot_cmd_end = .;
+
+	/* INIT DATA sections - "Small" data (see the gcc -G option)
+	 * is always gp-relative. Here we make all init data sections
+	 * adjacent to simplify the startup code -- and provide
+	 * the global pointer for gp-relative access.
+	 */
+	_data = .;
+	.data :
+	{
+	  *(.data)
+	  *(.data.*)
+	  *(.gnu.linkonce.d*)
+	}
+
+	. = ALIGN(16);
+	_gp = .;			/* Global pointer addr */
+	PROVIDE (gp = .);
+
+	.sdata :
+	{
+	  *(.sdata)
+	  *(.sdata.*)
+	  *(.gnu.linkonce.s.*)
+	}
+	. = ALIGN(4);
+
+	_edata = .;
+	PROVIDE (edata = .);
+
+	/* UNINIT DATA - Small uninitialized data is first so it's
+	 * adjacent to sdata and can be referenced via gp. The normal
+	 * bss follows. We keep it adjacent to simplify init code.
+	 */
+	__bss_start = .;
+	.sbss (NOLOAD) :
+	{
+	  *(.sbss)
+	  *(.sbss.*)
+	  *(.gnu.linkonce.sb.*)
+	  *(.scommon)
+	}
+	. = ALIGN(4);
+	.bss (NOLOAD) :
+	{
+	  *(.bss)
+	  *(.bss.*)
+	  *(.dynbss)
+	  *(COMMON)
+	  *(.scommon)
+	}
+	. = ALIGN(4);
+	_end = .;
+	PROVIDE (end = .);
+
+	/* DEBUG -- symbol table, string table, etc. etc.
+	 */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug		0 : { *(.debug) }
+	.line		0 : { *(.line) }
+	.debug_srcinfo	0 : { *(.debug_srcinfo) }
+	.debug_sfnames	0 : { *(.debug_sfnames) }
+	.debug_aranges	0 : { *(.debug_aranges) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_info	0 : { *(.debug_info) }
+	.debug_abbrev	0 : { *(.debug_abbrev) }
+	.debug_line	0 : { *(.debug_line) }
+	.debug_frame	0 : { *(.debug_frame) }
+	.debug_str	0 : { *(.debug_str) }
+	.debug_loc	0 : { *(.debug_loc) }
+	.debug_macinfo	0 : { *(.debug_macinfo) }
+	.debug_weaknames 0 : { *(.debug_weaknames) }
+	.debug_funcnames 0 : { *(.debug_funcnames) }
+	.debug_typenames 0 : { *(.debug_typenames) }
+	.debug_varnames	 0 : { *(.debug_varnames) }
+}

include/configs/nios2-generic.h new file +153 -0

new file mode 100644
index 0000000..e83e1e3
@@ -0,0 +1,153 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <[email protected]>
+ * (C) Copyright 2010, Thomas Chou <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * BOARD/CPU
+ */
+#include "../board/altera/nios2-generic/custom_fpga.h" /* fpga parameters */
+#define CONFIG_BOARD_NAME "nios2-generic" /* custom board name */
+#define CONFIG_BOARD_EARLY_INIT_F	/* enable early board-spec. init */
+#define CONFIG_SYS_NIOS_SYSID_BASE	CONFIG_SYS_SYSID_BASE
+
+/*
+ * SERIAL
+ */
+#define CONFIG_ALTERA_UART
+#if defined(CONFIG_ALTERA_JTAG_UART)
+# define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_JTAG_UART_BASE
+#else
+# define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_UART_BASE
+#endif
+
+#define CONFIG_ALTERA_JTAG_UART_BYPASS
+#define CONFIG_SYS_NIOS_FIXEDBAUD
+#define CONFIG_BAUDRATE		CONFIG_SYS_UART_BAUD
+#define CONFIG_SYS_BAUDRATE_TABLE	{CONFIG_BAUDRATE}
+#define CONFIG_SYS_CONSOLE_INFO_QUIET	/* Suppress console info */
+
+/*
+ * TIMER
+ */
+#define CONFIG_SYS_NIOS_TMRBASE	CONFIG_SYS_TIMER_BASE
+#define CONFIG_SYS_NIOS_TMRIRQ		CONFIG_SYS_TIMER_IRQ
+#define CONFIG_SYS_HZ			1000	/* Always 1000 */
+#define CONFIG_SYS_NIOS_TMRMS		10	/* Desired period (msec)*/
+#define CONFIG_SYS_NIOS_TMRCNT \
+	(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_TIMER_FREQ / 1000) - 1)
+
+/*
+ * STATUS LED
+ */
+#define CONFIG_STATUS_LED		/* Enable status driver */
+#define CONFIG_EPLED			/* Enable LED PIO driver */
+#define CONFIG_SYS_LEDPIO_ADDR		LED_PIO_BASE
+
+#define STATUS_LED_BIT			1	/* Bit-0 on PIO */
+#define STATUS_LED_STATE		1	/* Blinking */
+#define STATUS_LED_PERIOD	(500 / CONFIG_SYS_NIOS_TMRMS) /* 500 msec */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_BOOTD
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_ITEST
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
+
+#ifdef CONFIG_CMD_NET
+# define CONFIG_NET_MULTI
+# define CONFIG_CMD_DHCP
+# define CONFIG_CMD_PING
+#endif
+
+/*
+ * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
+ * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
+ * reset address, no? This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ */
+#define CONFIG_ENV_IS_IN_FLASH
+
+#define CONFIG_ENV_SIZE		0x10000	/* 64k, 1 sector */
+#define CONFIG_ENV_OVERWRITE		/* Serial change Ok	*/
+#define CONFIG_ENV_ADDR		((CONFIG_SYS_RESET_ADDR + \
+					  CONFIG_SYS_MONITOR_LEN) | \
+					 CONFIG_SYS_FLASH_BASE)
+
+/*
+ * MEMORY ORGANIZATION
+ *	-Monitor at top of sdram.
+ *	-The heap is placed below the monitor
+ *	-Global data is placed below the heap.
+ *	-The stack is placed below global data (&grows down).
+ */
+#define CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_SYS_MONITOR_LEN		0x40000	/* Reserve 256k */
+#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_SDRAM_BASE + \
+					 CONFIG_SYS_SDRAM_SIZE - \
+					 CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_SYS_GBL_DATA_SIZE	256	/* Global data size rsvd */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x20000)
+#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MONITOR_BASE - \
+					 CONFIG_SYS_MALLOC_LEN)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_MALLOC_BASE - \
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP		CONFIG_SYS_GBL_DATA_OFFSET
+
+/*
+ * MISC
+ */
+#define CONFIG_SYS_LONGHELP		/* Provide extended help */
+#define CONFIG_SYS_PROMPT		"==> "	/* Command prompt	*/
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O buf size */
+#define CONFIG_SYS_MAXARGS		16	/* Max command args	*/
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Bootarg buf size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + \
+					 16)	/* Print buf size */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_INIT_SP - 0x20000)
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+#endif /* __CONFIG_H */