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sata_sil24: fix kernel panic on ARM caused by unaligned access in sata_sil24

PATCH Applied Tejun Heo 2 participants 2 messages Jun 4, 2010 – Jun 7, 2010 libata

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Tejun Heo

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PATCH 1/1 sata_sil24: fix kernel panic on ARM caused by unaligned access in sata_sil24

From: Colin Tuckley <[email protected]>

The sata_sil24 driver has six 16-bit registers that are initialised with 32-bit writes. This cause a kernel panic on ARM due to the unaligned accesses which result.

This patch changes the accesses to the correct 16-bit ones.

---
 drivers/ata/sata_sil24.c |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
drivers/ata/sata_sil24.c +6 -6
index 433b6b8..62ee924 100644
@@ -539,12 +539,12 @@ static void sil24_config_port(struct ata_port *ap)
 		writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR);
 
 	/* zero error counters. */
-	writel(0x8000, port + PORT_DECODE_ERR_THRESH);
-	writel(0x8000, port + PORT_CRC_ERR_THRESH);
-	writel(0x8000, port + PORT_HSHK_ERR_THRESH);
-	writel(0x0000, port + PORT_DECODE_ERR_CNT);
-	writel(0x0000, port + PORT_CRC_ERR_CNT);
-	writel(0x0000, port + PORT_HSHK_ERR_CNT);
+	writew(0x8000, port + PORT_DECODE_ERR_THRESH);
+	writew(0x8000, port + PORT_CRC_ERR_THRESH);
+	writew(0x8000, port + PORT_HSHK_ERR_THRESH);
+	writew(0x0000, port + PORT_DECODE_ERR_CNT);
+	writew(0x0000, port + PORT_CRC_ERR_CNT);
+	writew(0x0000, port + PORT_HSHK_ERR_CNT);
 
 	/* always use 64bit activation */
 	writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR);
Applied
#1 lore raw
Quoted 6 lines · Tejun Heo

From: Colin Tuckley<[email protected]>

The sata_sil24 driver has six 16-bit registers that are initialised with 32-bit writes. This cause a kernel panic on ARM due to the unaligned accesses which result.

Quoted 7 lines

This patch changes the accesses to the correct 16-bit ones.

---
  drivers/ata/sata_sil24.c |   12 ++++++------
  1 file changed, 6 insertions(+), 6 deletions(-)

applied