SPEAr3xx: Unify build of SPEAr3xx platforms

Several structures in arch/arm/mach-spear3xx are not marked static like they should be. Fix this.

Signed-off-by Ryan Mallon <[email protected]>

---
 arch/arm/mach-spear3xx/spear300.c |   33 ++++++++++----------
 arch/arm/mach-spear3xx/spear310.c |   16 +++++-----
 arch/arm/mach-spear3xx/spear320.c |   56 +++++++++++++++++-----------------
 arch/arm/mach-spear3xx/spear3xx.c |   60 ++++++++++++++++++------------------
 4 files changed, 83 insertions(+), 82 deletions(-)

arch/arm/mach-spear3xx/spear300.c +17 -16

index 3560f8c..b71f996 100644
@@ -119,7 +119,7 @@ struct pmx_mode caml_lcd_mode = {
 };
 
 /* devices */
-struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
+static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
 	{
 		.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
 			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,

@@ -134,7 +134,7 @@ struct pmx_dev pmx_fsmc_2_chips = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
+static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
 	{
 		.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
 			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,

@@ -149,7 +149,7 @@ struct pmx_dev pmx_fsmc_4_chips = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_keyboard_modes[] = {
+static struct pmx_dev_mode pmx_keyboard_modes[] = {
 	{
 		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
 			LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |

@@ -166,7 +166,7 @@ struct pmx_dev pmx_keyboard = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_clcd_modes[] = {
+static struct pmx_dev_mode pmx_clcd_modes[] = {
 	{
 		.ids = PHOTO_FRAME_MODE,
 		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,

@@ -184,7 +184,7 @@ struct pmx_dev pmx_clcd = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
+static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
 	{
 		.ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
 		.mask = PMX_MII_MASK,

@@ -211,7 +211,7 @@ struct pmx_dev pmx_telecom_gpio = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
+static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
 	{
 		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
 			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE

@@ -229,7 +229,7 @@ struct pmx_dev pmx_telecom_tdm = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
+static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
 	{
 		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
 			LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE

@@ -246,7 +246,7 @@ struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_camera_modes[] = {
+static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
 	{
 		.ids = CAML_LCDW_MODE | CAML_LCD_MODE,
 		.mask = PMX_MII_MASK,

@@ -263,7 +263,7 @@ struct pmx_dev pmx_telecom_camera = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_dac_modes[] = {
+static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
 	{
 		.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
 			| CAMU_WLCD_MODE | CAML_LCD_MODE,

@@ -278,7 +278,7 @@ struct pmx_dev pmx_telecom_dac = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
+static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
 	{
 		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
 			| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |

@@ -295,7 +295,7 @@ struct pmx_dev pmx_telecom_i2s = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
+static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
 	{
 		.ids = NAND_MODE | NOR_MODE,
 		.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |

@@ -310,7 +310,7 @@ struct pmx_dev pmx_telecom_boot_pins = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = {
+static struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = {
 	{
 		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
 			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |

@@ -330,7 +330,7 @@ struct pmx_dev pmx_telecom_sdio_4bit = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = {
+static struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = {
 	{
 		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
 			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |

@@ -349,7 +349,7 @@ struct pmx_dev pmx_telecom_sdio_8bit = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_gpio1_modes[] = {
+static struct pmx_dev_mode pmx_gpio1_modes[] = {
 	{
 		.ids = PHOTO_FRAME_MODE,
 		.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |

@@ -391,7 +391,7 @@ struct amba_device gpio1_device = {
 };
 
 /* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
 	{
 		.virq = VIRQ_IT_PERS_S,
 		.enb_mask = IT_PERS_S_IRQ_MASK,

@@ -431,7 +431,8 @@ struct shirq_dev_config shirq_ras1_config[] = {
 	},
 };
 
-struct spear_shirq shirq_ras1 = {
+
+static struct spear_shirq shirq_ras1 = {
 	.irq = IRQ_GEN_RAS_1,
 	.dev_config = shirq_ras1_config,
 	.dev_count = ARRAY_SIZE(shirq_ras1_config),

arch/arm/mach-spear3xx/spear310.c +8 -8

index 96a1ab8..14698b8 100644
@@ -142,7 +142,7 @@ struct pmx_driver pmx_driver = {
 /* Add spear310 specific devices here */
 
 /* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
 	{
 		.virq = VIRQ_SMII0,
 		.status_mask = SMII0_IRQ_MASK,

@@ -170,7 +170,7 @@ struct shirq_dev_config shirq_ras1_config[] = {
 	},
 };
 
-struct spear_shirq shirq_ras1 = {
+static struct spear_shirq shirq_ras1 = {
 	.irq = IRQ_GEN_RAS_1,
 	.dev_config = shirq_ras1_config,
 	.dev_count = ARRAY_SIZE(shirq_ras1_config),

@@ -182,7 +182,7 @@ struct spear_shirq shirq_ras1 = {
 	},
 };
 
-struct shirq_dev_config shirq_ras2_config[] = {
+static struct shirq_dev_config shirq_ras2_config[] = {
 	{
 		.virq = VIRQ_UART1,
 		.status_mask = UART1_IRQ_MASK,

@@ -201,7 +201,7 @@ struct shirq_dev_config shirq_ras2_config[] = {
 	},
 };
 
-struct spear_shirq shirq_ras2 = {
+static struct spear_shirq shirq_ras2 = {
 	.irq = IRQ_GEN_RAS_2,
 	.dev_config = shirq_ras2_config,
 	.dev_count = ARRAY_SIZE(shirq_ras2_config),

@@ -213,14 +213,14 @@ struct spear_shirq shirq_ras2 = {
 	},
 };
 
-struct shirq_dev_config shirq_ras3_config[] = {
+static struct shirq_dev_config shirq_ras3_config[] = {
 	{
 		.virq = VIRQ_EMI,
 		.status_mask = EMI_IRQ_MASK,
 	},
 };
 
-struct spear_shirq shirq_ras3 = {
+static struct spear_shirq shirq_ras3 = {
 	.irq = IRQ_GEN_RAS_3,
 	.dev_config = shirq_ras3_config,
 	.dev_count = ARRAY_SIZE(shirq_ras3_config),

@@ -232,7 +232,7 @@ struct spear_shirq shirq_ras3 = {
 	},
 };
 
-struct shirq_dev_config shirq_intrcomm_ras_config[] = {
+static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
 	{
 		.virq = VIRQ_TDM_HDLC,
 		.status_mask = TDM_HDLC_IRQ_MASK,

@@ -245,7 +245,7 @@ struct shirq_dev_config shirq_intrcomm_ras_config[] = {
 	},
 };
 
-struct spear_shirq shirq_intrcomm_ras = {
+static struct spear_shirq shirq_intrcomm_ras = {
 	.irq = IRQ_INTRCOMM_RAS_ARM,
 	.dev_config = shirq_intrcomm_ras_config,
 	.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),

arch/arm/mach-spear3xx/spear320.c +28 -28

index 6a12195..958e52d 100644
@@ -54,7 +54,7 @@ struct pmx_mode small_printers_mode = {
 };
 
 /* devices */
-struct pmx_dev_mode pmx_clcd_modes[] = {
+static struct pmx_dev_mode pmx_clcd_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE,
 		.mask = 0x0,

@@ -68,7 +68,7 @@ struct pmx_dev pmx_clcd = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_emi_modes[] = {
+static struct pmx_dev_mode pmx_emi_modes[] = {
 	{
 		.ids = AUTO_EXP_MODE,
 		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,

@@ -82,7 +82,7 @@ struct pmx_dev pmx_emi = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_fsmc_modes[] = {
+static struct pmx_dev_mode pmx_fsmc_modes[] = {
 	{
 		.ids = ALL_MODES,
 		.mask = 0x0,

@@ -96,7 +96,7 @@ struct pmx_dev pmx_fsmc = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_spp_modes[] = {
+static struct pmx_dev_mode pmx_spp_modes[] = {
 	{
 		.ids = SMALL_PRINTERS_MODE,
 		.mask = 0x0,

@@ -110,7 +110,7 @@ struct pmx_dev pmx_spp = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_sdio_modes[] = {
+static struct pmx_dev_mode pmx_sdio_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |
 			SMALL_PRINTERS_MODE,

@@ -125,7 +125,7 @@ struct pmx_dev pmx_sdio = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_i2s_modes[] = {
+static struct pmx_dev_mode pmx_i2s_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
 		.mask = PMX_UART0_MODEM_MASK,

@@ -139,7 +139,7 @@ struct pmx_dev pmx_i2s = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart1_modes[] = {
+static struct pmx_dev_mode pmx_uart1_modes[] = {
 	{
 		.ids = ALL_MODES,
 		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,

@@ -153,7 +153,7 @@ struct pmx_dev pmx_uart1 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart1_modem_modes[] = {
+static struct pmx_dev_mode pmx_uart1_modem_modes[] = {
 	{
 		.ids = AUTO_EXP_MODE,
 		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK |

@@ -172,7 +172,7 @@ struct pmx_dev pmx_uart1_modem = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart2_modes[] = {
+static struct pmx_dev_mode pmx_uart2_modes[] = {
 	{
 		.ids = ALL_MODES,
 		.mask = PMX_FIRDA_MASK,

@@ -186,7 +186,7 @@ struct pmx_dev pmx_uart2 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_touchscreen_modes[] = {
+static struct pmx_dev_mode pmx_touchscreen_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE,
 		.mask = PMX_SSP_CS_MASK,

@@ -200,7 +200,7 @@ struct pmx_dev pmx_touchscreen = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_can_modes[] = {
+static struct pmx_dev_mode pmx_can_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,
 		.mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |

@@ -215,7 +215,7 @@ struct pmx_dev pmx_can = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_sdio_led_modes[] = {
+static struct pmx_dev_mode pmx_sdio_led_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
 		.mask = PMX_SSP_CS_MASK,

@@ -229,7 +229,7 @@ struct pmx_dev pmx_sdio_led = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm0_modes[] = {
+static struct pmx_dev_mode pmx_pwm0_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
 		.mask = PMX_UART0_MODEM_MASK,

@@ -246,7 +246,7 @@ struct pmx_dev pmx_pwm0 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm1_modes[] = {
+static struct pmx_dev_mode pmx_pwm1_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
 		.mask = PMX_UART0_MODEM_MASK,

@@ -263,7 +263,7 @@ struct pmx_dev pmx_pwm1 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm2_modes[] = {
+static struct pmx_dev_mode pmx_pwm2_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
 		.mask = PMX_SSP_CS_MASK,

@@ -280,7 +280,7 @@ struct pmx_dev pmx_pwm2 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm3_modes[] = {
+static struct pmx_dev_mode pmx_pwm3_modes[] = {
 	{
 		.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
 		.mask = PMX_MII_MASK,

@@ -294,7 +294,7 @@ struct pmx_dev pmx_pwm3 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_ssp1_modes[] = {
+static struct pmx_dev_mode pmx_ssp1_modes[] = {
 	{
 		.ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
 		.mask = PMX_MII_MASK,

@@ -308,7 +308,7 @@ struct pmx_dev pmx_ssp1 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_ssp2_modes[] = {
+static struct pmx_dev_mode pmx_ssp2_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE,
 		.mask = PMX_MII_MASK,

@@ -322,7 +322,7 @@ struct pmx_dev pmx_ssp2 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_mii1_modes[] = {
+static struct pmx_dev_mode pmx_mii1_modes[] = {
 	{
 		.ids = AUTO_NET_MII_MODE,
 		.mask = 0x0,

@@ -336,7 +336,7 @@ struct pmx_dev pmx_mii1 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_smii0_modes[] = {
+static struct pmx_dev_mode pmx_smii0_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
 		.mask = PMX_MII_MASK,

@@ -350,7 +350,7 @@ struct pmx_dev pmx_smii0 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_smii1_modes[] = {
+static struct pmx_dev_mode pmx_smii1_modes[] = {
 	{
 		.ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,
 		.mask = PMX_MII_MASK,

@@ -364,7 +364,7 @@ struct pmx_dev pmx_smii1 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_i2c1_modes[] = {
+static struct pmx_dev_mode pmx_i2c1_modes[] = {
 	{
 		.ids = AUTO_EXP_MODE,
 		.mask = 0x0,

@@ -387,7 +387,7 @@ struct pmx_driver pmx_driver = {
 /* Add spear320 specific devices here */
 
 /* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
 	{
 		.virq = VIRQ_EMI,
 		.status_mask = EMI_IRQ_MASK,

@@ -403,7 +403,7 @@ struct shirq_dev_config shirq_ras1_config[] = {
 	},
 };
 
-struct spear_shirq shirq_ras1 = {
+static struct spear_shirq shirq_ras1 = {
 	.irq = IRQ_GEN_RAS_1,
 	.dev_config = shirq_ras1_config,
 	.dev_count = ARRAY_SIZE(shirq_ras1_config),

@@ -416,7 +416,7 @@ struct spear_shirq shirq_ras1 = {
 	},
 };
 
-struct shirq_dev_config shirq_ras3_config[] = {
+static struct shirq_dev_config shirq_ras3_config[] = {
 	{
 		.virq = VIRQ_PLGPIO,
 		.enb_mask = GPIO_IRQ_MASK,

@@ -435,7 +435,7 @@ struct shirq_dev_config shirq_ras3_config[] = {
 	},
 };
 
-struct spear_shirq shirq_ras3 = {
+static struct spear_shirq shirq_ras3 = {
 	.irq = IRQ_GEN_RAS_3,
 	.dev_config = shirq_ras3_config,
 	.dev_count = ARRAY_SIZE(shirq_ras3_config),

@@ -449,7 +449,7 @@ struct spear_shirq shirq_ras3 = {
 	},
 };
 
-struct shirq_dev_config shirq_intrcomm_ras_config[] = {
+static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
 	{
 		.virq = VIRQ_CANU,
 		.status_mask = CAN_U_IRQ_MASK,

@@ -497,7 +497,7 @@ struct shirq_dev_config shirq_intrcomm_ras_config[] = {
 	},
 };
 
-struct spear_shirq shirq_intrcomm_ras = {
+static struct spear_shirq shirq_intrcomm_ras = {
 	.irq = IRQ_INTRCOMM_RAS_ARM,
 	.dev_config = shirq_intrcomm_ras_config,
 	.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),

arch/arm/mach-spear3xx/spear3xx.c +29 -29

index e87313a..5f2cddc 100644
@@ -102,7 +102,7 @@ void __init spear3xx_map_io(void)
 
 /* pad multiplexing support */
 /* devices */
-struct pmx_dev_mode pmx_firda_modes[] = {
+static struct pmx_dev_mode pmx_firda_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_FIRDA_MASK,

@@ -116,7 +116,7 @@ struct pmx_dev pmx_firda = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_i2c_modes[] = {
+static struct pmx_dev_mode pmx_i2c_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_I2C_MASK,

@@ -130,7 +130,7 @@ struct pmx_dev pmx_i2c = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_ssp_cs_modes[] = {
+static struct pmx_dev_mode pmx_ssp_cs_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_SSP_CS_MASK,

@@ -144,7 +144,7 @@ struct pmx_dev pmx_ssp_cs = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_ssp_modes[] = {
+static struct pmx_dev_mode pmx_ssp_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_SSP_MASK,

@@ -158,7 +158,7 @@ struct pmx_dev pmx_ssp = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_mii_modes[] = {
+static struct pmx_dev_mode pmx_mii_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_MII_MASK,

@@ -172,7 +172,7 @@ struct pmx_dev pmx_mii = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_GPIO_PIN0_MASK,

@@ -186,7 +186,7 @@ struct pmx_dev pmx_gpio_pin0 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_GPIO_PIN1_MASK,

@@ -200,7 +200,7 @@ struct pmx_dev pmx_gpio_pin1 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_GPIO_PIN2_MASK,

@@ -214,7 +214,7 @@ struct pmx_dev pmx_gpio_pin2 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_GPIO_PIN3_MASK,

@@ -228,7 +228,7 @@ struct pmx_dev pmx_gpio_pin3 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_GPIO_PIN4_MASK,

@@ -242,7 +242,7 @@ struct pmx_dev pmx_gpio_pin4 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_GPIO_PIN5_MASK,

@@ -256,7 +256,7 @@ struct pmx_dev pmx_gpio_pin5 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_uart0_modem_modes[] = {
+static struct pmx_dev_mode pmx_uart0_modem_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_UART0_MODEM_MASK,

@@ -270,7 +270,7 @@ struct pmx_dev pmx_uart0_modem = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_uart0_modes[] = {
+static struct pmx_dev_mode pmx_uart0_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_UART0_MASK,

@@ -284,7 +284,7 @@ struct pmx_dev pmx_uart0 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_timer_3_4_modes[] = {
+static struct pmx_dev_mode pmx_timer_3_4_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_TIMER_3_4_MASK,

@@ -298,7 +298,7 @@ struct pmx_dev pmx_timer_3_4 = {
 	.enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_timer_1_2_modes[] = {
+static struct pmx_dev_mode pmx_timer_1_2_modes[] = {
 	{
 		.ids = 0xffffffff,
 		.mask = PMX_TIMER_1_2_MASK,

@@ -314,7 +314,7 @@ struct pmx_dev pmx_timer_1_2 = {
 
 #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
 /* plgpios devices */
-struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_FIRDA_MASK,

@@ -328,7 +328,7 @@ struct pmx_dev pmx_plgpio_0_1 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_UART0_MASK,

@@ -342,7 +342,7 @@ struct pmx_dev pmx_plgpio_2_3 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_I2C_MASK,

@@ -356,7 +356,7 @@ struct pmx_dev pmx_plgpio_4_5 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_SSP_MASK,

@@ -370,7 +370,7 @@ struct pmx_dev pmx_plgpio_6_9 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_MII_MASK,

@@ -384,7 +384,7 @@ struct pmx_dev pmx_plgpio_10_27 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_28_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_28_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_GPIO_PIN0_MASK,

@@ -398,7 +398,7 @@ struct pmx_dev pmx_plgpio_28 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_29_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_29_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_GPIO_PIN1_MASK,

@@ -412,7 +412,7 @@ struct pmx_dev pmx_plgpio_29 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_30_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_30_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_GPIO_PIN2_MASK,

@@ -426,7 +426,7 @@ struct pmx_dev pmx_plgpio_30 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_31_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_31_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_GPIO_PIN3_MASK,

@@ -440,7 +440,7 @@ struct pmx_dev pmx_plgpio_31 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_32_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_32_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_GPIO_PIN4_MASK,

@@ -454,7 +454,7 @@ struct pmx_dev pmx_plgpio_32 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_33_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_33_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_GPIO_PIN5_MASK,

@@ -468,7 +468,7 @@ struct pmx_dev pmx_plgpio_33 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_SSP_CS_MASK,

@@ -482,7 +482,7 @@ struct pmx_dev pmx_plgpio_34_36 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_UART0_MODEM_MASK,

@@ -496,7 +496,7 @@ struct pmx_dev pmx_plgpio_37_42 = {
 	.enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_TIMER_1_2_MASK,

Quoted 11 lines · Ryan Mallon

Several structures in arch/arm/mach-spear3xx are not marked static like they should be. Fix this.

Signed-off-by Ryan Mallon <[email protected]>

---
 arch/arm/mach-spear3xx/spear300.c |   33 ++++++++++----------
 arch/arm/mach-spear3xx/spear310.c |   16 +++++-----
 arch/arm/mach-spear3xx/spear320.c |   56 +++++++++++++++++-----------------
 arch/arm/mach-spear3xx/spear3xx.c |   60 ++++++++++++++++++------------------
 4 files changed, 83 insertions(+), 82 deletions(-)

arch/arm/mach-spear3xx/spear3xx.c struct pmx_dev pmx_plgpio_43_44_47_48 = { · line 516

Quoted 5 lines

arch/arm/mach-spear3xx/spear3xx.c +1 -1

-struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_TIMER_3_4_MASK,

These structures are not local, they are used in spear3**_evb.c files, and hence can't be static.

Quoted 6 lines

Quoted 6 lines

-struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {

Quoted 4 lines

Quoted 4 lines

arch/arm/mach-spear3xx/spear3xx.c +1 -0

+static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
 	{
 		.ids = 0x00,
 		.mask = PMX_TIMER_3_4_MASK,

Quoted 2 lines

Quoted 2 lines

These structures are not local, they are used in spear3**_evb.c files, and hence can't be static.

The pmx_dev structures are used by the spear3**_evb.c files, but the pmx_dev_mode structures are local. This patch is only making the latter static. I have done a build test which includes all three spear3**_evb board files and got no compilation warnings/errors.

Prefix register and irq defintions to remove naming conflicts between the three SPEAr3xx platforms.

Signed-off-by Ryan Mallon <[email protected]>

---
 arch/arm/mach-spear3xx/include/mach/generic.h  |    4 +-
 arch/arm/mach-spear3xx/include/mach/irqs.h     |  195 ++++++++++++------------
 arch/arm/mach-spear3xx/include/mach/spear300.h |   26 ++--
 arch/arm/mach-spear3xx/include/mach/spear310.h |   44 +++---
 arch/arm/mach-spear3xx/include/mach/spear320.h |   50 +++---
 arch/arm/mach-spear3xx/spear300.c              |   65 ++++----
 arch/arm/mach-spear3xx/spear310.c              |   92 ++++++------
 arch/arm/mach-spear3xx/spear320.c              |  134 ++++++++--------
 arch/arm/mach-spear3xx/spear3xx.c              |    4 +-
 9 files changed, 308 insertions(+), 306 deletions(-)

arch/arm/mach-spear3xx/include/mach/generic.h +2 -2

index af7e02c..48dfb9c 100644
@@ -27,8 +27,8 @@
  * Following GPT channels will be used as clock source and clockevent
  */
 #define SPEAR_GPT0_BASE		SPEAR3XX_ML1_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ	IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ	IRQ_CPU_GPT1_2
+#define SPEAR_GPT0_CHAN0_IRQ	SPEAR3XX_IRQ_CPU_GPT1_1
+#define SPEAR_GPT0_CHAN1_IRQ	SPEAR3XX_IRQ_CPU_GPT1_2
 
 /* Add spear3xx family device structure declarations here */
 extern struct amba_device gpio_device;

arch/arm/mach-spear3xx/include/mach/irqs.h +25 -36

index 7f940b8..668bf72 100644
@@ -15,138 +15,141 @@
 #define __MACH_IRQS_H
 
 /* SPEAr3xx IRQ definitions */
-#define IRQ_HW_ACCEL_MOD_0			0
-#define IRQ_INTRCOMM_RAS_ARM			1
-#define IRQ_CPU_GPT1_1				2
-#define IRQ_CPU_GPT1_2				3
-#define IRQ_BASIC_GPT1_1			4
-#define IRQ_BASIC_GPT1_2			5
-#define IRQ_BASIC_GPT2_1			6
-#define IRQ_BASIC_GPT2_2			7
-#define IRQ_BASIC_DMA				8
-#define IRQ_BASIC_SMI				9
-#define IRQ_BASIC_RTC				10
-#define IRQ_BASIC_GPIO				11
-#define IRQ_BASIC_WDT				12
-#define IRQ_DDR_CONTROLLER			13
-#define IRQ_SYS_ERROR				14
-#define IRQ_WAKEUP_RCV				15
-#define IRQ_JPEG				16
-#define IRQ_IRDA				17
-#define IRQ_ADC					18
-#define IRQ_UART				19
-#define IRQ_SSP					20
-#define IRQ_I2C					21
-#define IRQ_MAC_1				22
-#define IRQ_MAC_2				23
-#define IRQ_USB_DEV				24
-#define IRQ_USB_H_OHCI_0			25
-#define IRQ_USB_H_EHCI_0			26
-#define IRQ_USB_H_EHCI_1			IRQ_USB_H_EHCI_0
-#define IRQ_USB_H_OHCI_1			27
-#define IRQ_GEN_RAS_1				28
-#define IRQ_GEN_RAS_2				29
-#define IRQ_GEN_RAS_3				30
-#define IRQ_HW_ACCEL_MOD_1			31
-#define IRQ_VIC_END				32
-
-#define VIRQ_START				IRQ_VIC_END
+#define SPEAR3XX_IRQ_HW_ACCEL_MOD_0		0
+#define SPEAR3XX_IRQ_INTRCOMM_RAS_ARM		1
+#define SPEAR3XX_IRQ_CPU_GPT1_1			2
+#define SPEAR3XX_IRQ_CPU_GPT1_2			3
+#define SPEAR3XX_IRQ_BASIC_GPT1_1		4
+#define SPEAR3XX_IRQ_BASIC_GPT1_2		5
+#define SPEAR3XX_IRQ_BASIC_GPT2_1		6
+#define SPEAR3XX_IRQ_BASIC_GPT2_2		7
+#define SPEAR3XX_IRQ_BASIC_DMA			8
+#define SPEAR3XX_IRQ_BASIC_SMI			9
+#define SPEAR3XX_IRQ_BASIC_RTC			10
+#define SPEAR3XX_IRQ_BASIC_GPIO			11
+#define SPEAR3XX_IRQ_BASIC_WDT			12
+#define SPEAR3XX_IRQ_DDR_CONTROLLER		13
+#define SPEAR3XX_IRQ_SYS_ERROR			14
+#define SPEAR3XX_IRQ_WAKEUP_RCV			15
+#define SPEAR3XX_IRQ_JPEG			16
+#define SPEAR3XX_IRQ_IRDA			17
+#define SPEAR3XX_IRQ_ADC			18
+#define SPEAR3XX_IRQ_UART			19
+#define SPEAR3XX_IRQ_SSP			20
+#define SPEAR3XX_IRQ_I2C			21
+#define SPEAR3XX_IRQ_MAC_1			22
+#define SPEAR3XX_IRQ_MAC_2			23
+#define SPEAR3XX_IRQ_USB_DEV			24

Quoted 29 lines · Ryan Mallon

Prefix register and irq defintions to remove naming conflicts between the three SPEAr3xx platforms.

Signed-off-by Ryan Mallon <[email protected]>

---
 arch/arm/mach-spear3xx/include/mach/generic.h  |    4 +-
 arch/arm/mach-spear3xx/include/mach/irqs.h     |  195 ++++++++++++------------
 arch/arm/mach-spear3xx/include/mach/spear300.h |   26 ++--
 arch/arm/mach-spear3xx/include/mach/spear310.h |   44 +++---
 arch/arm/mach-spear3xx/include/mach/spear320.h |   50 +++---
 arch/arm/mach-spear3xx/spear300.c              |   65 ++++----
 arch/arm/mach-spear3xx/spear310.c              |   92 ++++++------
 arch/arm/mach-spear3xx/spear320.c              |  134 ++++++++--------
 arch/arm/mach-spear3xx/spear3xx.c              |    4 +-
 9 files changed, 308 insertions(+), 306 deletions(-)

arch/arm/mach-spear3xx/include/mach/generic.h +2 -2

index af7e02c..48dfb9c 100644
@@ -27,8 +27,8 @@
  * Following GPT channels will be used as clock source and clockevent
  */
 #define SPEAR_GPT0_BASE		SPEAR3XX_ML1_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ	IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ	IRQ_CPU_GPT1_2
+#define SPEAR_GPT0_CHAN0_IRQ	SPEAR3XX_IRQ_CPU_GPT1_1
+#define SPEAR_GPT0_CHAN1_IRQ	SPEAR3XX_IRQ_CPU_GPT1_2
 

We have kept it, the way it was intentionally. I don't understand why any conflicts will occur.

The goal of the patch series is to allow all a single kernel to have support for all of the spear platforms, ie CONFIG_MACH_SPEAR300, CONFIG_MACH_SPEAR310 and CONFIG_MACH_SPEAR320 can all be set.

The current code has duplicate defines in arch/arm/mach-spear3xx/include/mach/spear3[012]0.h which means that these three files cannot be included at once (they are included from arch/arm/mach-spear3xx/include/mach/spear.h).

Quoted 8 lines · Ryan Mallon

The goal of the patch series is to allow all a single kernel to have support for all of the spear platforms, ie CONFIG_MACH_SPEAR300, CONFIG_MACH_SPEAR310 and CONFIG_MACH_SPEAR320 can all be set.

The current code has duplicate defines in arch/arm/mach-spear3xx/include/mach/spear3[012]0.h which means that these three files cannot be included at once (they are included from arch/arm/mach-spear3xx/include/mach/spear.h).

I understood what you did, but i am not sure how will it actually work. I tried to look into kernel source but couldn't find much.

Suppose all three machines/boards are selected and we got one kernel. Then how should we tell the kernel which machines init routine to be called. I suppose through uboot only, but not sure how it internally works.

Can you please help me understand that?

Prefix register and irq defintions to remove naming conflicts between the three SPEAr3xx platforms.

Signed-off-by Ryan Mallon <[email protected]>

---
 arch/arm/mach-spear3xx/include/mach/generic.h  |    4 +-
 arch/arm/mach-spear3xx/include/mach/irqs.h     |  195 ++++++++++++------------
 arch/arm/mach-spear3xx/include/mach/spear300.h |   26 ++--
 arch/arm/mach-spear3xx/include/mach/spear310.h |   44 +++---
 arch/arm/mach-spear3xx/include/mach/spear320.h |   50 +++---
 arch/arm/mach-spear3xx/spear300.c              |   65 ++++----
 arch/arm/mach-spear3xx/spear310.c              |   92 ++++++------
 arch/arm/mach-spear3xx/spear320.c              |  134 ++++++++--------
 arch/arm/mach-spear3xx/spear3xx.c              |    4 +-
 9 files changed, 308 insertions(+), 306 deletions(-)

arch/arm/mach-spear3xx/include/mach/generic.h +2 -2

index af7e02c..48dfb9c 100644
@@ -27,8 +27,8 @@
  * Following GPT channels will be used as clock source and clockevent
  */
 #define SPEAR_GPT0_BASE		SPEAR3XX_ML1_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ	IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ	IRQ_CPU_GPT1_2
+#define SPEAR_GPT0_CHAN0_IRQ	SPEAR3XX_IRQ_CPU_GPT1_1
+#define SPEAR_GPT0_CHAN1_IRQ	SPEAR3XX_IRQ_CPU_GPT1_2
 
 /* Add spear3xx family device structure declarations here */
 extern struct amba_device gpio_device;

arch/arm/mach-spear3xx/include/mach/irqs.h +0 -0

index 7f940b8..668bf72 100644
@@ -15,138 +15,141 @@
 #define __MACH_IRQS_H
 

Ryan,

Sorry for testing this set of patches so late. Patch is working fine. I have few comments:

arch/arm/mach-spear3xx/include/mach/irqs.h line 75

Quoted 3 lines

arch/arm/mach-spear3xx/include/mach/irqs.h +1 -1

-#define SPEAR_GPIO_INT_END			(SPEAR_GPIO1_INT_BASE + 8)
+//#define SPEAR_GPIO_INT_END			(SPEAR_GPIO1_INT_BASE + 8)

wrong comment sytle. Also we can move above definition with rest of GPIO virtual irq no.s.

Quoted 1 line

[snip...]

Quoted 1 line

arch/arm/mach-spear3xx/include/mach/irqs.h line 142

Quoted 12 lines

arch/arm/mach-spear3xx/include/mach/irqs.h +11 -0

+/*
+ * GPIO pins virtual irqs
+ * Use the lowest number for the GPIO virtual IRQs base on which subarchs
+ * we have compiled in
+ */
+#if defined(CONFIG_MACH_SPEAR310)
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 18)
+#elif defined(CONFIG_MACH_SPEAR320)
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 17)
+#else
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 9)
 #endif

If we have all three machines enabled, then SPEAR_GPIO_INT_BASE will start from VIRQ_START + 18, which will work for spear310 and spear320, but will not be correct as we will skip 9 irq no.s.

It would be better to have three different base addresses SPEAR300_GPIO_INT_BASE, etc.

Quoted 17 lines

Quoted 17 lines

Quoted 13 lines

arch/arm/mach-spear3xx/include/mach/irqs.h line 142

Quoted 13 lines

arch/arm/mach-spear3xx/include/mach/irqs.h +11 -0

+/*
+ * GPIO pins virtual irqs
+ * Use the lowest number for the GPIO virtual IRQs base on which subarchs
+ * we have compiled in
+ */
+#if defined(CONFIG_MACH_SPEAR310)
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 18)
+#elif defined(CONFIG_MACH_SPEAR320)
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 17)
+#else
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 9)
 #endif

If we have all three machines enabled, then SPEAR_GPIO_INT_BASE will start from VIRQ_START + 18, which will work for spear310 and spear320, but will not be correct as we will skip 9 irq no.s.

Do the virtual irqs map directly to the hardware in some way? I thought that since they were virtual there offset would be somewhat arbitrary?

Quoted 3 lines

Quoted 3 lines

It would be better to have three different base addresses SPEAR300_GPIO_INT_BASE, etc.

This is possible. We can either do this by making SPEAR3XX_GPIO_INT_BASE a variable, or by having some ifdef/machine_is code in the board initialisation.

Quoted 17 lines · Ryan Mallon

Quoted 17 lines

Quoted 17 lines

Quoted 13 lines

arch/arm/mach-spear3xx/include/mach/irqs.h line 142

Quoted 13 lines

arch/arm/mach-spear3xx/include/mach/irqs.h +11 -0

+/*
+ * GPIO pins virtual irqs
+ * Use the lowest number for the GPIO virtual IRQs base on which subarchs
+ * we have compiled in
+ */
+#if defined(CONFIG_MACH_SPEAR310)
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 18)
+#elif defined(CONFIG_MACH_SPEAR320)
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 17)
+#else
+#define SPEAR_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 9)
 #endif

If we have all three machines enabled, then SPEAR_GPIO_INT_BASE will start from VIRQ_START + 18, which will work for spear310 and spear320, but will not be correct as we will skip 9 irq no.s.

Quoted 2 lines

Do the virtual irqs map directly to the hardware in some way? I thought that since they were virtual there offset would be somewhat arbitrary?

No. Virtual irqs are not fixed with hardware. What i wanted to say is NR_IRQS will have a higher value, which will make irq_desc[NR_IRQS] array have more size.

Quoted 6 lines

Quoted 3 lines

Quoted 3 lines

It would be better to have three different base addresses SPEAR300_GPIO_INT_BASE, etc.

This is possible. We can either do this by making SPEAR3XX_GPIO_INT_BASE a variable, or by having some ifdef/machine_is code in the board initialisation.

Not sure! We need to have single value of NR_IRQS for all spear3xx variants. This will always waste some memory. I don't know if any other solution can be there.

So SPEAR_GPIO_INT_BASE can be kept common with a single value without these #ifdefs, i.e. we can have
#define SPEAR_GPIO_INT_BASE (SPEAR3XX_VIRQ_START + 18)

and now we can have different macros per machine, i.e. 300,310,320.

viresh.

Right, but the ifdef code about will make sure that if you only compile in a single Spear implementation then the VIRQ start will be optimal. If you compile multiple Spear implementations in then you get the benefit of a single kernel which boots on multiple boards, at the cost of some minimal memory wastage in some cases.

Prefix the pmx_devs to remove naming conflicts between the three SPEAr3xx platforms. Also make pmx_driver static to each platform and rework the init code to pass the devices rather than export the pmx_driver structure.

Signed-off-by Ryan Mallon <[email protected]>

---
 arch/arm/mach-spear3xx/include/mach/generic.h |  135 ++++++++++++-------------
 arch/arm/mach-spear3xx/spear300.c             |   39 ++++----
 arch/arm/mach-spear3xx/spear300_evb.c         |   26 ++---
 arch/arm/mach-spear3xx/spear310.c             |   29 +++---
 arch/arm/mach-spear3xx/spear310_evb.c         |   42 ++++-----
 arch/arm/mach-spear3xx/spear320.c             |   57 ++++++-----
 arch/arm/mach-spear3xx/spear320_evb.c         |   36 +++----
 arch/arm/mach-spear3xx/spear3xx.c             |   60 ++++++------
 8 files changed, 202 insertions(+), 222 deletions(-)

arch/arm/mach-spear3xx/include/mach/generic.h +6 -15

index 48dfb9c..408d39f 100644
@@ -60,21 +60,21 @@ void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size);
 #define PMX_TIMER_1_2_MASK	(1 << 0)
 
 /* pad mux devices */
-extern struct pmx_dev pmx_firda;
-extern struct pmx_dev pmx_i2c;
-extern struct pmx_dev pmx_ssp_cs;
-extern struct pmx_dev pmx_ssp;
-extern struct pmx_dev pmx_mii;
-extern struct pmx_dev pmx_gpio_pin0;
-extern struct pmx_dev pmx_gpio_pin1;
-extern struct pmx_dev pmx_gpio_pin2;
-extern struct pmx_dev pmx_gpio_pin3;
-extern struct pmx_dev pmx_gpio_pin4;
-extern struct pmx_dev pmx_gpio_pin5;
-extern struct pmx_dev pmx_uart0_modem;
-extern struct pmx_dev pmx_uart0;
-extern struct pmx_dev pmx_timer_3_4;
-extern struct pmx_dev pmx_timer_1_2;
+extern struct pmx_dev spear3xx_pmx_firda;
+extern struct pmx_dev spear3xx_pmx_i2c;
+extern struct pmx_dev spear3xx_pmx_ssp_cs;
+extern struct pmx_dev spear3xx_pmx_ssp;
+extern struct pmx_dev spear3xx_pmx_mii;
+extern struct pmx_dev spear3xx_pmx_gpio_pin0;

arch/arm/mach-spear3xx/include/mach/generic.h +1 -1

 /* pmx driver structure */
-struct pmx_driver pmx_driver = {
+static struct pmx_driver pmx_driver = {

arch/arm/mach-spear3xx/include/mach/generic.h +2 -2

 	.mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007},
 	.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
 };

@@ -511,7 +511,8 @@ static struct spear_shirq shirq_intrcomm_ras = {
 };
 
 /* spear320 routines */
-void __init spear320_init(void)
+void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+			  u8 pmx_dev_count)
 {
 	void __iomem *base;
 	int ret = 0;

@@ -540,10 +541,10 @@ void __init spear320_init(void)
 		if (ret)
 			printk(KERN_ERR "Error registering Shared IRQ 4\n");
 	}
-}

arch/arm/mach-spear3xx/spear320_evb.c +0 -0

index 62ac685..4969fa9 100644
@@ -19,22 +19,22 @@
 
 static struct amba_device *amba_devs[] __initdata = {

@@ -56,13 +56,7 @@ static void __init spear320_evb_init(void)
 	unsigned int i;

Rework the SPEAr3xx code to allow all three SPEAr3xx platforms to be built into a single kernel.

I do not have access to any SPEAr3xx hardware, so the patch series is build tested only.

Rework the SPEAr3xx code to allow all three SPEAr3xx platforms to be built into a single kernel.

I do not have access to any SPEAr3xx hardware, so the patch series is build tested only.

Ryan Mallon (5):
SPEAr3xx: Make local structres static
SPEAR3xx: Rename register/irq defines to remove naming conflicts
SPEAr3xx: Rework pmx_dev code to remove conflicts
SPEAr3xx: Rework KConfig to allow all boards to be compiled in
SPEAr3xx: Replace defconfigs with single unfied defconfig

 arch/arm/configs/spear300_defconfig            |  773 -----------------------
 arch/arm/configs/spear310_defconfig            |  775 ------------------------
 arch/arm/configs/spear320_defconfig            |  775 ------------------------
 arch/arm/configs/spear3xx_defconfig            |  775 ++++++++++++++++++++++++
 arch/arm/mach-spear3xx/Kconfig                 |   30 +-
 arch/arm/mach-spear3xx/Kconfig300              |   17 -
 arch/arm/mach-spear3xx/Kconfig310              |   17 -
 arch/arm/mach-spear3xx/Kconfig320              |   17 -
 arch/arm/mach-spear3xx/include/mach/generic.h  |  139 ++---
 arch/arm/mach-spear3xx/include/mach/irqs.h     |  195 +++---
 arch/arm/mach-spear3xx/include/mach/spear300.h |   26 +-
 arch/arm/mach-spear3xx/include/mach/spear310.h |   44 +-
 arch/arm/mach-spear3xx/include/mach/spear320.h |   50 +-
 arch/arm/mach-spear3xx/spear300.c              |  135 ++--
 arch/arm/mach-spear3xx/spear300_evb.c          |   26 +-
 arch/arm/mach-spear3xx/spear310.c              |  137 +++--
 arch/arm/mach-spear3xx/spear310_evb.c          |   42 +-
 arch/arm/mach-spear3xx/spear320.c              |  247 ++++----
 arch/arm/mach-spear3xx/spear320_evb.c          |   36 +-
 arch/arm/mach-spear3xx/spear3xx.c              |  124 ++--

 20 files changed, 1387 insertions(+), 2993 deletions(-)
 delete mode 100644 arch/arm/configs/spear300_defconfig
 delete mode 100644 arch/arm/configs/spear310_defconfig
 delete mode 100644 arch/arm/configs/spear320_defconfig
 create mode 100644 arch/arm/configs/spear3xx_defconfig
 delete mode 100644 arch/arm/mach-spear3xx/Kconfig300
 delete mode 100644 arch/arm/mach-spear3xx/Kconfig310
 delete mode 100644 arch/arm/mach-spear3xx/Kconfig320

Quoted 6 lines · Ryan Mallon

Rework the SPEAr3xx code to allow all three SPEAr3xx platforms to be built into a single kernel.

I do not have access to any SPEAr3xx hardware, so the patch series is build tested only.

Quoted 6 lines

Ryan Mallon (5):
SPEAr3xx: Make local structres static
SPEAR3xx: Rename register/irq defines to remove naming conflicts
SPEAr3xx: Rework pmx_dev code to remove conflicts
SPEAr3xx: Rework KConfig to allow all boards to be compiled in
SPEAr3xx: Replace defconfigs with single unfied defconfig

Ryan,

Patches looks fine to me, but i need to test them before i Ack them. Please give me some time to do that, currently i am very busy in some other activities.

viresh.