Fix AT91SAM9G20 reset

PATCH New Peter Horton 4 participants 12 messages May 28, 2010 – Oct 19, 2010

Subsystems (3)

Arm (32-bit) Arm sub-architectures Arm/Microchip (AT91) SoC support

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Peter Horton

author

2010-05-28 15:37 UTC #0 lore raw

PATCH 1/1 Fix AT91SAM9G20 reset

Fix AT91SAM9G20 as per the errata in the datasheet.

If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND.

Signed-off-by Peter Horton <[email protected]>

arch/arm/mach-at91/Makefile +1 -1

Index: linux-2.6.32/arch/arm/mach-at91/Makefile
===================================================================
@@ -16,7 +16,7 @@
 obj-$(CONFIG_ARCH_AT91SAM9G10)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9g20_reset.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)	+= at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91CAP9)	+= at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT572D940HF)  += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o

arch/arm/mach-at91/at91sam9260.c +7 -1

Index: linux-2.6.32/arch/arm/mach-at91/at91sam9260.c
===================================================================
@@ -25,6 +25,8 @@
 #include "generic.h"
 #include "clock.h"
 
+extern void at91sam9g20_reset(void);
+
 static struct map_desc at91sam9260_io_desc[] __initdata = {
 	{
 		.virtual	= AT91_VA_BASE_SYS,

@@ -327,7 +329,11 @@
 	else
 		iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
 
-	at91_arch_reset = at91sam9260_reset;
+	if (cpu_is_at91sam9g20())
+		at91_arch_reset = at91sam9g20_reset;
+	else
+		at91_arch_reset = at91sam9260_reset;
+
 	pm_power_off = at91sam9260_poweroff;
 	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
 			| (1 << AT91SAM9260_ID_IRQ2);

arch/arm/mach-at91/at91sam9g20_reset.S new file +52 -0

52 lines not on this page · raw message

Lucas

2010-06-21 14:30 UTC #1 lore raw

PATCH 1/1 Fix AT91SAM9G20 reset

Quoted 9 lines · Peter Horton <phorton <at> bitbox.co.uk> writes:

Fix AT91SAM9G20 as per the errata in the datasheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND.
Signed-off-by: Peter Horton <phorton <at> bitbox.co.uk> --

Hi Peter,

Any Idea how to implement this for the WDT and hardware reset(NRST)? A hardware reset sometimes still stops the bootloader booting from NAND.

Lucas

Peter Horton

author

2010-06-21 15:14 UTC #2 lore raw

PATCH 1/1 Fix AT91SAM9G20 reset

Quoted 13 lines · Lucas

Quoted 9 lines · Peter Horton<phorton<at> bitbox.co.uk> writes:
Fix AT91SAM9G20 as per the errata in the datasheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND.
Signed-off-by: Peter Horton<phorton<at> bitbox.co.uk> --

Quoted 5 lines

Hi Peter,
Any Idea how to implement this for the WDT and hardware reset(NRST)? A hardware reset sometimes still stops the bootloader booting from NAND.

Not possible to fix as far as I understand it. We've had to put down a small DataFlash which then boots from NAND.

Turns out we needed DataFlash anyway as the Atmel boot ROM is not compatible with newer NANDs (newer NANDs no longer guarantee block 0 without ECC and the Atmel boot ROM doesn't support ECC).

Nicolas Ferre

2010-10-14 13:34 UTC #3 lore raw

PATCH 1/1 Fix AT91SAM9G20 reset

In reply to Peter Horton

Le 28/05/2010 17:37, Peter Horton :

Quoted 6 lines

Fix AT91SAM9G20 as per the errata in the datasheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND.
Signed-off-by Peter Horton <[email protected]>

Thanks a lot for writing this patch. I am in the process of reviewing it and extending it to other processors.

[..]

arch/arm/mach-at91/at91sam9g20_reset.S line 8

Quoted 11 lines

arch/arm/mach-at91/at91sam9g20_reset.S new file +8 -0

@@ -0,0 +1,52 @@
+/*
+ * (C) BitBox Ltd 2010
+ *
+ * reset AT91SAM9G20 as per errata
+ *
+ * unless the SDRAM is cleanly shutdown before we hit the
+ * reset register it can be left driving the data bus and
+ * killing the chance of a subsequent boot from NAND

Can I add License sentence to this file? Like this one:

* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.

Best regards,

Signature · 1 line

Nicolas Ferre

Peter Horton

author

2010-10-14 15:31 UTC #4 lore raw

PATCH 1/1 Fix AT91SAM9G20 reset

Quoted 27 lines · Nicolas Ferre

Le 28/05/2010 17:37, Peter Horton :
Quoted 6 lines
Fix AT91SAM9G20 as per the errata in the datasheet.
If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND.
Signed-off-by Peter Horton<[email protected]>
Thanks a lot for writing this patch. I am in the process of reviewing it and extending it to other processors.
[..]
arch/arm/mach-at91/at91sam9g20_reset.S line 8
Quoted 11 lines
arch/arm/mach-at91/at91sam9g20_reset.S new file +8 -0
@@ -0,0 +1,52 @@
+/*
+ * (C) BitBox Ltd 2010
+ *
+ * reset AT91SAM9G20 as per errata
+ *
+ * unless the SDRAM is cleanly shutdown before we hit the
+ * reset register it can be left driving the data bus and
+ * killing the chance of a subsequent boot from NAND
Can I add License sentence to this file? Like this one:

Quoted 5 lines

* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.

No problem.

Nicolas Ferre

2010-10-14 16:18 UTC #5 lore raw

PATCH 1/5 Fix AT91SAM9G20 reset as per the errata in the data sheet

In reply to Peter Horton

From: Peter Horton <[email protected]>

If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND.

Signed-off-by Peter Horton <[email protected]>

[[email protected]: change file header line order]

Signed-off-by Nicolas Ferre <[email protected]>

---
 arch/arm/mach-at91/Makefile            |    2 +-
 arch/arm/mach-at91/at91sam9260.c       |    8 ++++-
 arch/arm/mach-at91/at91sam9g20_reset.S |   55 ++++++++++++++++++++++++++++++++
 3 files changed, 63 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-at91/at91sam9g20_reset.S

arch/arm/mach-at91/Makefile +1 -1

index 88e55e3..d4bb704 100644
@@ -16,7 +16,7 @@ obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_d
 obj-$(CONFIG_ARCH_AT91SAM9G10)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9g20_reset.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)	+= at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91CAP9)	+= at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT572D940HF)  += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o

arch/arm/mach-at91/at91sam9260.c +7 -1

index 0894f10..f884450 100644
@@ -25,6 +25,8 @@
 #include "generic.h"
 #include "clock.h"
 
+extern void at91sam9g20_reset(void);
+
 static struct map_desc at91sam9260_io_desc[] __initdata = {
 	{
 		.virtual	= AT91_VA_BASE_SYS,

@@ -327,7 +329,11 @@ void __init at91sam9260_initialize(unsigned long main_clock)
 	else
 		iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
 
-	at91_arch_reset = at91sam9260_reset;
+	if (cpu_is_at91sam9g20())
+		at91_arch_reset = at91sam9g20_reset;
+	else
+		at91_arch_reset = at91sam9260_reset;
+
 	pm_power_off = at91sam9260_poweroff;
 	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
 			| (1 << AT91SAM9260_ID_IRQ2);

arch/arm/mach-at91/at91sam9g20_reset.S new file +55 -0

55 lines not on this page · raw message

Signature · 1 line

1.7.3

Jean-Christophe PLAGNIOL-VILLARD

2010-10-15 12:29 UTC #6 lore raw

Re: [PATCH 1/5] Fix AT91SAM9G20 reset as per the errata in the data sheet

arch/arm/mach-at91/at91sam9g20_reset.S line 36

Quoted 2 lines

arch/arm/mach-at91/at91sam9g20_reset.S new file +2 -0
+at91sam9g20_reset:	mov	r0, #0
+			mcr	p15, 0, r0, c7, c5, 0	@ flush I-cache

do we really need to flush the I-cache again

Best Regards,
J.

Nicolas Ferre

2010-10-19 10:05 UTC #7 lore raw

Re: [PATCH 1/5] Fix AT91SAM9G20 reset as per the errata in the data sheet

Le 15/10/2010 14:29, Jean-Christophe PLAGNIOL-VILLARD :

Quoted 3 lines

arch/arm/mach-at91/at91sam9g20_reset.S line 36
Quoted 2 lines
arch/arm/mach-at91/at91sam9g20_reset.S new file +2 -0
+at91sam9g20_reset:	mov	r0, #0
+			mcr	p15, 0, r0, c7, c5, 0	@ flush I-cache
do we really need to flush the I-cache again

You are right, it is done in the calling function: arm_machine_restart().

I will correct it in the patch series.

Best regards,

Signature · 1 line

Nicolas Ferre

Nicolas Ferre

2010-10-14 16:18 UTC #8 lore raw

PATCH 2/5 AT91: trivial: align comment of at91sam9g20_reset with one more tab

In reply to Peter Horton

Preparing next patch with longer names

Signed-off-by Nicolas Ferre <[email protected]>

---
 arch/arm/mach-at91/at91sam9g20_reset.S |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

arch/arm/mach-at91/at91sam9g20_reset.S +7 -7

index f6e9b03..1631c38 100644
@@ -33,23 +33,23 @@
 			.globl	at91sam9g20_reset
 
 at91sam9g20_reset:	mov	r0, #0
-			mcr	p15, 0, r0, c7, c5, 0	@ flush I-cache
+			mcr	p15, 0, r0, c7, c5, 0		@ flush I-cache
 
 			mrc	p15, 0, r0, c1, c0, 0
 			orr	r0, r0, #CP15_CR_I
-			mcr	p15, 0, r0, c1, c0, 0	@ enable I-cache
+			mcr	p15, 0, r0, c1, c0, 0		@ enable I-cache
 
-			ldr	r0, =SDRAMC_BASE	@ preload constants
+			ldr	r0, =SDRAMC_BASE		@ preload constants
 			ldr	r1, =RSTC_BASE
 
 			mov	r2, #1
 			mov	r3, #SDRAMC_LPCB_POWER_DOWN
 			ldr	r4, =RSTC_KEY | RSTC_PERRST | RSTC_PROCRST
 
-			.balign	32			@ align to cache line
+			.balign	32				@ align to cache line
 
-			str	r2, [r0, #SDRAMC_TR]	@ disable SDRAM access
-			str	r3, [r0, #SDRAMC_LPR]	@ power down SDRAM
-			str	r4, [r1, #RSTC_CR]	@ reset processor
+			str	r2, [r0, #SDRAMC_TR]		@ disable SDRAM access
+			str	r3, [r0, #SDRAMC_LPR]		@ power down SDRAM
+			str	r4, [r1, #RSTC_CR]		@ reset processor
 
 			b	.

Signature · 1 line

1.7.3

Nicolas Ferre

2010-10-14 16:18 UTC #9 lore raw

PATCH 3/5 AT91: reset routine cleanup

In reply to Peter Horton

Generalize assembler reset routine to allow use on several at91sam9 chips. This patch replace double definitions of SDRAM controller registers and RSTC registers with use of classical header files.

Signed-off-by Nicolas Ferre <[email protected]>

---
 arch/arm/mach-at91/at91sam9260.c       |    4 +-
 arch/arm/mach-at91/at91sam9g20_reset.S |   44 ++++++++++++++-----------------
 2 files changed, 22 insertions(+), 26 deletions(-)

arch/arm/mach-at91/at91sam9260.c +2 -2

index f884450..dfd3529 100644
@@ -25,7 +25,7 @@
 #include "generic.h"
 #include "clock.h"
 
-extern void at91sam9g20_reset(void);
+extern void at91sam9_alt_reset(void);
 
 static struct map_desc at91sam9260_io_desc[] __initdata = {
 	{

@@ -330,7 +330,7 @@ void __init at91sam9260_initialize(unsigned long main_clock)
 		iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
 
 	if (cpu_is_at91sam9g20())
-		at91_arch_reset = at91sam9g20_reset;
+		at91_arch_reset = at91sam9_alt_reset;
 	else
 		at91_arch_reset = at91sam9260_reset;

arch/arm/mach-at91/at91sam9g20_reset.S +20 ~~-24~~

63 lines not on this page · raw message

Signature · 1 line

1.7.3

Nicolas Ferre

2010-10-14 16:18 UTC #10 lore raw

PATCH 4/5 AT91: rename at91sam9g20_reset.S to generalize to several chips

In reply to Peter Horton

Signed-off-by Nicolas Ferre <[email protected]>

---
 arch/arm/mach-at91/Makefile                        |    2 +-
 .../{at91sam9g20_reset.S => at91sam9_alt_reset.S}  |    0
 2 files changed, 1 insertions(+), 1 deletions(-)
 rename arch/arm/mach-at91/{at91sam9g20_reset.S => at91sam9_alt_reset.S} (100%)

arch/arm/mach-at91/Makefile +1 -1

index d4bb704..15fee8b 100644
@@ -16,7 +16,7 @@ obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_d
 obj-$(CONFIG_ARCH_AT91SAM9G10)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9g20_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)	+= at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91CAP9)	+= at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT572D940HF)  += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o

arch/arm/mach-at91/at91sam9_alt_reset.S renamed from arch/arm/mach-at91/at91sam9g20_reset.S +0 -0

similarity index 100%
rename from arch/arm/mach-at91/at91sam9g20_reset.S
rename to arch/arm/mach-at91/at91sam9_alt_reset.S

Signature · 1 line

1.7.3

Nicolas Ferre

2010-10-14 16:18 UTC #11 lore raw

PATCH 5/5 AT91: reset: extend alternate reset procedure to several chips

In reply to Peter Horton

Several at91sam9 chips need the alternate reset procedure to be sure to halt SDRAM smoothly before resetting the chip.
This is an extension of previous patch "Fix AT91SAM9G20 reset" to all chips affected.

Signed-off-by Nicolas Ferre <[email protected]>

---
 arch/arm/mach-at91/Makefile      |   10 +++++-----
 arch/arm/mach-at91/at91sam9260.c |   13 +------------
 arch/arm/mach-at91/at91sam9261.c |    7 +------
 arch/arm/mach-at91/at91sam9263.c |    7 +------
 arch/arm/mach-at91/at91sam9rl.c  |    7 +------
 arch/arm/mach-at91/generic.h     |    3 +++
 6 files changed, 12 insertions(+), 35 deletions(-)

arch/arm/mach-at91/Makefile +5 -5

index 15fee8b..428266f 100644
@@ -11,11 +11,11 @@ obj-$(CONFIG_AT91_PMC_UNIT)	+= clock.o
 
 # CPU-specific support
 obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G10)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G10)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o
 obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)	+= at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91CAP9)	+= at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o

arch/arm/mach-at91/at91sam9260.c +1 ~~-12~~

index dfd3529..195208b 100644
@@ -25,8 +25,6 @@
 #include "generic.h"
 #include "clock.h"
 
-extern void at91sam9_alt_reset(void);
-
 static struct map_desc at91sam9260_io_desc[] __initdata = {
 	{
 		.virtual	= AT91_VA_BASE_SYS,

@@ -281,11 +279,6 @@ static struct at91_gpio_bank at91sam9260_gpio[] = {
 	}
 };
 
-static void at91sam9260_reset(void)
-{
-	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-}
-
 static void at91sam9260_poweroff(void)
 {
 	at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);

@@ -329,11 +322,7 @@ void __init at91sam9260_initialize(unsigned long main_clock)
 	else
 		iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
 
-	if (cpu_is_at91sam9g20())
-		at91_arch_reset = at91sam9_alt_reset;
-	else
-		at91_arch_reset = at91sam9260_reset;
-
+	at91_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9260_poweroff;
 	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
 			| (1 << AT91SAM9260_ID_IRQ2);

arch/arm/mach-at91/at91sam9261.c +1 -6

index 4ecf379..fcad886 100644
@@ -257,11 +257,6 @@ static struct at91_gpio_bank at91sam9261_gpio[] = {
 	}
 };
 
-static void at91sam9261_reset(void)
-{
-	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-}
-
 static void at91sam9261_poweroff(void)
 {
 	at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);

@@ -283,7 +278,7 @@ void __init at91sam9261_initialize(unsigned long main_clock)
 		iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));
 
 
-	at91_arch_reset = at91sam9261_reset;
+	at91_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9261_poweroff;
 	at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
 			| (1 << AT91SAM9261_ID_IRQ2);

arch/arm/mach-at91/at91sam9263.c +1 -6

index 942792d..249f900 100644
@@ -269,11 +269,6 @@ static struct at91_gpio_bank at91sam9263_gpio[] = {
 	}
 };
 
-static void at91sam9263_reset(void)
-{
-	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-}
-
 static void at91sam9263_poweroff(void)
 {
 	at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);

@@ -289,7 +284,7 @@ void __init at91sam9263_initialize(unsigned long main_clock)
 	/* Map peripherals */
 	iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
 
-	at91_arch_reset = at91sam9263_reset;
+	at91_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9263_poweroff;
 	at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);

arch/arm/mach-at91/at91sam9rl.c +1 -6

index 211c5c1..6a9d24e 100644
@@ -242,11 +242,6 @@ static struct at91_gpio_bank at91sam9rl_gpio[] = {
 	}
 };
 
-static void at91sam9rl_reset(void)
-{
-	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-}
-
 static void at91sam9rl_poweroff(void)
 {
 	at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);

@@ -281,7 +276,7 @@ void __init at91sam9rl_initialize(unsigned long main_clock)
 	/* Map SRAM */
 	iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
 
-	at91_arch_reset = at91sam9rl_reset;
+	at91_arch_reset = at91sam9_alt_reset;
 	pm_power_off = at91sam9rl_poweroff;
 	at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);

arch/arm/mach-at91/generic.h +3 -0

index 65c3dc5..0c66deb 100644
@@ -46,6 +46,9 @@ extern void __init at91_clock_associate(const char *id, struct device *dev, cons
 extern void at91_irq_suspend(void);
 extern void at91_irq_resume(void);
 
+/* reset */
+extern void at91sam9_alt_reset(void);
+
  /* GPIO */
 #define AT91RM9200_PQFP		3	/* AT91RM9200 PQFP package has 3 banks */
 #define AT91RM9200_BGA		4	/* AT91RM9200 BGA package has 4 banks */

Signature · 1 line

1.7.3