Network support for spear platforms and SPEAr1300

index 270f163..435857b 100644
@@ -29,8 +29,6 @@ extern void set_bit(int nr, volatile void * addr);
 
 extern void clear_bit(int nr, volatile void * addr);
 
-extern void change_bit(int nr, volatile void * addr);
-
 static inline void __change_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = BIT_MASK(nr);

@@ -39,6 +37,15 @@ static inline void __change_bit(int nr, volatile void *addr)
 	*p ^= mask;
 }
 
+static inline void change_bit(int nr, volatile void *addr)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	__change_bit(nr, addr);
+	local_irq_restore(flags);
+}
+
 static inline int __test_and_set_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = BIT_MASK(nr);

index 06df745..0cca000 100644
@@ -109,7 +109,7 @@ struct flash_dev {
 };
 
 #define SFLASH_PAGE_SIZE	0x100	/* flash page size */
-#define XFER_FINISH_TOUT	2	/* xfer finish timeout */
-#define WMODE_TOUT		2	/* write enable timeout */
+#define XFER_FINISH_TOUT	15	/* xfer finish timeout(in ms) */
+#define WMODE_TOUT		15	/* write enable timeout(in ms) */
 
 #endif

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index e356912..181e3b2 100644
@@ -38,6 +38,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 static struct chip_data chip_data;
 
+#if defined(CONFIG_CMD_NET)
+static int i2c_read_mac(uchar *buffer);
+#endif
+
 int dram_init(void)
 {
 	struct xloader_table *xloader_tb =

@@ -166,6 +170,7 @@ int spear_board_init(ulong mach_type)
 	return 0;
 }
 
+#if defined(CONFIG_CMD_NET)
 static int i2c_read_mac(uchar *buffer)
 {
 	u8 buf[2];

@@ -198,22 +203,24 @@ static int write_mac(uchar *mac)
 	/* check if valid MAC address is saved in I2C EEPROM or not? */
 	if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
 		i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
-		puts("I2C EEPROM written with mac address \n");
+		puts("I2C EEPROM written with mac address\n");
 		return 0;
 	}
 
-	puts("I2C EEPROM writing failed \n");
+	puts("I2C EEPROM writing failed\n");
 	return -1;
 }
+#endif
 
 int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	void (*sram_setfreq) (unsigned int, unsigned int);
 	struct chip_data *chip = &chip_data;
+	unsigned int frequency;
+
+#if defined(CONFIG_CMD_NET)
 	unsigned char mac[6];
-	unsigned int reg, frequency;
-	char *s, *e;
-	char i2c_mac[20];
+#endif
 
 	if ((argc > 3) || (argc < 2)) {
 		cmd_usage(cmdtp);

@@ -244,9 +251,12 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		}
 
 		return 0;
+
+#if defined(CONFIG_CMD_NET)
 	} else if (!strcmp(argv[1], "ethaddr")) {
 
-		s = argv[2];
+		u32 reg;
+		char *e, *s = argv[2];
 		for (reg = 0; reg < 6; ++reg) {
 			mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
 			if (s)

@@ -255,6 +265,7 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		write_mac(mac);
 
 		return 0;
+#endif
 	} else if (!strcmp(argv[1], "print")) {
 
 		if (chip->cpufreq == -1)

@@ -274,13 +285,13 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		else
 			printf("DDR Type    = Not Known\n");
 
+#if defined(CONFIG_CMD_NET)
 		if (!i2c_read_mac(mac)) {
-			sprintf(i2c_mac, "%pM", mac);
-			printf("Ethaddr (from i2c mem) = %s\n", i2c_mac);
+			printf("Ethaddr (from i2c mem) = %pM\n", mac);
 		} else {
 			printf("Ethaddr (from i2c mem) = Not set\n");
 		}
-
+#endif
 		printf("Xloader Rev = %s\n", chip->version);
 
 		return 0;

@@ -293,4 +304,7 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
 	   "configure chip",
 	   "chip_config cpufreq/ddrfreq frequency\n"
+#if defined(CONFIG_CMD_NET)
+	   "chip_config ethaddr XX:XX:XX:XX:XX:XX\n"
+#endif
 	   "chip_config print");

index cc52e39..b526558 100644
@@ -208,6 +208,6 @@
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS			1
 #define PHYS_SDRAM_1				0x00000000
-#define PHYS_SDRAM_1_MAXSIZE			0x40000000
+#define PHYS_SDRAM_1_MAXSIZE			0x08000000
 
 #endif

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index 8b96d9b..045d2bb 100644
@@ -126,5 +126,10 @@ struct misc_regs {
 
 /* PERIPH1_CLKEN, PERIPH1_RST value */
 #define MISC_USBDENB			0x01000000
+#define MISC_ETHENB			0x00800000
+#define MISC_SMIENB			0x00200000
+#define MISC_FSMCENB			0x00000200
+#define MISC_I2CENB			0x00000080
+#define MISC_UART0ENB			0x00000008
 
 #endif

index b526558..10beef7 100644
@@ -168,6 +168,8 @@
 #define CONFIG_ENV_SIZE				0x02000
 
 /* Miscellaneous configurable options */
+#define CONFIG_ARCH_CPU_INIT			1
+#define CONFIG_DISPLAY_CPUINFO			1
 #define CONFIG_BOOT_PARAMS_ADDR			0x00000100
 #define CONFIG_CMDLINE_TAG			1
 #define CONFIG_SETUP_MEMORY_TAGS		1

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index 882642a..3abc944 100644
@@ -49,6 +49,7 @@ int bfin_EMAC_initialize(bd_t *bis);
 int cs8900_initialize(u8 dev_num, int base_addr);
 int dc21x4x_initialize(bd_t *bis);
 int davinci_emac_initialize(void);
+int designware_initialize(u32 id, ulong base_addr, u32 phy_addr);
 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
 int e1000_initialize(bd_t *bis);
 int eepro100_initialize(bd_t *bis);

index 818f36c..39d64b6 100644
@@ -31,6 +31,7 @@
 #define CONFIG_SPEAR_SYSCNTLBASE		(0xFCA00000)
 #define CONFIG_SPEAR_TIMERBASE			(0xFC800000)
 #define CONFIG_SPEAR_MISCBASE			(0xFCA80000)
+#define CONFIG_SPEAR_ETHBASE			(0xE0800000)
 
 #define CONFIG_SYS_NAND_CLE			(1 << 16)
 #define CONFIG_SYS_NAND_ALE			(1 << 17)

index 60ee544..744a17b 100644
@@ -22,6 +22,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>

@@ -56,3 +57,13 @@ int board_nand_init(struct nand_chip *nand)
 
 	return -1;
 }
+
+int board_eth_init(bd_t *bis)
+{
+	int ret = 0;
+#if defined(CONFIG_DESIGNWARE_ETH)
+	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0)
+		ret++;
+#endif
+	return ret;
+}

index 03dfe16..666ed48 100644
@@ -23,6 +23,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>

@@ -57,3 +58,13 @@ int board_nand_init(struct nand_chip *nand)
 
 	return -1;
 }
+
+int board_eth_init(bd_t *bis)
+{
+	int ret = 0;
+#if defined(CONFIG_DESIGNWARE_ETH)
+	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0)
+		ret++;
+#endif
+	return ret;
+}

index 2ba2dbb..89b074a 100644
@@ -23,6 +23,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>

@@ -57,3 +58,13 @@ int board_nand_init(struct nand_chip *nand)
 
 	return -1;
 }
+
+int board_eth_init(bd_t *bis)
+{
+	int ret = 0;
+#if defined(CONFIG_DESIGNWARE_ETH)
+	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0)
+		ret++;
+#endif
+	return ret;
+}

index eef9a37..759b4fa 100644
@@ -22,6 +22,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>

@@ -51,3 +52,13 @@ int board_nand_init(struct nand_chip *nand)
 
 	return -1;
 }
+
+int board_eth_init(bd_t *bis)
+{
+	int ret = 0;
+#if defined(CONFIG_DESIGNWARE_ETH)
+	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0)
+		ret++;
+#endif
+	return ret;
+}

index 10beef7..1398837 100644
@@ -27,6 +27,14 @@
  * Common configurations used for both spear3xx as well as spear6xx
  */
 
+/* Ethernet driver configuration */
+#define CONFIG_MII
+#define CONFIG_DESIGNWARE_ETH
+#define CONFIG_DW_SEARCH_PHY
+#define CONFIG_DW0_PHY				1
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_RESET_DELAY			(10000)		/* in usec */
+
 /* USBD driver configuration */
 #define CONFIG_SPEARUDC
 #define CONFIG_USB_DEVICE

@@ -99,11 +107,13 @@
 #define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_RUN
 #define CONFIG_CMD_SAVES
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
 
 /* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <config_cmd_default.h>
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
 
 /*
  * Default Environment Varible definitions

index 0248aba..502c50f 100644
@@ -41,6 +41,9 @@
 
 #include <configs/spear-common.h>
 
+/* Ethernet driver configuration */
+#define CONFIG_DW_ALTDESCRIPTOR			1
+
 /* Serial Configuration (PL011) */
 #define CONFIG_SYS_SERIAL0			0xD0000000
 

new file mode 100644
index 0000000..a45ec18
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2010
+ * Vipin Kumar, STMicroelectronics, <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
+{
+	return 83000000;
+}

index 39d64b6..9f1e154 100644
@@ -56,6 +56,11 @@
 #define CONFIG_SPEAR_EMIBASE			(0x4F000000)
 #define CONFIG_SPEAR_RASBASE			(0xB4000000)
 
+#define CONFIG_SYS_MACB0_BASE			(0xB0000000)
+#define CONFIG_SYS_MACB1_BASE			(0xB0800000)
+#define CONFIG_SYS_MACB2_BASE			(0xB1000000)
+#define CONFIG_SYS_MACB3_BASE			(0xB1800000)
+
 #elif defined(CONFIG_SPEAR320)
 #define CONFIG_SYS_I2C_BASE			(0xD0180000)
 #define CONFIG_SPEAR_FSMCBASE			(0x4C000000)

@@ -63,5 +68,7 @@
 #define CONFIG_SPEAR_EMIBASE			(0x40000000)
 #define CONFIG_SPEAR_RASBASE			(0xB3000000)
 
+#define CONFIG_SYS_MACB0_BASE			(0xAA000000)
+
 #endif
 #endif /* _ASM_ARCH_HARDWARE_H */

index 666ed48..193fa0c 100644
@@ -66,5 +66,22 @@ int board_eth_init(bd_t *bis)
 	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0)
 		ret++;
 #endif
+#if defined(CONFIG_MACB)
+	if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE,
+				CONFIG_MACB0_PHY) >= 0)
+		ret++;
+
+	if (macb_eth_initialize(1, (void *)CONFIG_SYS_MACB1_BASE,
+				CONFIG_MACB1_PHY) >= 0)
+		ret++;
+
+	if (macb_eth_initialize(2, (void *)CONFIG_SYS_MACB2_BASE,
+				CONFIG_MACB2_PHY) >= 0)
+		ret++;
+
+	if (macb_eth_initialize(3, (void *)CONFIG_SYS_MACB3_BASE,
+				CONFIG_MACB3_PHY) >= 0)
+		ret++;
+#endif
 	return ret;
 }

index 89b074a..0d9eed4 100644
@@ -66,5 +66,10 @@ int board_eth_init(bd_t *bis)
 	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0)
 		ret++;
 #endif
+#if defined(CONFIG_MACB)
+	if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE,
+				CONFIG_MACB0_PHY) >= 0)
+		ret++;
+#endif
 	return ret;
 }

index 502c50f..689d914 100644
@@ -44,6 +44,19 @@
 /* Ethernet driver configuration */
 #define CONFIG_DW_ALTDESCRIPTOR			1
 
+#if defined(CONFIG_SPEAR310)
+#define CONFIG_MACB				1
+#define CONFIG_MACB0_PHY			0x01
+#define CONFIG_MACB1_PHY			0x03
+#define CONFIG_MACB2_PHY			0x05
+#define CONFIG_MACB3_PHY			0x07
+
+#elif defined(CONFIG_SPEAR320)
+#define CONFIG_MACB				1
+#define CONFIG_MACB0_PHY			0x01
+
+#endif
+
 /* Serial Configuration (PL011) */
 #define CONFIG_SYS_SERIAL0			0xD0000000
 

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index 9f1e154..52037b6 100644
@@ -38,15 +38,15 @@
 
 #if defined(CONFIG_SPEAR600)
 #define CONFIG_SYS_I2C_BASE			(0xD0200000)
-#define CONFIG_SPEAR_FSMCBASE			(0xD1800000)
+#define CONFIG_SYS_FSMC_BASE			(0xD1800000)
 
 #elif defined(CONFIG_SPEAR300)
 #define CONFIG_SYS_I2C_BASE			(0xD0180000)
-#define CONFIG_SPEAR_FSMCBASE			(0x94000000)
+#define CONFIG_SYS_FSMC_BASE			(0x94000000)
 
 #elif defined(CONFIG_SPEAR310)
 #define CONFIG_SYS_I2C_BASE			(0xD0180000)
-#define CONFIG_SPEAR_FSMCBASE			(0x44000000)
+#define CONFIG_SYS_FSMC_BASE			(0x44000000)
 
 #undef CONFIG_SYS_NAND_CLE
 #undef CONFIG_SYS_NAND_ALE

@@ -63,7 +63,7 @@
 
 #elif defined(CONFIG_SPEAR320)
 #define CONFIG_SYS_I2C_BASE			(0xD0180000)
-#define CONFIG_SPEAR_FSMCBASE			(0x4C000000)
+#define CONFIG_SYS_FSMC_BASE			(0x4C000000)
 
 #define CONFIG_SPEAR_EMIBASE			(0x40000000)
 #define CONFIG_SPEAR_RASBASE			(0xB3000000)

57 lines not on this page · raw message

index 744a17b..d9f9aca 100644
@@ -25,10 +25,10 @@
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
 
 int board_init(void)
 {

@@ -47,14 +47,15 @@ int board_nand_init(struct nand_chip *nand)
 	struct misc_regs *const misc_regs_p =
 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
+#if defined(CONFIG_NAND_FSMC)
 	if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG30) ||
 	    ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG31)) {
 
-		return spear_nand_init(nand);
+		return fsmc_nand_init(nand);
 	}
-
+#endif
 	return -1;
 }
 

index 193fa0c..9543b19 100644
@@ -26,10 +26,10 @@
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
 
 int board_init(void)
 {

@@ -48,14 +48,15 @@ int board_nand_init(struct nand_chip *nand)
 	struct misc_regs *const misc_regs_p =
 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
+#if defined(CONFIG_NAND_FSMC)
 	if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG30) ||
 	    ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG31)) {
 
-		return spear_nand_init(nand);
+		return fsmc_nand_init(nand);
 	}
-
+#endif
 	return -1;
 }
 

index 0d9eed4..77f3bc5 100644
@@ -26,10 +26,10 @@
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
 
 int board_init(void)
 {

@@ -48,14 +48,15 @@ int board_nand_init(struct nand_chip *nand)
 	struct misc_regs *const misc_regs_p =
 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
+#if defined(CONFIG_NAND_FSMC)
 	if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG30) ||
 	    ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG31)) {
 
-		return spear_nand_init(nand);
+		return fsmc_nand_init(nand);
 	}
-
+#endif
 	return -1;
 }
 

index 759b4fa..ec10396 100644
@@ -25,10 +25,10 @@
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
 
 int board_init(void)
 {

@@ -47,9 +47,10 @@ int board_nand_init(struct nand_chip *nand)
 	struct misc_regs *const misc_regs_p =
 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
+#if defined(CONFIG_NAND_FSMC)
 	if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS))
-		return spear_nand_init(nand);
-
+		return fsmc_nand_init(nand);
+#endif
 	return -1;
 }
 

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index 1398837..a54d534 100644
@@ -94,7 +94,7 @@
 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 
 /* NAND FLASH Configuration */
-#define CONFIG_NAND_SPEAR			1
+#define CONFIG_NAND_FSMC			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_MTD_NAND_VERIFY_WRITE		1
 

index 689d914..fde505c 100644
@@ -133,6 +133,10 @@
 
 #endif
 
+/* NAND flash configuration */
+#define CONFIG_SYS_FSMC_NAND_SP			1
+#define CONFIG_SYS_FSMC_NAND_8BIT		1
+
 #if defined(CONFIG_SPEAR300)
 #define CONFIG_SYS_NAND_BASE			(0x80000000)
 

index 2ad5beb..2532344 100644
@@ -38,6 +38,9 @@
 #define CONFIG_PL01x_PORTS			{ (void *)CONFIG_SYS_SERIAL0, \
 						(void *)CONFIG_SYS_SERIAL1 }
 
+/* NAND flash configuration */
+#define CONFIG_SYS_FSMC_NAND_SP			1
+#define CONFIG_SYS_FSMC_NAND_8BIT		1
 #define CONFIG_SYS_NAND_BASE			(0xD2000000)
 
 #endif  /* __CONFIG_H */

similarity index 98%
rename from drivers/i2c/spr_i2c.c
rename to drivers/i2c/designware_i2c.c
index eabfe84..d352146 100644
@@ -24,7 +24,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/spr_i2c.h>
+#include "designware_i2c.h"
 
 static struct i2c_regs *const i2c_regs_p =
     (struct i2c_regs *)CONFIG_SYS_I2C_BASE;

@@ -113,7 +113,7 @@ int i2c_get_bus_speed(void)
 /*
  * i2c_init - Init function
  * @speed:	required i2c speed
- * @slaveadd:	slave address for the spear device
+ * @slaveadd:	slave address for the device
  *
  * Initialization function.
  */

similarity index 98%
rename from arch/arm/include/asm/arch-spear/spr_i2c.h
rename to drivers/i2c/designware_i2c.h
index 7521ebc..03b520e 100644
@@ -21,8 +21,8 @@
  * MA 02111-1307 USA
  */
 
-#ifndef __SPR_I2C_H_
-#define __SPR_I2C_H_
+#ifndef __DW_I2C_H_
+#define __DW_I2C_H_
 
 struct i2c_regs {
 	u32 ic_con;

@@ -143,4 +143,4 @@ struct i2c_regs {
 #define I2C_FAST_SPEED		400000
 #define I2C_STANDARD_SPEED	100000
 
-#endif /* __SPR_I2C_H_ */
+#endif /* __DW_I2C_H_ */

index a54d534..2393bdf 100644
@@ -47,7 +47,7 @@
 
 /* I2C driver configuration */
 #define CONFIG_HARD_I2C
-#define CONFIG_SPEAR_I2C
+#define CONFIG_DW_I2C
 #define CONFIG_SYS_I2C_SPEED			400000
 #define CONFIG_SYS_I2C_SLAVE			0x02
 

similarity index 99%
rename from drivers/mtd/spr_smi.c
rename to drivers/mtd/st_smi.c
index c6ba951..5193c1c 100644
@@ -27,7 +27,7 @@
 
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/spr_smi.h>
+#include "st_smi.h"
 
 #if !defined(CONFIG_SYS_NO_FLASH)
 

similarity index 99%
rename from arch/arm/include/asm/arch-spear/spr_smi.h
rename to drivers/mtd/st_smi.h
index 0cca000..afab546 100644
@@ -21,8 +21,8 @@
  * MA 02111-1307 USA
  */
 
-#ifndef SPR_SMI_H
-#define SPR_SMI_H
+#ifndef ST_SMI_H
+#define ST_SMI_H
 
 /* 0xF800.0000 . 0xFBFF.FFFF	64MB	SMI (Serial Flash Mem) */
 /* 0xFC00.0000 . 0xFC1F.FFFF	2MB	SMI (Serial Flash Reg.) */

index 2393bdf..4aa0c15 100644
@@ -61,10 +61,10 @@
 #if defined(CONFIG_FLASH_PNOR)
 #define CONFIG_SPEAR_EMI			1
 #else
-#define CONFIG_SPEARSMI				1
+#define CONFIG_ST_SMI				1
 #endif
 
-#if defined(CONFIG_SPEARSMI)
+#if defined(CONFIG_ST_SMI)
 
 #define CONFIG_SYS_MAX_FLASH_BANKS		2
 #define CONFIG_SYS_FLASH_BASE			(0xF8000000)

@@ -130,7 +130,7 @@
  * U-Boot Environment placing definitions.
  */
 #if defined(CONFIG_ENV_IS_IN_FLASH)
-#ifdef CONFIG_SPEARSMI
+#ifdef CONFIG_ST_SMI
 /*
  * Environment is in serial NOR flash
  */

index a23169a..38b407f 100644
@@ -33,8 +33,8 @@
 #include <usb/musb_udc.h>
 #elif defined(CONFIG_PXA27X)
 #include <usb/pxa27x_udc.h>
-#elif defined(CONFIG_SPEAR3XX) || defined(CONFIG_SPEAR600)
-#include <usb/spr_udc.h>
+#elif defined(CONFIG_DW_UDC)
+#include <usb/designware_udc.h>
 #endif
 
 #include <version_autogenerated.h>

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index 4aa0c15..c03520b 100644
@@ -36,14 +36,16 @@
 #define CONFIG_PHY_RESET_DELAY			(10000)		/* in usec */
 
 /* USBD driver configuration */
-#define CONFIG_SPEARUDC
+#define CONFIG_DW_UDC
 #define CONFIG_USB_DEVICE
 #define CONFIG_USB_TTY
 
 #define CONFIG_USBD_PRODUCT_NAME		"SPEAr SoC"
 #define CONFIG_USBD_MANUFACTURER		"ST Microelectronics"
 
+#if defined(CONFIG_USB_TTY)
 #define CONFIG_EXTRA_ENV_USBTTY			"usbtty=cdc_acm\0"
+#endif
 
 /* I2C driver configuration */
 #define CONFIG_HARD_I2C

similarity index 98%
rename from include/usb/spr_udc.h
rename to include/usb/designware_udc.h
index 2c332d5..ae98e8c 100644
@@ -21,8 +21,8 @@
  * MA 02111-1307 USA
  */
 
-#ifndef __SPR_UDC_H
-#define __SPR_UDC_H
+#ifndef __DW_UDC_H
+#define __DW_UDC_H
 
 /*
  * Defines for  USBD

@@ -227,4 +227,4 @@ void udc_startup_events(struct usb_device_instance *device);
 void udc_setup_ep(struct usb_device_instance *device, unsigned int ep,
 		  struct usb_endpoint_instance *endpoint);
 
-#endif /* __SPR_UDC_H */
+#endif /* __DW_UDC_H */

similarity index 95%
rename from include/configs/spear3xx.h
rename to include/configs/spear3xx_evb.h
index fde505c..f0c915e 100644
@@ -39,6 +39,16 @@
 #define CONFIG_SPEAR320				1
 #endif
 
+#if defined(CONFIG_MK_usbtty)
+#define CONFIG_SPEAR_USBTTY			1
+#endif
+
+#if defined(CONFIG_MK_nand)
+#define CONFIG_ENV_IS_IN_NAND			1
+#else
+#define CONFIG_ENV_IS_IN_FLASH			1
+#endif
+
 #include <configs/spear-common.h>
 
 /* Ethernet driver configuration */

similarity index 88%
rename from include/configs/spear6xx.h
rename to include/configs/spear6xx_evb.h
index 2532344..82d24df 100644
@@ -30,6 +30,16 @@
  */
 #define CONFIG_SPEAR600				1
 
+#if defined(CONFIG_MK_usbtty)
+#define CONFIG_SPEAR_USBTTY			1
+#endif
+
+#if defined(CONFIG_MK_nand)
+#define CONFIG_ENV_IS_IN_NAND			1
+#else
+#define CONFIG_ENV_IS_IN_FLASH			1
+#endif
+
 #include <configs/spear-common.h>
 
 /* Serial Configuration (PL011) */

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new file mode 100644
index 0000000..020ab2a
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2010
+ * Vipin Kumar, STMicroelectronics, <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_ARCH_SPEAR13XX_HARDWARE_H
+#define _ASM_ARCH_SPEAR13XX_HARDWARE_H
+
+#define CONFIG_SYS_USBD_BASE			(0xE1100000)
+#define CONFIG_SYS_PLUG_BASE			(0xE1200000)
+#define CONFIG_SYS_FIFO_BASE			(0xE1000800)
+#define CONFIG_SYS_SMI_BASE			(0xFC000000)
+#define CONFIG_SPEAR_TIMERBASE			(0xE0380000)
+#define CONFIG_SPEAR_MISCBASE			(0xE0700000)
+#define CONFIG_SYS_I2C_BASE			(0xE0280000)
+#define CONFIG_SPEAR_ETHBASE			(0xE2000000)
+#define CONFIG_SYS_FSMC_BASE			(0xB0000000)
+
+#define CONFIG_SYS_NAND_CLE			(1 << 16)
+#define CONFIG_SYS_NAND_ALE			(1 << 17)
+
+#endif /* _ASM_ARCH_SPEAR13XX_HARDWARE_H */

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new file mode 100644
index 0000000..98b9a6b
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2010
+ * Vipin Kumar, STMicroelectronics, <[email protected]>
+ *
+ * Based on arch/arm/include/asm/arch-omap3/sys_proto.h
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+u32 get_device_type(void);
+void invalidate_dcache(u32);
+void l2_cache_disable(void);
+void l2_cache_enable(void);
+
+#endif

index 020ab2a..e3dd6e5 100644
@@ -24,10 +24,10 @@
 #ifndef _ASM_ARCH_SPEAR13XX_HARDWARE_H
 #define _ASM_ARCH_SPEAR13XX_HARDWARE_H
 
-#define CONFIG_SYS_USBD_BASE			(0xE1100000)
-#define CONFIG_SYS_PLUG_BASE			(0xE1200000)
-#define CONFIG_SYS_FIFO_BASE			(0xE1000800)
-#define CONFIG_SYS_SMI_BASE			(0xFC000000)
+#define CONFIG_SYS_USBD_BASE			(0xE3800000)
+#define CONFIG_SYS_PLUG_BASE			(0xE2800000)
+#define CONFIG_SYS_FIFO_BASE			(0xE3000800)
+#define CONFIG_SYS_SMI_BASE			(0xEA000000)
 #define CONFIG_SPEAR_TIMERBASE			(0xE0380000)
 #define CONFIG_SPEAR_MISCBASE			(0xE0700000)
 #define CONFIG_SYS_I2C_BASE			(0xE0280000)

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index c03520b..1f7aff7 100644
@@ -57,7 +57,6 @@
 
 /* Timer, HZ specific defines */
 #define CONFIG_SYS_HZ				(1000)
-#define CONFIG_SYS_HZ_CLOCK			(8300000)
 
 /* Flash configuration */
 #if defined(CONFIG_FLASH_PNOR)

index aee44aa..3c20f3d 100644
@@ -497,16 +497,24 @@ static void dw_udc_epn_tx(int ep)
 {
 	struct usb_endpoint_instance *endpoint = dw_find_ep(ep);
 
+	if (!endpoint)
+		return;
+
 	/*
 	 * We need to transmit a terminating zero-length packet now if
 	 * we have sent all of the data in this URB and the transfer
 	 * size was an exact multiple of the packet size.
 	 */
-	if (endpoint && endpoint->tx_urb && endpoint->tx_urb->actual_length) {
-		if (endpoint->last == endpoint->tx_packetSize) {
-			/* handle zero length packet here */
-			writel(0x0, &inep_regs_p[ep].write_done);
-		}
+	if (endpoint->tx_urb &&
+	    (endpoint->last == endpoint->tx_packetSize) &&
+	    (endpoint->tx_urb->actual_length - endpoint->sent -
+	     endpoint->last == 0)) {
+		/* handle zero length packet here */
+		writel(0x0, &inep_regs_p[ep].write_done);
+
+	}
+
+	if (endpoint->tx_urb && endpoint->tx_urb->actual_length) {
 		/* retire the data that was just sent */
 		usbd_tx_complete(endpoint);
 		/*

@@ -548,8 +556,6 @@ int udc_init(void)
 
 	readl(&plug_regs_p->plug_pending);
 
-	udc_disconnect();
-
 	for (i = 0; i < UDC_INIT_MDELAY; i++)
 		udelay(1000);
 

@@ -561,10 +567,9 @@ int udc_init(void)
 	writel(~0x0, &udc_regs_p->endp_int_mask);
 
 	writel(DEV_CONF_FS_SPEED | DEV_CONF_REMWAKEUP | DEV_CONF_SELFPOW |
-	       /* Dev_Conf_SYNCFRAME | */
 	       DEV_CONF_PHYINT_16, &udc_regs_p->dev_conf);
 
-	writel(0x0, &udc_regs_p->dev_cntl);
+	writel(DEV_CNTL_SOFTDISCONNECT, &udc_regs_p->dev_cntl);
 
 	/* Clear all interrupts pending */
 	writel(DEV_INT_MSK, &udc_regs_p->dev_int);

@@ -588,6 +593,9 @@ void udc_setup_ep(struct usb_device_instance *device,
 	char *tt;
 	u32 endp_intmask;
 
+	if ((ep != 0) && (udc_device->device_state < STATE_ADDRESSED))
+		return;
+
 	tt = getenv("usbtty");
 	if (!tt)
 		tt = "generic";

@@ -647,9 +655,6 @@ void udc_setup_ep(struct usb_device_instance *device,
 		writel(packet_size | ((buffer_size / sizeof(int)) << 16),
 		       &out_p->endp_maxpacksize);
 
-		writel((packet_size << 19) | ENDP_EPTYPE_CNTL,
-		       &udc_regs_p->udc_endp_reg[ep_num]);
-
 	} else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
 		/* Setup the IN endpoint */
 		writel(0x0, &in_p->endp_status);

@@ -708,7 +713,17 @@ void udc_setup_ep(struct usb_device_instance *device,
 /* Turn on the USB connection by enabling the pullup resistor */
 void udc_connect(void)
 {
-	u32 plug_st;
+	u32 plug_st, dev_cntl;
+
+	dev_cntl = readl(&udc_regs_p->dev_cntl);
+	dev_cntl |= DEV_CNTL_SOFTDISCONNECT;
+	writel(dev_cntl, &udc_regs_p->dev_cntl);
+
+	udelay(1000);
+
+	dev_cntl = readl(&udc_regs_p->dev_cntl);
+	dev_cntl &= ~DEV_CNTL_SOFTDISCONNECT;
+	writel(dev_cntl, &udc_regs_p->dev_cntl);
 
 	plug_st = readl(&plug_regs_p->plug_state);
 	plug_st &= ~(PLUG_STATUS_PHY_RESET | PLUG_STATUS_PHY_MODE);

@@ -720,6 +735,8 @@ void udc_disconnect(void)
 {
 	u32 plug_st;
 
+	writel(DEV_CNTL_SOFTDISCONNECT, &udc_regs_p->dev_cntl);
+
 	plug_st = readl(&plug_regs_p->plug_state);
 	plug_st |= (PLUG_STATUS_PHY_RESET | PLUG_STATUS_PHY_MODE);
 	writel(plug_st, &plug_regs_p->plug_state);

@@ -789,11 +806,6 @@ void dw_udc_plug_irq(void)
 		UDCDBG("device attached and powered");
 		udc_state_transition(udc_device->device_state, STATE_POWERED);
 	} else {
-		/*
-		 * USB cable detached
-		 * Reset the PHY and switch the mode.
-		 */
-		udc_disconnect();
 		writel(~0x0, &udc_regs_p->dev_int_mask);
 
 		UDCDBG("device detached or unpowered");

@@ -809,13 +821,18 @@ void dw_udc_dev_irq(void)
 	if (readl(&udc_regs_p->dev_int) & DEV_INT_USBRESET) {
 		writel(~0x0, &udc_regs_p->endp_int_mask);
 
-		udc_connect();
-
 		writel(readl(&inep_regs_p[0].endp_cntl) | ENDP_CNTL_FLUSH,
 		       &inep_regs_p[0].endp_cntl);
 
 		writel(DEV_INT_USBRESET, &udc_regs_p->dev_int);
 
+		/*
+		 * This endpoint0 specific register can be programmed only
+		 * after the phy clock is initialized
+		 */
+		writel((EP0_MAX_PACKET_SIZE << 19) | ENDP_EPTYPE_CNTL,
+				&udc_regs_p->udc_endp_reg[0]);
+
 		UDCDBG("device reset in progess");
 		udc_state_transition(udc_device->device_state, STATE_DEFAULT);
 	}

@@ -902,7 +919,7 @@ void dw_udc_endpoint_irq(void)
 		writel(ENDP0_INT_CTRLIN, &udc_regs_p->endp_int);
 	}
 
-	while (readl(&udc_regs_p->endp_int) & ENDP_INT_NONISOOUT_MSK) {
+	if (readl(&udc_regs_p->endp_int) & ENDP_INT_NONISOOUT_MSK) {
 		u32 epnum = 0;
 		u32 ep_int = readl(&udc_regs_p->endp_int) &
 		    ENDP_INT_NONISOOUT_MSK;