ARMV7: Enhance support for OMAP4

In addition to modifying the init routine to follow the TRM recommendations, this patch adds a retry count to two loops to avoid the possibility of infinite loops. It also corrects error message typos in the i2c_write routine.

Signed-off-by Steve Sakoman<[email protected]>

---
  arch/arm/include/asm/arch-omap3/i2c.h |    4 ++-
  drivers/i2c/omap24xx_i2c.c            |   37 ++++++++++++++++++++++----------
  drivers/i2c/omap24xx_i2c.h            |    4 +++
  3 files changed, 32 insertions(+), 13 deletions(-)

arch/arm/include/asm/arch-omap3/i2c.h +3 -1

index 7a4a73a..d2e7488 100644
@@ -34,7 +34,9 @@ struct i2c {
  	unsigned short stat;	/* 0x08 */
  	unsigned short res3;
  	unsigned short iv;	/* 0x0C */
-	unsigned short res4[3];
+	unsigned short res4;
+	unsigned short syss;	/* 0x10 */
+	unsigned short res4a;
  	unsigned short buf;	/* 0x14 */
  	unsigned short res5;
  	unsigned short cnt;	/* 0x18 */

drivers/i2c/omap24xx_i2c.c +0 -0

index 3256133..a91fe55 100644

drivers/i2c/omap24xx_i2c.c +11 -4

  	/* Only handle standard, fast and high speeds */
  	if ((speed != OMAP_I2C_STANDARD)&&

@@ -102,15 +103,22 @@ void i2c_init (int speed, int slaveadd)
  		sclh = (unsigned int)fssclh;
  	}
 
-	writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */
-	udelay(1000);
-	writew(0x0,&i2c_base->sysc); /* will probably self clear but */
-
  	if (readw (&i2c_base->con)&  I2C_CON_EN) {
  		writew (0,&i2c_base->con);
  		udelay (50000);
  	}
 
+	writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */
+	udelay(1000);
+
+	writew(I2C_CON_EN,&i2c_base->con);
+	while (!(readw(&i2c_base->syss)&  I2C_SYSS_RDONE)&&  reset_timeout--) {
+		if (reset_timeout<= 0)
+			printf("ERROR: Timeout in soft-reset\n");
+		udelay(1000);
+	}
+
+	writew(0,&i2c_base->con);
  	writew(psc,&i2c_base->psc);
  	writew(scll,&i2c_base->scll);
  	writew(sclh,&i2c_base->sclh);

drivers/i2c/omap24xx_i2c.c +0 -1

-		wait_for_bb ();
  		/* set slave address */
  		writew (devaddr,&i2c_base->sa);
  		/* read one byte from slave */

@@ -190,11 +200,14 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
  		}
 

drivers/i2c/omap24xx_i2c.c +1 -1

  		}
  	}

@@ -276,7 +289,7 @@ static void flush_fifo(void)
  	 * you get a bus error
  	 */
  	while(1){
-		stat = readw(&i2c_base->stat);
+		stat = readw(&i2c_base->stat)&  I2C_STAT_RRDY;
  		if(stat == I2C_STAT_RRDY){
  #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
      defined(CONFIG_OMAP44XX)

drivers/i2c/omap24xx_i2c.c +0 -0

  			i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  			return 1;
  		}

drivers/i2c/omap24xx_i2c.h +0 -0

index 92a3416..650e33a 100644

Steve,
just minor nitpick below:

Quoted 30 lines · Steve Sakoman

In addition to modifying the init routine to follow the TRM recommendations, this patch adds a retry count to two loops to avoid the possibility of infinite loops. ?It also corrects error message typos in the i2c_write routine.

Signed-off-by ?Steve Sakoman<[email protected]>

---

? arch/arm/include/asm/arch-omap3/i2c.h | ? ?4 ++-
? drivers/i2c/omap24xx_i2c.c ? ? ? ? ? ?| ? 37 ++++++++++++++++++++++----------
? drivers/i2c/omap24xx_i2c.h ? ? ? ? ? ?| ? ?4 +++

? 3 files changed, 32 insertions(+), 13 deletions(-)

arch/arm/include/asm/arch-omap3/i2c.h +0 -0

index 7a4a73a..d2e7488 100644
@@ -34,7 +34,9 @@ struct i2c {

? ? ? unsigned short stat; ? ?/* 0x08 */
? ? ? unsigned short res3;
? ? ? unsigned short iv; ? ? ?/* 0x0C */
- ? ? unsigned short res4[3];
+ ? ? unsigned short res4;
+ ? ? unsigned short syss; ? ?/* 0x10 */
+ ? ? unsigned short res4a;
? ? ? unsigned short buf; ? ? /* 0x14 */
? ? ? unsigned short res5;
? ? ? unsigned short cnt; ? ? /* 0x18 */

drivers/i2c/omap24xx_i2c.c +0 -1

index 3256133..a91fe55 100644
--- a/drivers/i2c/omap24xx_i2c.c

drivers/i2c/omap24xx_i2c.c void i2c_init (int speed, int slaveadd) · line 44

Quoted 6 lines

+++ b/drivers/i2c/omap24xx_i2c.c

drivers/i2c/omap24xx_i2c.c +1 -0

@@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd)
 ? ? ? int psc, fsscll, fssclh;
 ? ? ? int hsscll = 0, hssclh = 0;
 ? ? ? u32 scll, sclh;
+ ? ? int reset_timeout = 10;

I am guessing we ?can life with a u8, we timeout in 10ms.. would asking for a #define I2C_TIMEOUT_RESET is too much here?

Quoted 31 lines

? ? ? /* Only handle standard, fast and high speeds */ ? ? ? if ((speed != OMAP_I2C_STANDARD)&&

drivers/i2c/omap24xx_i2c.c +11 -4

@@ -102,15 +103,22 @@ void i2c_init (int speed, int slaveadd)
 ? ? ? ? ? ? ? sclh = (unsigned int)fssclh;
 ? ? ? }
 
- ? ? writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */
- ? ? udelay(1000);
- ? ? writew(0x0,&i2c_base->sysc); /* will probably self clear but */
-
 ? ? ? if (readw (&i2c_base->con)& ?I2C_CON_EN) {
 ? ? ? ? ? ? ? writew (0,&i2c_base->con);
 ? ? ? ? ? ? ? udelay (50000);
 ? ? ? }
 
+ ? ? writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */
+ ? ? udelay(1000);
+
+ ? ? writew(I2C_CON_EN,&i2c_base->con);
+ ? ? while (!(readw(&i2c_base->syss)& ?I2C_SYSS_RDONE)&& ?reset_timeout--) {
+ ? ? ? ? ? ? if (reset_timeout<= 0)
+ ? ? ? ? ? ? ? ? ? ? printf("ERROR: Timeout in soft-reset\n");
+ ? ? ? ? ? ? udelay(1000);
+ ? ? }
+
+ ? ? writew(0,&i2c_base->con);
 ? ? ? writew(psc,&i2c_base->psc);
 ? ? ? writew(scll,&i2c_base->scll);
 ? ? ? writew(sclh,&i2c_base->sclh);

drivers/i2c/omap24xx_i2c.c static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) · line 145

Quoted 4 lines

drivers/i2c/omap24xx_i2c.c +1 -0

@@ -134,6 +142,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
 ? {
 ? ? ? int i2c_error = 0;
 ? ? ? u16 status;
+ ? ? u16 retries;

u8 sounds good here - this does not seem to take more than 10..

drivers/i2c/omap24xx_i2c.c static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) · line 171

Quoted 11 lines

? ? ? /* wait until bus not busy */
? ? ? wait_for_bb ();

drivers/i2c/omap24xx_i2c.c +1 -3

@@ -159,15 +168,16 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
 ? ? ? }
 
 ? ? ? if (!i2c_error) {
- ? ? ? ? ? ? /* free bus, otherwise we can't use a combined transction */
- ? ? ? ? ? ? writew (0,&i2c_base->con);
- ? ? ? ? ? ? while (readw (&i2c_base->stat) || (readw (&i2c_base->con)& ?I2C_CON_MST)) {
+ ? ? ? ? ? ? retries = 10;

#define sounds nice here..

Quoted 8 lines

drivers/i2c/omap24xx_i2c.c +2 -0

+ ? ? ? ? ? ? while ((readw(&i2c_base->stat)& ?0x14) ||
+ ? ? ? ? ? ? ? ? ? ? (readw(&i2c_base->con)& ?I2C_CON_MST)) {
 ? ? ? ? ? ? ? ? ? ? ? udelay (10000);

? ? ? ? ? ? ? ? ? ? ? /* Have to clear pending interrupt to clear I2C_STAT */ ? ? ? ? ? ? ? ? ? ? ? writew (0xFFFF,&i2c_base->stat);
+ ? ? ? ? ? ? ? ? ? ? if (!retries--)
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? break;
? ? ? ? ? ? ? }

do we just proceed in case of retry timeout?

Quoted 8 lines

- ? ? ? ? ? ? wait_for_bb ();
? ? ? ? ? ? ? /* set slave address */
? ? ? ? ? ? ? writew (devaddr,&i2c_base->sa);
? ? ? ? ? ? ? /* read one byte from slave */

drivers/i2c/omap24xx_i2c.c +0 -0

@@ -190,11 +200,14 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
 ? ? ? ? ? ? ? }
 

drivers/i2c/omap24xx_i2c.c static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) · line 211

Quoted 10 lines

drivers/i2c/omap24xx_i2c.c +3 -0

 ? ? ? ? ? ? ? if (!i2c_error) {
+ ? ? ? ? ? ? ? ? ? ? retries = 10;
 ? ? ? ? ? ? ? ? ? ? ? writew (I2C_CON_EN,&i2c_base->con);
 ? ? ? ? ? ? ? ? ? ? ? while (readw (&i2c_base->stat)
 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?|| (readw (&i2c_base->con)& ?I2C_CON_MST)) {
 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? udelay (10000);
 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? writew (0xFFFF,&i2c_base->stat);
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? if (!retries--)
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? break;
 ? ? ? ? ? ? ? ? ? ? ? }

same comment on retry failure here..

Quoted 15 lines

drivers/i2c/omap24xx_i2c.c +0 -0

 ? ? ? ? ? ? ? }
 ? ? ? }

@@ -276,7 +289,7 @@ static void flush_fifo(void)

? ? ? ?* you get a bus error
? ? ? ?*/
? ? ? while(1){
- ? ? ? ? ? ? stat = readw(&i2c_base->stat);
+ ? ? ? ? ? ? stat = readw(&i2c_base->stat)& ?I2C_STAT_RRDY; ? ? ? ? ? ? ? if(stat == I2C_STAT_RRDY){
? #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
? ? ? defined(CONFIG_OMAP44XX)

drivers/i2c/omap24xx_i2c.c +0 -0

@@ -357,18 +370,18 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
 ? ? ? int i;
 

drivers/i2c/omap24xx_i2c.c int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) · line 373

Quoted 3 lines

drivers/i2c/omap24xx_i2c.c +1 -1

 ? ? ? if (alen> ?1) {
- ? ? ? ? ? ? printf ("I2C read: addr len %d not supported\n", alen);
+ ? ? ? ? ? ? printf("I2C write: addr len %d not supported\n", alen);

err.. do we need this change?

Quoted 34 lines · Nishanth Menon

Steve,
just minor nitpick below:

Quoted 30 lines · Steve Sakoman

In addition to modifying the init routine to follow the TRM recommendations, this patch adds a retry count to two loops to avoid the possibility of infinite loops. It also corrects error message typos in the i2c_write routine.

Signed-off-by Steve Sakoman<[email protected]>

---
   arch/arm/include/asm/arch-omap3/i2c.h |    4 ++-
   drivers/i2c/omap24xx_i2c.c            |   37 ++++++++++++++++++++++----------
   drivers/i2c/omap24xx_i2c.h            |    4 +++
   3 files changed, 32 insertions(+), 13 deletions(-)

arch/arm/include/asm/arch-omap3/i2c.h +3 -1

index 7a4a73a..d2e7488 100644
@@ -34,7 +34,9 @@ struct i2c {
       unsigned short stat;    /* 0x08 */
       unsigned short res3;
       unsigned short iv;      /* 0x0C */
-     unsigned short res4[3];
+     unsigned short res4;
+     unsigned short syss;    /* 0x10 */
+     unsigned short res4a;
       unsigned short buf;     /* 0x14 */
       unsigned short res5;
       unsigned short cnt;     /* 0x18 */

drivers/i2c/omap24xx_i2c.c +0 -1

index 3256133..a91fe55 100644
--- a/drivers/i2c/omap24xx_i2c.c

Quoted 8 lines

drivers/i2c/omap24xx_i2c.c void i2c_init (int speed, int slaveadd) · line 44

Quoted 6 lines

+++ b/drivers/i2c/omap24xx_i2c.c

drivers/i2c/omap24xx_i2c.c +1 -0

@@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd)
       int psc, fsscll, fssclh;
       int hsscll = 0, hssclh = 0;
       u32 scll, sclh;
+     int reset_timeout = 10;

I am guessing we can life with a u8, we timeout in 10ms.. would asking for a #define I2C_TIMEOUT_RESET is too much here?

I can't imagine why we would ever want to make this a config option!

In normal operation the loop is only traversed one time. I only added the timeout to prevent the possibility of an infinite loop.

Quoted 57 lines

Quoted 32 lines

drivers/i2c/omap24xx_i2c.c +11 -4

       /* Only handle standard, fast and high speeds */
       if ((speed != OMAP_I2C_STANDARD)&&

@@ -102,15 +103,22 @@ void i2c_init (int speed, int slaveadd)
               sclh = (unsigned int)fssclh;
       }
 
-     writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */
-     udelay(1000);
-     writew(0x0,&i2c_base->sysc); /* will probably self clear but */
-
       if (readw (&i2c_base->con)&    I2C_CON_EN) {
               writew (0,&i2c_base->con);
               udelay (50000);
       }
 
+     writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */
+     udelay(1000);
+
+     writew(I2C_CON_EN,&i2c_base->con);
+     while (!(readw(&i2c_base->syss)&    I2C_SYSS_RDONE)&&    reset_timeout--) {
+             if (reset_timeout<= 0)
+                     printf("ERROR: Timeout in soft-reset\n");
+             udelay(1000);
+     }
+
+     writew(0,&i2c_base->con);
       writew(psc,&i2c_base->psc);
       writew(scll,&i2c_base->scll);
       writew(sclh,&i2c_base->sclh);

drivers/i2c/omap24xx_i2c.c static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) · line 145

Quoted 4 lines

drivers/i2c/omap24xx_i2c.c +1 -0

@@ -134,6 +142,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
   {
       int i2c_error = 0;
       u16 status;
+     u16 retries;

u8 sounds good here - this does not seem to take more than 10..

drivers/i2c/omap24xx_i2c.c static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) · line 171

Quoted 11 lines

drivers/i2c/omap24xx_i2c.c +1 -3

       /* wait until bus not busy */
       wait_for_bb ();

@@ -159,15 +168,16 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
       }
 
       if (!i2c_error) {
-             /* free bus, otherwise we can't use a combined transction */
-             writew (0,&i2c_base->con);
-             while (readw (&i2c_base->stat) || (readw (&i2c_base->con)&    I2C_CON_MST)) {
+             retries = 10;

#define sounds nice here..

Quoted 8 lines

drivers/i2c/omap24xx_i2c.c +4 -0

+             while ((readw(&i2c_base->stat)&    0x14) ||
+                     (readw(&i2c_base->con)&    I2C_CON_MST)) {
                       udelay (10000);
                       /* Have to clear pending interrupt to clear I2C_STAT */
                       writew (0xFFFF,&i2c_base->stat);
+                     if (!retries--)
+                             break;
               }

Quoted 1 line

do we just proceed in case of retry timeout?

Yes. Again this timeout was added to prevent an infinite loop hang.

Perhaps an error message if the timeout is triggered?

Quoted 9 lines

Quoted 9 lines

drivers/i2c/omap24xx_i2c.c +0 -1

-             wait_for_bb ();
               /* set slave address */
               writew (devaddr,&i2c_base->sa);
               /* read one byte from slave */

@@ -190,11 +200,14 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
               }
 

Quoted 11 lines

drivers/i2c/omap24xx_i2c.c static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) · line 211

Quoted 10 lines

drivers/i2c/omap24xx_i2c.c +3 -0

               if (!i2c_error) {
+                     retries = 10;
                       writew (I2C_CON_EN,&i2c_base->con);
                       while (readw (&i2c_base->stat)
                              || (readw (&i2c_base->con)&    I2C_CON_MST)) {
                               udelay (10000);
                               writew (0xFFFF,&i2c_base->stat);
+                             if (!retries--)
+                                     break;
                       }

same comment on retry failure here..

Same response -- would you like to see an error message if the timeout is triggered?

Quoted 16 lines

Quoted 16 lines

drivers/i2c/omap24xx_i2c.c +1 -1

               }
       }

@@ -276,7 +289,7 @@ static void flush_fifo(void)
        * you get a bus error
        */
       while(1){
-             stat = readw(&i2c_base->stat);
+             stat = readw(&i2c_base->stat)&    I2C_STAT_RRDY;
               if(stat == I2C_STAT_RRDY){
   #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
       defined(CONFIG_OMAP44XX)

@@ -357,18 +370,18 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
       int i;
 

Quoted 4 lines

drivers/i2c/omap24xx_i2c.c int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) · line 373

Quoted 3 lines

drivers/i2c/omap24xx_i2c.c +1 -1

       if (alen>    1) {
-             printf ("I2C read: addr len %d not supported\n", alen);
+             printf("I2C write: addr len %d not supported\n", alen);

err.. do we need this change?

I think so -- otherwise the i2c_write function is printing messages claiming to come from i2c_read! Same for the other messages you flagged.

Regards,

Steve

Quoted 15 lines

Quoted 4 lines

Quoted 4 lines

drivers/i2c/omap24xx_i2c.c +0 -0

index 3256133..a91fe55 100644

Quoted 8 lines

drivers/i2c/omap24xx_i2c.c void i2c_init (int speed, int slaveadd) · line 44

Quoted 5 lines

drivers/i2c/omap24xx_i2c.c +1 -0

@@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd)
 ? ? ? int psc, fsscll, fssclh;
 ? ? ? int hsscll = 0, hssclh = 0;
 ? ? ? u32 scll, sclh;
+ ? ? int reset_timeout = 10;

I am guessing we ?can life with a u8, we timeout in 10ms.. would asking for a #define I2C_TIMEOUT_RESET is too much here?

I can't imagine why we would ever want to make this a config option!

Quoted 2 lines

In normal operation the loop is only traversed one time. ?I only added the timeout to prevent the possibility of an infinite loop.

not as a config option, but a #define in the C file so that it is readable, the 10 makes not much sense at a glance.. but as I mentioned, it is just a nitpick.. it just helps to quickly figure out which are the timeouts used in the driver.. I mean we cant proceed with i2c_init or use it as i2c master (aka no point in using the driver) if that happens in the system rt?

Quoted 5 lines

Quoted 4 lines

drivers/i2c/omap24xx_i2c.c void i2c_init (int speed, int slaveadd) · line 45

Quoted 2 lines

drivers/i2c/omap24xx_i2c.c +1 -1

- ? ? ? ? ? ? printf ("I2C read: addr len %d not supported\n", alen);
+ ? ? ? ? ? ? printf("I2C write: addr len %d not supported\n", alen);

err.. do we need this change?

Quoted 4 lines

I think so -- otherwise the i2c_write function is printing messages claiming to come from i2c_read! ?Same for the other messages you flagged.

Apologies on not being clear - I dont have a problem with the print as such, BUT, do we need a diff here which changes printf ("... to printf("... ? makes no reason why I need that for reliable OMAP4 operation :D..

Quoted 15 lines · Nishanth Menon

Quoted 15 lines

Quoted 4 lines

Quoted 4 lines

drivers/i2c/omap24xx_i2c.c +0 -0

index 3256133..a91fe55 100644

Quoted 8 lines

drivers/i2c/omap24xx_i2c.c void i2c_init (int speed, int slaveadd) · line 44

Quoted 5 lines

drivers/i2c/omap24xx_i2c.c +1 -0

@@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd)
 ? ? ? int psc, fsscll, fssclh;
 ? ? ? int hsscll = 0, hssclh = 0;
 ? ? ? u32 scll, sclh;
+ ? ? int reset_timeout = 10;

I am guessing we ?can life with a u8, we timeout in 10ms.. would asking for a #define I2C_TIMEOUT_RESET is too much here?

I can't imagine why we would ever want to make this a config option!

Quoted 8 lines

Quoted 2 lines

In normal operation the loop is only traversed one time. ?I only added the timeout to prevent the possibility of an infinite loop.

not as a config option, but a #define in the C file so that it is readable, the 10 makes not much sense at a glance.. but as I mentioned, it is just a nitpick.. it just helps to quickly figure out which are the timeouts used in the driver.. I mean we cant proceed with i2c_init or use it as i2c master (aka no point in using the driver) if that happens in the system rt?

OK, I will submit a version 2 with a #define for the timeout/retry count.

Quoted 5 lines

Quoted 5 lines

Quoted 4 lines

drivers/i2c/omap24xx_i2c.c void i2c_init (int speed, int slaveadd) · line 45

Quoted 2 lines

drivers/i2c/omap24xx_i2c.c +1 -1

- ? ? ? ? ? ? printf ("I2C read: addr len %d not supported\n", alen);
+ ? ? ? ? ? ? printf("I2C write: addr len %d not supported\n", alen);

err.. do we need this change?

Quoted 8 lines

Quoted 4 lines

I think so -- otherwise the i2c_write function is printing messages claiming to come from i2c_read! ?Same for the other messages you flagged.

Apologies on not being clear - I dont have a problem with the print as such, BUT, do we need a diff here which changes printf ("... to printf("... ? makes no reason why I need that for reliable OMAP4 operation :D..

The message is clearly wrong, but your point is well taken: ?an erroneous error message fix doesn't really belong in a patch for reliable operation on OMAP4.

Version 2 of this patch will address only the reliability issues and your request for a timeout #define.

I will then do a subsequent patch (not part of this series) to fix erroneous error messages, potential infinite loops, and a variety of whitespace and style issues.

Regards,

Steve

Specify vram on command line, remove erroneous call to nandboot in the boot script, add CONFIG_BOOTDELAY

Signed-off-by Steve Sakoman<[email protected]>

---
  include/configs/omap4_panda.h   |    5 ++++-
  include/configs/omap4_sdp4430.h |    5 ++++-
  2 files changed, 8 insertions(+), 2 deletions(-)

include/configs/omap4_panda.h +0 -0

index 1d76467..51c3b44 100644

include/configs/omap4_panda.h +2 -0

  /* allow overwriting serial config and ethaddr */
  #define CONFIG_ENV_OVERWRITE
 

@@ -160,10 +162,12 @@
  	"loadaddr=0x82000000\0" \
  	"console=ttyS2,115200n8\0" \
  	"usbtty=cdc_acm\0" \
+	"vram=16M\0" \
  	"mmcdev=1\0" \
  	"mmcroot=/dev/mmcblk0p2 rw\0" \
  	"mmcrootfstype=ext3 rootwait\0" \
  	"mmcargs=setenv bootargs console=${console} " \
+		"vram=${vram} " \
  		"root=${mmcroot} " \
  		"rootfstype=${mmcrootfstype}\0" \
  	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \

include/configs/omap4_panda.h +0 -0

  			"fi; " \
  		"fi; " \
  	"fi"

include/configs/omap4_sdp4430.h +4 -1

index e9909f9..2643e43 100644
@@ -154,6 +154,8 @@
   * Environment setup
   */
 
+#define CONFIG_BOOTDELAY		5
+
  /* allow overwriting serial config and ethaddr */
  #define CONFIG_ENV_OVERWRITE
 

@@ -161,10 +163,12 @@
  	"loadaddr=0x82000000\0" \
  	"console=ttyS2,115200n8\0" \
  	"usbtty=cdc_acm\0" \
+	"vram=16M\0" \
  	"mmcdev=1\0" \
  	"mmcroot=/dev/mmcblk0p2 rw\0" \
  	"mmcrootfstype=ext3 rootwait\0" \
  	"mmcargs=setenv bootargs console=${console} " \
+		"vram=${vram} " \
  		"root=${mmcroot} " \
  		"rootfstype=${mmcrootfstype}\0" \
  	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \

@@ -182,7 +186,6 @@
  		"else " \
  			"if run loaduimage; then " \
  				"run mmcboot; " \
-			"else run nandboot; " \
  			"fi; " \
  		"fi; " \
  	"fi"