Add support WP on SMDKV210 and SDHCI_QUIRK_NO_WP_BIT quirk

PATCH Superseded Kukjin Kim 5 participants 13 messages Jul 23, 2010 – Jul 28, 2010

Subsystems (6)

Arm (32-bit) Arm sub-architectures Arm Samsung Exynos MMC, SD and SDIO +2 more subsystems

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Kukjin Kim

author

2010-07-23 11:56 UTC #0 lore raw

v3 cover Add support WP on SMDKV210 and SDHCI_QUIRK_NO_WP_BIT quirk

This patch adds support SDMMC write protection pin on SMDKV210.

Changes since v2:
Addressed comments from Marek Szyprowski

- modified wp_gpio checking method for support gpio number 0.
- removed unnecessary checking in dev-hsmmc.c

Changes since v1:
Addressed comments from Ben Dooks, Maurus Cuelenaere and Kyungmin Park

- just pass gpio numbers for support WP as Ben's suggestion
- use the gpio layer for specific machine
- use s3c_sdhcix_set_platdata() in machine_init()
- removed unnecessary EXPORT_SYMBOL

Note: Depends on following patch set

[PATCH v2 1/2] ARM: SAMSUNG: Add device definition for HSMMC3
[PATCH v2 2/2] ARM: S5PV210: Add support HSMMC on SMDKV210
[PATCH v4] Samsung: add new card detection methods in s3c-sdhci driver (platform part) from Marek Szyprowski [PATCH v4] sdhci-s3c: add support for new card detection methods (driver part) from Marek Szyprowski

And this patch set includes the following patches:

[PATCH v3 1/2] ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection [PATCH v3 2/2] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210 [PATCH v3 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

Kukjin Kim

author

2010-07-23 11:56 UTC #1 lore raw

PATCH v3 1/3 ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

From: Hyuk Lee <[email protected]>

This patch adds the members of platdata which is wp_gpio. The wp_gpio is a gpio_number which is connected with WP pin of SD Slot.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 arch/arm/plat-samsung/dev-hsmmc.c          |    1 +
 arch/arm/plat-samsung/dev-hsmmc1.c         |    1 +
 arch/arm/plat-samsung/dev-hsmmc2.c         |    1 +
 arch/arm/plat-samsung/dev-hsmmc3.c         |    1 +
 arch/arm/plat-samsung/include/plat/sdhci.h |    2 ++
 5 files changed, 6 insertions(+), 0 deletions(-)

arch/arm/plat-samsung/dev-hsmmc.c +1 -0

index b0f93f1..077d98d 100644
@@ -65,6 +65,7 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;

arch/arm/plat-samsung/dev-hsmmc1.c +1 -0

index 1504fd8..b298514 100644
@@ -65,6 +65,7 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;

arch/arm/plat-samsung/dev-hsmmc2.c +1 -0

index b28ef17..d419da7 100644
@@ -66,6 +66,7 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;

arch/arm/plat-samsung/dev-hsmmc3.c +1 -0

index 85aaf0f..658456d 100644
@@ -69,6 +69,7 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;

arch/arm/plat-samsung/include/plat/sdhci.h +2 -0

index 7c21a7c..1ad698f 100644
@@ -33,6 +33,7 @@ enum cd_types {
  * @max_width: The maximum number of data bits supported.
  * @host_caps: Standard MMC host capabilities bit field.
  * @cd_type: Type of Card Detection method (see cd_types enum above)
+ * @wp_gpio: The gpio number using for WP.
  * @ext_cd_init: Initialize external card detect subsystem. Called on
  *		 sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.
  *		 notify_func argument is a callback to the sdhci-s3c driver

@@ -62,6 +63,7 @@ struct s3c_sdhci_platdata {
 
 	char		**clocks;	/* set of clock sources */
 
+	int		wp_gpio;
 	int		ext_cd_gpio;
 	bool		ext_cd_gpio_invert;
 	int	(*ext_cd_init)(void (*notify_func)(struct platform_device *,

Signature · 1 line

1.6.2.5

Kukjin Kim

author

2010-07-23 11:56 UTC #2 lore raw

PATCH v3 2/3 ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

In reply to Kukjin Kim

From: Hyuk Lee <[email protected]>

S5PV210 HSMMC host controller doesn't have the Write Protection pin which should be connnected with SDMMC card WP pin. So send the allocated GPIO number which is connected with WP pin of SD slot in order to implement get_ro function in sdhci-s3c.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 arch/arm/mach-s5pv210/mach-smdkv210.c |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)

arch/arm/mach-s5pv210/mach-smdkv210.c +22 -0

index d20adf7..e573beb 100644
@@ -12,6 +12,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/serial_core.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>

@@ -29,6 +30,7 @@
 #include <plat/ts.h>
 #include <plat/ata.h>
 #include <plat/keypad.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

@@ -118,6 +120,22 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
 	.oversampling_shift	= 2,
 };
 
+static struct s3c_sdhci_platdata smdkv210_hsmmc0_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH0(7),
+};
+
+static struct s3c_sdhci_platdata smdkv210_hsmmc1_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH0(7),
+};
+
+static struct s3c_sdhci_platdata smdkv210_hsmmc2_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH3(1),
+};
+
+static struct s3c_sdhci_platdata smdkv210_hsmmc3_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH1(0),
+};
+
 static void __init smdkv210_map_io(void)
 {
 	s5p_init_io(NULL, 0, S5P_VA_CHIPID);

@@ -129,6 +147,10 @@ static void __init smdkv210_machine_init(void)
 {
 	samsung_keypad_set_platdata(&smdkv210_keypad_data);
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci0_set_platdata(&smdkv210_hsmmc0_pdata);
+	s3c_sdhci1_set_platdata(&smdkv210_hsmmc1_pdata);
+	s3c_sdhci2_set_platdata(&smdkv210_hsmmc2_pdata);
+	s3c_sdhci3_set_platdata(&smdkv210_hsmmc3_pdata);
 	s3c_ide_set_platdata(&smdkv210_ide_pdata);
 
 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));

Signature · 1 line

1.6.2.5

Kukjin Kim

author

2010-07-23 11:56 UTC #3 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

In reply to Kukjin Kim

From: Hyuk Lee <[email protected]>

If host controller doesn't have WP pin which should be connnected with SDMMC card WP pin, can implement get_ro function with using the allocated gpio. In order to use this quirk wp_gpio in the platform data must be set.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 drivers/mmc/host/sdhci-s3c.c |   43 ++++++++++++++++++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     |    3 ++
 drivers/mmc/host/sdhci.h     |    3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)

drivers/mmc/host/sdhci-s3c.c +43 -0

index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>

@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 }
 
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *sc;
+	struct sdhci_host *host;
+
+	host = mmc_priv(mmc);
+	sc = sdhci_priv(host);
+
+	return gpio_get_value(sc->pdata->wp_gpio);
+}
+
+/**
+ * sdhci_s3c_cfg_wp - configure GPIO for WP pin
+ * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
+ *
+ * Configure GPIO for using WP line
+*/
+static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
+{
+	s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
+	s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
+}
+
+/**
  * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
  * @host: The SDHCI host being queried
  *

@@ -375,6 +406,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	if (pdata->cfg_gpio)
 		pdata->cfg_gpio(pdev, pdata->max_width);
 
+	if (gpio_is_valid(pdata->wp_gpio))
+		sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
+
 	host->hw_name = "samsung-hsmmc";
 	host->ops = &sdhci_s3c_ops;
 	host->quirks = 0;

@@ -408,6 +442,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
 			 SDHCI_QUIRK_32BIT_DMA_SIZE);
 
+	/* Controller's WP pin donsn't connected with SD card and there is an
+	 * allocated GPIO for getting WP data form SD card, use this quirk and
+	 * send the GPIO number in pdata->wp_gpio. */
+	host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
+
+	/* to configure gpio pin as a card write protection signal */
+	if (gpio_is_valid(pdata->wp_gpio))
+		sdhci_s3c_cfg_wp(pdata->wp_gpio);
+
 	ret = sdhci_add_host(host);
 	if (ret) {
 		dev_err(dev, "sdhci_add_host() failed\n");

drivers/mmc/host/sdhci.c +3 -0

index f9ca4c6..7fba401 100644
@@ -1198,6 +1198,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
 
 	host = mmc_priv(mmc);
 
+	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
+		return host->ops->get_ro(mmc);
+
 	spin_lock_irqsave(&host->lock, flags);
 
 	if (host->flags & SDHCI_DEVICE_DEAD)

drivers/mmc/host/sdhci.h +3 -0

index 0de8b38..dd9a233 100644
@@ -247,6 +247,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_MISSING_CAPS			(1<<28)
 /* Controller has nonstandard clock management */
 #define SDHCI_QUIRK_NONSTANDARD_MINCLOCK		(1<<29)
+/* Controller has no write-protect pin connected with SD card */
+#define SDHCI_QUIRK_NO_WP_BIT				(1<<30)
 
 	int			irq;		/* Device IRQ */
 	void __iomem *		ioaddr;		/* Mapped address */

@@ -321,6 +323,7 @@ struct sdhci_ops {
 	unsigned int	(*get_max_clock)(struct sdhci_host *host);
 	unsigned int	(*get_min_clock)(struct sdhci_host *host);
 	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
+	int		(*get_ro)(struct mmc_host *mmc);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS

Signature · 1 line

1.6.2.5

Maurus Cuelenaere

2010-07-23 12:12 UTC #4 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

Op 23-07-10 13:56, Kukjin Kim schreef:

Quoted 33 lines

From: Hyuk Lee <[email protected]>
If host controller doesn't have WP pin which should be connnected with SDMMC card WP pin, can implement get_ro function with using the allocated gpio. In order to use this quirk wp_gpio in the platform data must be set.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   43 ++++++++++++++++++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     |    3 ++
 drivers/mmc/host/sdhci.h     |    3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +4 -0
index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>
 
@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 }
 
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) · line 229

Quoted 10 lines

drivers/mmc/host/sdhci-s3c.c +10 -0

+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *sc;
+	struct sdhci_host *host;
+
+	host = mmc_priv(mmc);
+	sc = sdhci_priv(host);

This can be done as static initializer if you reverse the order above.

Quoted 3 lines

drivers/mmc/host/sdhci-s3c.c +3 -0
+
+	return gpio_get_value(sc->pdata->wp_gpio);
+}

Signature · 1 line

Maurus Cuelenaere

Kukjin Kim

author

2010-07-27 11:58 UTC #5 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

Quoted 33 lines · Maurus Cuelenaere

Op 23-07-10 13:56, Kukjin Kim schreef:
Quoted 10 lines
From: Hyuk Lee <[email protected]>
If host controller doesn't have WP pin which should be connnected with SDMMC card WP pin, can implement get_ro function with using the allocated gpio. In order to use this quirk wp_gpio in the platform data must be set.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   43
++++++++++++++++++++++++++++++++++++++++++
drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host,
Quoted 17 lines
 drivers/mmc/host/sdhci.c     |    3 ++
 drivers/mmc/host/sdhci.h     |    3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +1 -0
index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>
 
@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host,
unsigned int clock)
Quoted 2 lines
drivers/mmc/host/sdhci-s3c.c +0 -0
 }
 

Quoted 17 lines

Quoted 4 lines
drivers/mmc/host/sdhci-s3c.c +3 -0
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) · line 229
Quoted 10 lines
drivers/mmc/host/sdhci-s3c.c +10 -0
+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *sc;
+	struct sdhci_host *host;
+
+	host = mmc_priv(mmc);
+	sc = sdhci_priv(host);
This can be done as static initializer if you reverse the order above.

Could you please kindly explain about this?
Sorry, I cannot get the exactly meaning...

Quoted 5 lines

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) · line 232
Quoted 3 lines
drivers/mmc/host/sdhci-s3c.c +3 -0
+
+	return gpio_get_value(sc->pdata->wp_gpio);
+}
--

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

Maurus Cuelenaere

2010-07-27 16:18 UTC #6 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

Op 27-07-10 13:58, Kukjin Kim schreef:

Quoted 48 lines

Quoted 32 lines · Maurus Cuelenaere
Op 23-07-10 13:56, Kukjin Kim schreef:
Quoted 10 lines
From: Hyuk Lee <[email protected]>
If host controller doesn't have WP pin which should be connnected with SDMMC card WP pin, can implement get_ro function with using the allocated gpio. In order to use this quirk wp_gpio in the platform data must be set.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   43
++++++++++++++++++++++++++++++++++++++++++
drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host,
Quoted 17 lines
 drivers/mmc/host/sdhci.c     |    3 ++
 drivers/mmc/host/sdhci.h     |    3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +1 -0
index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>
 
@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host,
unsigned int clock)
Quoted 2 lines
drivers/mmc/host/sdhci-s3c.c +0 -0
 }
 
Quoted 15 lines
Quoted 4 lines
drivers/mmc/host/sdhci-s3c.c +3 -0
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) · line 229
Quoted 10 lines
drivers/mmc/host/sdhci-s3c.c +10 -0
+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *sc;
+	struct sdhci_host *host;
+
+	host = mmc_priv(mmc);
+	sc = sdhci_priv(host);
This can be done as static initializer if you reverse the order above.

Quoted 2 lines

Could you please kindly explain about this?
Sorry, I cannot get the exactly meaning...

+static int sdhci_s3c_get_ro(struct mmc_host *mmc) +{
+ struct sdhci_host *host = mmc_priv(mmc);
+ struct sdhci_s3c *sc = sdhci_priv(host);

Signature · 1 line

Maurus Cuelenaere

Kukjin Kim

author

2010-07-28 04:42 UTC #7 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

Quoted 56 lines · Maurus Cuelenaere

Op 27-07-10 13:58, Kukjin Kim schreef:
Quoted 5 lines
Quoted 4 lines · Maurus Cuelenaere
Op 23-07-10 13:56, Kukjin Kim schreef:
Quoted 3 lines
From: Hyuk Lee <[email protected]>
If host controller doesn't have WP pin which should be connnected with
SDMMC
Quoted 18 lines
Quoted 18 lines
Quoted 7 lines
card WP pin, can implement get_ro function with using the allocated gpio. In order to use this quirk wp_gpio in the platform data must be set.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   43
++++++++++++++++++++++++++++++++++++++++++
Quoted 10 lines
 drivers/mmc/host/sdhci.c     |    3 ++
 drivers/mmc/host/sdhci.h     |    3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +0 -0
index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
Quoted 7 lines
Quoted 7 lines
drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host
Quoted 7 lines
drivers/mmc/host/sdhci-s3c.c +1 -0
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>
 
@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host
*host,
Quoted 20 lines
Quoted 18 lines
unsigned int clock)
Quoted 6 lines
drivers/mmc/host/sdhci-s3c.c +3 -0
 }
 
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) · line 229
Quoted 10 lines
drivers/mmc/host/sdhci-s3c.c +10 -0
+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *sc;
+	struct sdhci_host *host;
+
+	host = mmc_priv(mmc);
+	sc = sdhci_priv(host);
This can be done as static initializer if you reverse the order above.
Could you please kindly explain about this?
Sorry, I cannot get the exactly meaning...

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)

Quoted 4 lines

drivers/mmc/host/sdhci-s3c.c +4 -0

+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	struct sdhci_s3c *sc = sdhci_priv(host);

Hahaha, no need more words ;-)
Thanks for your kindly explanation.

I think, v4 patch seems to satisfy your suggestion...even though need v5 patch right now.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

Kyungmin Park

2010-07-23 12:50 UTC #8 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

In reply to Kukjin Kim

Quoted 81 lines · Kukjin Kim

From: Hyuk Lee <[email protected]>
If host controller doesn't have WP pin which should be connnected with SDMMC card WP pin, can implement get_ro function with using the allocated gpio. In order to use this quirk wp_gpio in the platform data must be set.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
?drivers/mmc/host/sdhci-s3c.c | ? 43 ++++++++++++++++++++++++++++++++++++++++++
?drivers/mmc/host/sdhci.c ? ? | ? ?3 ++
?drivers/mmc/host/sdhci.h ? ? | ? ?3 ++
?3 files changed, 49 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +0 -0
index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
?#include <linux/mmc/host.h>
+#include <plat/gpio-cfg.h>
?#include <plat/sdhci.h>
?#include <plat/regs-sdhci.h>
drivers/mmc/host/sdhci-s3c.c +0 -0
@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 ?}
 
?/**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
drivers/mmc/host/sdhci-s3c.c +25 -0
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+ ? ? ? struct sdhci_s3c *sc;
+ ? ? ? struct sdhci_host *host;
+
+ ? ? ? host = mmc_priv(mmc);
+ ? ? ? sc = sdhci_priv(host);
+
+ ? ? ? return gpio_get_value(sc->pdata->wp_gpio);
+}
+
+/**
+ * sdhci_s3c_cfg_wp - configure GPIO for WP pin
+ * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
+ *
+ * Configure GPIO for using WP line
+*/
+static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
+{
+ ? ? ? s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
+ ? ? ? s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
+}
+
+/**
?* sdhci_s3c_get_min_clock - callback to get minimal supported clock value ?* @host: The SDHCI host being queried
?*
drivers/mmc/host/sdhci-s3c.c +3 -0
@@ -375,6 +406,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 ? ? ? ?if (pdata->cfg_gpio)
 ? ? ? ? ? ? ? ?pdata->cfg_gpio(pdev, pdata->max_width);
 
+ ? ? ? if (gpio_is_valid(pdata->wp_gpio))
+ ? ? ? ? ? ? ? sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
+
 ? ? ? ?host->hw_name = "samsung-hsmmc";
 ? ? ? ?host->ops = &sdhci_s3c_ops;
 ? ? ? ?host->quirks = 0;
@@ -408,6 +442,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
? ? ? ?host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | ? ? ? ? ? ? ? ? ? ? ? ? SDHCI_QUIRK_32BIT_DMA_SIZE);
+ ? ? ? /* Controller's WP pin donsn't connected with SD card and there is an
+ ? ? ? ?* allocated GPIO for getting WP data form SD card, use this quirk and
+ ? ? ? ?* send the GPIO number in pdata->wp_gpio. */
+ ? ? ? host->quirks |= SDHCI_QUIRK_NO_WP_BIT;

drivers/mmc/host/sdhci-s3c.c

Quoted 5 lines

drivers/mmc/host/sdhci-s3c.c +5 -0

+
+ ? ? ? /* to configure gpio pin as a card write protection signal */
+ ? ? ? if (gpio_is_valid(pdata->wp_gpio))
+ ? ? ? ? ? ? ? sdhci_s3c_cfg_wp(pdata->wp_gpio);
+

Put it just one place like this.

if (gpio_is_valid(pdata->wp_gpio)) {
sdhci_s3c_cfg_wp(pdata->wp_gpio);
sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
}

It reduce the below quirks check by one. If you add the quriks as your patch, host->quirks are always true whether WP use or not.

Thank you,
Kyungmin Park

Quoted 46 lines

? ? ? ?ret = sdhci_add_host(host);
? ? ? ?if (ret) {
? ? ? ? ? ? ? ?dev_err(dev, "sdhci_add_host() failed\n");
drivers/mmc/host/sdhci.c +3 -0
index f9ca4c6..7fba401 100644
@@ -1198,6 +1198,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
 
 ? ? ? ?host = mmc_priv(mmc);
 
+ ? ? ? if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
+ ? ? ? ? ? ? ? return host->ops->get_ro(mmc);
+
 ? ? ? ?spin_lock_irqsave(&host->lock, flags);
 
 ? ? ? ?if (host->flags & SDHCI_DEVICE_DEAD)
drivers/mmc/host/sdhci.h +0 -0
index 0de8b38..dd9a233 100644
@@ -247,6 +247,8 @@ struct sdhci_host {
 ?#define SDHCI_QUIRK_MISSING_CAPS ? ? ? ? ? ? ? ? ? ? ? (1<<28)
?/* Controller has nonstandard clock management */ ?#define SDHCI_QUIRK_NONSTANDARD_MINCLOCK ? ? ? ? ? ? ? (1<<29)
drivers/mmc/host/sdhci.h +2 -0
+/* Controller has no write-protect pin connected with SD card */
+#define SDHCI_QUIRK_NO_WP_BIT ? ? ? ? ? ? ? ? ? ? ? ? ?(1<<30)
? ? ? ?int ? ? ? ? ? ? ? ? ? ? irq; ? ? ? ? ? ?/* Device IRQ */ ? ? ? ?void __iomem * ? ? ? ? ?ioaddr; ? ? ? ? /* Mapped address */
drivers/mmc/host/sdhci.h +1 -0
@@ -321,6 +323,7 @@ struct sdhci_ops {
 ? ? ? ?unsigned int ? ?(*get_max_clock)(struct sdhci_host *host);
 ? ? ? ?unsigned int ? ?(*get_min_clock)(struct sdhci_host *host);
 ? ? ? ?unsigned int ? ?(*get_timeout_clock)(struct sdhci_host *host);
+ ? ? ? int ? ? ? ? ? ? (*get_ro)(struct mmc_host *mmc);
 ?};
 
?#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
--
1.6.2.5
--
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Kukjin Kim

author

2010-07-27 12:21 UTC #9 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

Quoted 5 lines · Kyungmin Park

Quoted 3 lines · Kukjin Kim
From: Hyuk Lee <[email protected]>
If host controller doesn't have WP pin which should be connnected with

SDMMC

Quoted 1 line

Quoted 1 line
card WP pin, can implement get_ro function with using the allocated

gpio.

Quoted 17 lines

Quoted 6 lines
In order to use this quirk wp_gpio in the platform data must be set.
Signed-off-by Hyuk Lee <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
drivers/mmc/host/sdhci-s3c.c | 43
++++++++++++++++++++++++++++++++++++++++++
Quoted 10 lines
drivers/mmc/host/sdhci.c | 3 ++
drivers/mmc/host/sdhci.h | 3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +0 -0
index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 

Quoted 7 lines

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host
Quoted 7 lines
drivers/mmc/host/sdhci-s3c.c +1 -0
  #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
  #include <plat/sdhci.h>
  #include <plat/regs-sdhci.h>
 
@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host

*host,

Quoted 8 lines

unsigned int clock)

Quoted 7 lines

drivers/mmc/host/sdhci-s3c.c +4 -0

  }
 
  /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
+ * If the WP pin is connected with GPIO, can get the value which

indicates

Quoted 19 lines

drivers/mmc/host/sdhci-s3c.c +19 -0

+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+       struct sdhci_s3c *sc;
+       struct sdhci_host *host;
+
+       host = mmc_priv(mmc);
+       sc = sdhci_priv(host);
+
+       return gpio_get_value(sc->pdata->wp_gpio);
+}
+
+/**
+ * sdhci_s3c_cfg_wp - configure GPIO for WP pin
+ * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
+ *
+ * Configure GPIO for using WP line
+*/

Quoted 8 lines

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
Quoted 8 lines
drivers/mmc/host/sdhci-s3c.c +7 -0
+static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
+{
+       s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
+       s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
+}
+
+/**
  * sdhci_s3c_get_min_clock - callback to get minimal supported clock

value

Quoted 7 lines

drivers/mmc/host/sdhci-s3c.c static int __devinit sdhci_s3c_probe(struct
Quoted 3 lines
drivers/mmc/host/sdhci-s3c.c +0 -0
  * @host: The SDHCI host being queried
  *
@@ -375,6 +406,9 @@ static int __devinit sdhci_s3c_probe(struct
platform_device *pdev)
Quoted 3 lines
drivers/mmc/host/sdhci-s3c.c +0 -0
        if (pdata->cfg_gpio)
                pdata->cfg_gpio(pdev, pdata->max_width);
 

Quoted 12 lines

drivers/mmc/host/sdhci-s3c.c static int __devinit sdhci_s3c_probe(struct
Quoted 7 lines
drivers/mmc/host/sdhci-s3c.c +3 -0
+       if (gpio_is_valid(pdata->wp_gpio))
+               sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
+
        host->hw_name = "samsung-hsmmc";
        host->ops = &sdhci_s3c_ops;
        host->quirks = 0;
@@ -408,6 +442,15 @@ static int __devinit sdhci_s3c_probe(struct
platform_device *pdev)
Quoted 4 lines
host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE);
+ /* Controller's WP pin donsn't connected with SD card and there

is an

Quoted 1 line

Quoted 1 line
+ * allocated GPIO for getting WP data form SD card, use this

quirk and

Quoted 10 lines

drivers/mmc/host/sdhci-s3c.c static int __devinit sdhci_s3c_probe(struct platform_device *pdev) · line 453
Quoted 7 lines
+ * send the GPIO number in pdata->wp_gpio. */
+ host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
drivers/mmc/host/sdhci-s3c.c +5 -0
+
+       /* to configure gpio pin as a card write protection signal */
+       if (gpio_is_valid(pdata->wp_gpio))
+               sdhci_s3c_cfg_wp(pdata->wp_gpio);
+
Put it just one place like this.

Quoted 9 lines

if (gpio_is_valid(pdata->wp_gpio)) {
   sdhci_s3c_cfg_wp(pdata->wp_gpio);
sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
   host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
}
It reduce the below quirks check by one. If you add the quriks as your patch, host->quirks are always true whether WP use or not.

Ok..thanks for your suggestion.

Will re-submit as per your comments.

Quoted 39 lines

Thank you,
Kyungmin Park

Quoted 37 lines

ret = sdhci_add_host(host);
if (ret) {
dev_err(dev, "sdhci_add_host() failed\n");

drivers/mmc/host/sdhci.c +3 -0

index f9ca4c6..7fba401 100644
@@ -1198,6 +1198,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
 
        host = mmc_priv(mmc);
 
+       if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
+               return host->ops->get_ro(mmc);
+
        spin_lock_irqsave(&host->lock, flags);
 
        if (host->flags & SDHCI_DEVICE_DEAD)

drivers/mmc/host/sdhci.h +2 -0

index 0de8b38..dd9a233 100644
@@ -247,6 +247,8 @@ struct sdhci_host {
  #define SDHCI_QUIRK_MISSING_CAPS                       (1<<28)
  /* Controller has nonstandard clock management */
  #define SDHCI_QUIRK_NONSTANDARD_MINCLOCK               (1<<29)
+/* Controller has no write-protect pin connected with SD card */
+#define SDHCI_QUIRK_NO_WP_BIT                          (1<<30)

int irq; /* Device IRQ */ void __iomem * ioaddr; /* Mapped address */

drivers/mmc/host/sdhci.h +1 -0

@@ -321,6 +323,7 @@ struct sdhci_ops {
        unsigned int    (*get_max_clock)(struct sdhci_host *host);
        unsigned int    (*get_min_clock)(struct sdhci_host *host);
        unsigned int    (*get_timeout_clock)(struct sdhci_host *host);
+       int             (*get_ro)(struct mmc_host *mmc);
  };

Quoted 5 lines

Quoted 5 lines
drivers/mmc/host/sdhci.h +0 -1
  #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
--
1.6.2.5
--

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

nitin vishnoi

2010-07-28 03:17 UTC #10 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

I am porting the 2.6.33.6 kernel,which i took from kernel.org.I am trying to port it on samsung-s3c2451 board.
But i am not getting the shell prompt,due to getting the following error.Any body can tell due to what this error i am getting?

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.33.6 (root at ubntu-desktop) (gcc version 4.2.2) #12 Mon Jul 26 18:39:19 IST 2010
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: SMDK2450
Ignoring unrecognised tag 0x00000000
Memory policy: ECC disabled, Data cache writeback
CPU S3C2450 EVT3 (id 0x32450003)
SPA epll 80200102 Mpll 80640061 clkdiv0 557
S3C24XX Clocks, (c) 2004 Simtec Electronics
S3C2450: mpll on 800.000 MHz, cpu 400.000 MHz, mem 133.333 MHz, pclk 66.666 MHz
S3C2450: epll on 96.000 MHz, usb-bus 48.000 MHz
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256 Kernel command line: root=/dev/ram0 initrd=0x30800000,16M ramdisk=32768 init=/bin/sh console=ttySAC3,115200 mem=64M
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 64MB = 64MB total
Memory: 45432KB available (2588K code, 271K data, 116K init, 0K highmem) Hierarchical RCU implementation.
NR_IRQS:109
irq: clearing subpending status 02000006
irq: clearing subpending status 02000002
timer tcon=00000000, tcnt 28af, tcfg 00000f00,00000000, usec 00007ae2
Console: colour dummy device 80x30
console [ttySAC3] enabled
Calibrating delay loop... 398.95 BogoMIPS (lpj=997376) Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
NET: Registered protocol family 16
whats up blady
hello
entered machine init
S3C Power Management, Copyright 2004 Simtec Electronics
S3C2450: Initialising architecture
SPA s3c2450_init
S3C2450: IRQ Support
bio: create slab <bio-0> at 0
SCSI subsystem initialized
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 2, 16384 bytes) TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (no cpio magic); looks like an initrd Freeing initrd memory: 16384K
NetWinder Floating Point Emulator V0.97 (double precision)
JFFS2 version 2.2. (NAND) ?? 2001-2006 Red Hat, Inc.
ROMFS MTD (C) 2007 Red Hat, Inc.
msgmni has been set to 120
alg: No test for stdrng (krng)
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254) io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
brd: module loaded
loop: module loaded
Uniform Multi-Platform E-IDE driver
ide-gd driver 1.18
ide-cd driver 5.00
PPP generic driver version 2.4.2
PPP Deflate Compression module registered
PPP BSD Compression module registered
PPP MPPE Compression module registered
NET: Registered protocol family 24
SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
CSLIP: code copyright 1989 Regents of the University of California.
mice: PS/2 mouse device common for all mice
TCP cubic registered
RAMDISK: gzip image found at block 0
EXT2-fs (ram0): warning: maximal mount count reached, running e2fsck is recommended
VFS: Mounted root (ext2 filesystem) on device 1:0.
Freeing init memory: 116K
Warning: unable to open an initial console.

Kernel panic - not syncing: Attempted to kill init!
[<c002b900>] (unwind_backtrace+0x0/0xe0) from [<c003fe9c>]
(panic+0x40/0x12c)
[<c003fe9c>] (panic+0x40/0x12c) from [<c0042cac>] (do_exit+0x58/0x57c)
[<c0042cac>] (do_exit+0x58/0x57c) from [<c0043254>]
(do_group_exit+0x84/0xb8)
[<c0043254>] (do_group_exit+0x84/0xb8) from [<c004329c>]
(sys_exit_group+0x14/0x20)
[<c004329c>] (sys_exit_group+0x14/0x20) from [<c0025e80>]
(ret_fast_syscall+0x0/0x28)

Regards

Nitin
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Marek Szyprowski

2010-07-23 13:17 UTC #11 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

In reply to Kukjin Kim

Hello,

Quoted 67 lines · Kukjin Kim

From: Hyuk Lee <[email protected]>

If host controller doesn't have WP pin which should be connnected with SDMMC
card WP pin, can implement get_ro function with using the allocated gpio. In order to use this quirk wp_gpio in the platform data must be set.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 drivers/mmc/host/sdhci-s3c.c |   43
++++++++++++++++++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     |    3 ++
 drivers/mmc/host/sdhci.h     |    3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)

drivers/mmc/host/sdhci-s3c.c +31 -0

index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>

@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host
 *host, unsigned int clock)
 }
 
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *sc;
+	struct sdhci_host *host;
+
+	host = mmc_priv(mmc);
+	sc = sdhci_priv(host);
+
+	return gpio_get_value(sc->pdata->wp_gpio);
+}
+
+/**
+ * sdhci_s3c_cfg_wp - configure GPIO for WP pin
+ * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
+ *
+ * Configure GPIO for using WP line
+*/
+static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
+{
+	s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
+	s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
+}
+
+/**
  * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
  * @host: The SDHCI host being queried

drivers/mmc/host/sdhci-s3c.c static int __devinit sdhci_s3c_probe(struct · line 412

Quoted 7 lines

drivers/mmc/host/sdhci-s3c.c +3 -0

@@ -375,6 +406,9 @@ static int __devinit sdhci_s3c_probe(struct
 platform_device *pdev)
 	if (pdata->cfg_gpio)
 		pdata->cfg_gpio(pdev, pdata->max_width);
 
+	if (gpio_is_valid(pdata->wp_gpio))
+		sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
+

There is still a problem here, but the opposite to the issue from V1 of this patch.
If one apply the current version, he would need to set pdata->wp_gpio to -1 on all
existing platforms to get old behavior of the driver. Leaving it as zero means that
the driver will try to use GPA(0) for write protection.

Adding one more field to pdata (like "bool has_gpio_wp") seems to be unavoidable in this case imho.

Quoted 1 line

(snip)

Best regards
--
Marek Szyprowski
Samsung Poland R&D Center

Kukjin Kim

author

2010-07-27 12:21 UTC #12 lore raw

PATCH v3 3/3 sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

Quoted 10 lines · Marek Szyprowski

Hello,
Quoted 5 lines · Kukjin Kim
From: Hyuk Lee <[email protected]>
If host controller doesn't have WP pin which should be connnected with SDMMC
card WP pin, can implement get_ro function with using the allocated

gpio.

Quoted 27 lines

In order to use this quirk wp_gpio in the platform data must be set.

Signed-off-by Hyuk Lee <[email protected]>

Signed-off-by Kukjin Kim <[email protected]>

---
 drivers/mmc/host/sdhci-s3c.c |   43
++++++++++++++++++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     |    3 ++
 drivers/mmc/host/sdhci.h     |    3 ++
 3 files changed, 49 insertions(+), 0 deletions(-)

drivers/mmc/host/sdhci-s3c.c +1 -0

index 0d25285..0b75e57 100644
@@ -22,6 +22,7 @@
 
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>

@@ -213,6 +214,36 @@ static void sdhci_s3c_set_clock(struct sdhci_host
 *host, unsigned int clock)
 }

Quoted 5 lines

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
Quoted 5 lines
drivers/mmc/host/sdhci-s3c.c +4 -0
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
+ * If the WP pin is connected with GPIO, can get the value which

indicates

Quoted 19 lines

drivers/mmc/host/sdhci-s3c.c +19 -0

+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *sc;
+	struct sdhci_host *host;
+
+	host = mmc_priv(mmc);
+	sc = sdhci_priv(host);
+
+	return gpio_get_value(sc->pdata->wp_gpio);
+}
+
+/**
+ * sdhci_s3c_cfg_wp - configure GPIO for WP pin
+ * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
+ *
+ * Configure GPIO for using WP line
+*/

Quoted 8 lines

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
Quoted 8 lines
drivers/mmc/host/sdhci-s3c.c +7 -0
+static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
+{
+	s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
+	s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
+}
+
+/**
  * sdhci_s3c_get_min_clock - callback to get minimal supported clock

value

Quoted 7 lines

drivers/mmc/host/sdhci-s3c.c +0 -0

  * @host: The SDHCI host being queried

drivers/mmc/host/sdhci-s3c.c +0 -0

@@ -375,6 +406,9 @@ static int __devinit sdhci_s3c_probe(struct
 platform_device *pdev)
 	if (pdata->cfg_gpio)
 		pdata->cfg_gpio(pdev, pdata->max_width);

Quoted 5 lines

drivers/mmc/host/sdhci-s3c.c static int __devinit sdhci_s3c_probe(struct platform_device *pdev) · line 411
Quoted 3 lines
drivers/mmc/host/sdhci-s3c.c +3 -0
+	if (gpio_is_valid(pdata->wp_gpio))
+		sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
+
There is still a problem here, but the opposite to the issue from V1 of

this

Quoted 2 lines

patch.
If one apply the current version, he would need to set pdata->wp_gpio to

-1 on

Quoted 2 lines

all
existing platforms to get old behavior of the driver. Leaving it as zero

means

Quoted 7 lines

that
the driver will try to use GPA(0) for write protection.
Adding one more field to pdata (like "bool has_gpio_wp") seems to be unavoidable
in this case imho.

Ok..thanks for your review.

Will fix it like your card detection method soon.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.