avr32 fixes
cover avr32 fixes
This series fixes a trivial build issue, as well as a longstanding problem with the 'saveenv' command on ATNGW100.
It also includes a trivial enhancement to the exception reporting which I found very useful during debugging.
Hopefully this will make mainline u-boot useful again on AVR32. Without this fix, v2008.10 is the latest usable release.
The patches are based on v2010.06, but it merges fine with the latest upstream master. The AVR32 master branch currently contains a workaround which I plan to revert if these patches are acceptable.
Haavard Skinnemoen (3):
avr32: Add missing asm/unaligned.h header file
avr32: Print unrelocated PC on exception
avr32: Add simple paging support
arch/avr32/cpu/at32ap700x/Makefile | 2 +- arch/avr32/cpu/at32ap700x/mmu.c | 80 ++++++++++++++++++++ arch/avr32/cpu/exception.c | 3 +- arch/avr32/cpu/start.S | 19 +++-- arch/avr32/include/asm/arch-at32ap700x/addrspace.h | 5 +- arch/avr32/include/asm/arch-at32ap700x/mmu.h | 66 ++++++++++++++++ arch/avr32/include/asm/unaligned.h | 1 + arch/avr32/lib/board.c | 3 + board/atmel/atngw100/atngw100.c | 15 ++++ include/configs/atngw100.h | 3 + 10 files changed, 185 insertions(+), 12 deletions(-) create mode 100644 arch/avr32/cpu/at32ap700x/mmu.c create mode 100644 arch/avr32/include/asm/arch-at32ap700x/mmu.h create mode 100644 arch/avr32/include/asm/unaligned.h
PATCH 1/3 avr32: Add missing asm/unaligned.h header file
Simply include the generic version. We could optimize this a bit more, as unaligned 32-bit accesses are ok on AP7, but let's make it work first.
--- arch/avr32/include/asm/unaligned.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) create mode 100644 arch/avr32/include/asm/unaligned.h
arch/avr32/include/asm/unaligned.h new file +1 -0
@@ -0,0 +1 @@ +#include <asm-generic/unaligned.h>
Signature · 1 line
1.7.0.4
PATCH 2/3 avr32: Print unrelocated PC on exception
In reply to Haavard SkinnemoenIn addition to the real PC value, also print the value of PC after subtracting the relocation offset. This value will match the address in the ELF file so it's much easier to figure out where things went wrong.
--- arch/avr32/cpu/exception.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
arch/avr32/cpu/exception.c +2 -1
@@ -59,7 +59,8 @@ void do_unknown_exception(unsigned int ecr, struct pt_regs *regs) {unsigned int mode; -printf ("\n *** Unhandled exception %u at PC=0x%08lx\n" , ecr, regs->pc); +printf ("\n *** Unhandled exception %u at PC=0x%08lx [%08lx]\n" , + ecr, regs->pc, regs->pc - gd->reloc_off);switch (ecr) {case ECR_BUS_ERROR_WRITE :
Signature · 1 line
1.7.0.4
PATCH 3/3 avr32: Add simple paging support
In reply to Haavard SkinnemoenUse the MMU hardware to set up 1:1 mappings between physical and virtual addresses. This allows us to bypass the cache when accessing the flash without having to do any physical-to-virtual address mapping in the CFI driver.
The virtual memory mappings are defined at compile time through a sorted array of virtual memory range objects. When a TLB miss exception happens, the exception handler does a binary search through the array until it finds a matching entry and loads it into the TLB. The u-boot image itself is covered by a fixed TLB entry which is never replaced.
This makes the 'saveenv' command work again on ATNGW100 and other boards using the CFI driver, hopefully without breaking any rules.
--- arch/avr32/cpu/at32ap700x/Makefile | 2 +- arch/avr32/cpu/at32ap700x/mmu.c | 78 ++++++++++++++++++++ arch/avr32/cpu/start.S | 19 +++-- arch/avr32/include/asm/arch-at32ap700x/addrspace.h | 5 +- arch/avr32/include/asm/arch-at32ap700x/mmu.h | 66 +++++++++++++++++ arch/avr32/lib/board.c | 4 + board/atmel/atngw100/atngw100.c | 15 ++++ board/atmel/atstk1000/atstk1000.c | 15 ++++ board/earthlcd/favr-32-ezkit/favr-32-ezkit.c | 15 ++++ board/mimc/mimc200/mimc200.c | 20 +++++ board/miromico/hammerhead/hammerhead.c | 15 ++++ include/configs/atngw100.h | 3 + include/configs/atstk1002.h | 3 + include/configs/atstk1003.h | 3 + include/configs/atstk1004.h | 3 + include/configs/atstk1006.h | 3 + include/configs/favr-32-ezkit.h | 3 + include/configs/hammerhead.h | 3 + include/configs/mimc200.h | 3 + 19 files changed, 267 insertions(+), 11 deletions(-) create mode 100644 arch/avr32/cpu/at32ap700x/mmu.c create mode 100644 arch/avr32/include/asm/arch-at32ap700x/mmu.h
arch/avr32/cpu/at32ap700x/Makefile +1 -1
@@ -24,7 +24,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)lib$(SOC).a -COBJS := portmux.o clk.o +COBJS := portmux.o clk.o mmu.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
arch/avr32/cpu/at32ap700x/mmu.c new file +78 -0
78 lines not on this page · raw message
arch/avr32/cpu/start.S +13 -6
@@ -81,12 +81,19 @@ _evba: .org 0x44 rjmp unknown_exception /* DTLB Modified */ - .org 0x50 - rjmp unknown_exception /* ITLB Miss */ - .org 0x60 - rjmp unknown_exception /* DTLB Miss (read) */ - .org 0x70 - rjmp unknown_exception /* DTLB Miss (write) */ + .org 0x50 /* ITLB Miss */ + pushm r8-r12,lr + rjmp 1f + .org 0x60 /* DTLB Miss (read) */ + pushm r8-r12,lr + rjmp 1f + .org 0x70 /* DTLB Miss (write) */ + pushm r8-r12,lr +1: mov r12, sp + rcall mmu_handle_tlb_miss + popm r8-r12,lr + brne unknown_exception + rete .size _evba, . - _evba
arch/avr32/include/asm/arch-at32ap700x/addrspace.h +1 -4
@@ -75,10 +75,7 @@ static inline void * phys_to_virt(unsigned long address)static inline void *map_physmem (phys_addr_t paddr,unsigned long len,unsigned long flags) { -if (flags ==MAP_WRBACK ) -return (void *)P1SEGADDR (paddr); -else -return (void *)P2SEGADDR (paddr); +return (void *)paddr; }#endif /* __ASM_AVR32_ADDRSPACE_H */
arch/avr32/include/asm/arch-at32ap700x/mmu.h new file +66 -0
66 lines not on this page · raw message
arch/avr32/lib/board.c +4 -0
@@ -33,6 +33,7 @@#include <asm/initcalls.h> #include <asm/sections.h> +#include <asm/arch/mmu.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING ""
@@ -264,6 +265,9 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) gd->flags |=GD_FLG_RELOC ; gd->reloc_off = dest_addr -CONFIG_SYS_MONITOR_BASE ; +/* Enable the MMU so that we can keep u-boot simple */ +mmu_init_r (dest_addr); +board_early_init_r (); monitor_flash_len = _edata - _text;
board/atmel/atngw100/atngw100.c +15 -0
@@ -26,11 +26,26 @@#include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <asm/arch/hmatrix.h> +#include <asm/arch/mmu.h> #include <asm/arch/portmux.h> #include <netdev.h> DECLARE_GLOBAL_DATA_PTR ; +struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS ] = { + { + .virt_pgno =CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT , + .nr_pages =CONFIG_SYS_FLASH_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_NONE , + }, { + .virt_pgno =CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT , + .nr_pages =EBI_SDRAM_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_WRBACK , + }, +}; +static const struct sdram_config sdram_config = { .data_bits =SDRAM_DATA_16BIT , .row_bits =13 ,
board/atmel/atstk1000/atstk1000.c +15 -0
@@ -25,11 +25,26 @@#include <asm/sdram.h> #include <asm/arch/clk.h> #include <asm/arch/hmatrix.h> +#include <asm/arch/mmu.h> #include <asm/arch/portmux.h> #include <netdev.h> DECLARE_GLOBAL_DATA_PTR ; +struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS ] = { + { + .virt_pgno =CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT , + .nr_pages =CONFIG_SYS_FLASH_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_NONE , + }, { + .virt_pgno =CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT , + .nr_pages =EBI_SDRAM_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_WRBACK , + }, +}; +static const struct sdram_config sdram_config = { #if defined(CONFIG_ATSTK1006) /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */
board/earthlcd/favr-32-ezkit/favr-32-ezkit.c +15 -0
@@ -24,10 +24,25 @@#include <asm/sdram.h> #include <asm/arch/clk.h> #include <asm/arch/hmatrix.h> +#include <asm/arch/mmu.h> #include <asm/arch/portmux.h> DECLARE_GLOBAL_DATA_PTR ; +struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS ] = { + { + .virt_pgno =CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT , + .nr_pages =CONFIG_SYS_FLASH_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_NONE , + }, { + .virt_pgno =CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT , + .nr_pages =EBI_SDRAM_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_WRBACK , + }, +}; +static const struct sdram_config sdram_config = {/* MT48LC4M32B2P-6 (16 MB) */ .data_bits =SDRAM_DATA_32BIT ,
board/mimc/mimc200/mimc200.c +20 -0
@@ -27,12 +27,32 @@#include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <asm/arch/hmatrix.h> +#include <asm/arch/mmu.h> #include <asm/arch/portmux.h> #include <atmel_lcdc.h> #include <lcd.h> #include "../../../arch/avr32/cpu/hsmc3.h" +struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS ] = { + { + .virt_pgno =CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT , + .nr_pages =CONFIG_SYS_FLASH_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_NONE , + }, { + .virt_pgno =EBI_SRAM_CS2_BASE >>PAGE_SHIFT , + .nr_pages =EBI_SRAM_CS2_SIZE >>PAGE_SHIFT , + .phys = (EBI_SRAM_CS2_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_NONE , + }, { + .virt_pgno =CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT , + .nr_pages =EBI_SDRAM_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_WRBACK , + }, +}; +#if defined(CONFIG_LCD )/* 480x272x16 @ 72 Hz */ vidinfo_t panel_info = {
board/miromico/hammerhead/hammerhead.c +15 -0
@@ -30,10 +30,25 @@#include <asm/arch/clk.h> #include <asm/arch/hmatrix.h> #include <asm/arch/memory-map.h> +#include <asm/arch/mmu.h> #include <asm/arch/portmux.h> DECLARE_GLOBAL_DATA_PTR ; +struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS ] = { + { + .virt_pgno =CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT , + .nr_pages =CONFIG_SYS_FLASH_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_FLASH_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_NONE , + }, { + .virt_pgno =CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT , + .nr_pages =EBI_SDRAM_SIZE >>PAGE_SHIFT , + .phys = (CONFIG_SYS_SDRAM_BASE >>PAGE_SHIFT ) + |MMU_VMR_CACHE_WRBACK , + }, +}; +static const struct sdram_config sdram_config = { .data_bits =SDRAM_DATA_32BIT , .row_bits =13 ,
include/configs/atngw100.h +3 -0
@@ -49,6 +49,9 @@#define CONFIG_SYS_CLKDIV_PBA 2#define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM and NOR flash */ +#define CONFIG_SYS_NR_VM_REGIONS 2 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
include/configs/atstk1002.h +3 -0
@@ -73,6 +73,9 @@*/ #define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM and NOR flash */ +#define CONFIG_SYS_NR_VM_REGIONS 2 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
include/configs/atstk1003.h +3 -0
@@ -73,6 +73,9 @@*/ #define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM and NOR flash */ +#define CONFIG_SYS_NR_VM_REGIONS 2 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
include/configs/atstk1004.h +3 -0
@@ -73,6 +73,9 @@*/ #define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM and NOR flash */ +#define CONFIG_SYS_NR_VM_REGIONS 2 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
include/configs/atstk1006.h +3 -0
@@ -73,6 +73,9 @@*/ #define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM and NOR flash */ +#define CONFIG_SYS_NR_VM_REGIONS 2 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
include/configs/favr-32-ezkit.h +3 -0
@@ -70,6 +70,9 @@*/ #define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM and NOR flash */ +#define CONFIG_SYS_NR_VM_REGIONS 2 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
include/configs/hammerhead.h +3 -0
@@ -47,6 +47,9 @@#define CONFIG_SYS_CLKDIV_PBA 2#define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM and NOR flash */ +#define CONFIG_SYS_NR_VM_REGIONS 2 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
include/configs/mimc200.h +3 -0
@@ -51,6 +51,9 @@#define CONFIG_SYS_CLKDIV_PBA 2#define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM, NOR flash and FRAM */ +#define CONFIG_SYS_NR_VM_REGIONS 3 +/* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2>
Signature · 1 line
1.7.0.4
PATCH 3/3 avr32: Add simple paging support
Dear H?vard Skinnemoen,
I have tested the simple TLB implementation on our own hardware and it does work with CFI driver.
Thanks a lot for introducing this, we had to wait so long ...
Am 02.08.2010 14:06, schrieb Haavard Skinnemoen:
Quoted 11 lines
Use the MMU hardware to set up 1:1 mappings between physical and virtual addresses. This allows us to bypass the cache when accessing the flash without having to do any physical-to-virtual address mapping in the CFI driver.
The virtual memory mappings are defined at compile time through a sorted array of virtual memory range objects. When a TLB miss exception happens, the exception handler does a binary search through the array until it finds a matching entry and loads it into the TLB. The u-boot image itself is covered by a fixed TLB entry which is never replaced.
Quoted 4 lines
This makes the 'saveenv' command work again on ATNGW100 and other boards using the CFI driver, hopefully without breaking any rules.
Signed-off-by Haavard Skinnemoen <[email protected]>
PATCH 3/3 avr32: Add simple paging support
In reply to Haavard SkinnemoenDear Haavard Skinnemoen,
Quoted 5 lines · In message <[email protected]>…
Use the MMU hardware to set up 1:1 mappings between physical and virtual addresses. This allows us to bypass the cache when accessing the flash without having to do any physical-to-virtual address mapping in the CFI driver.
Quoted 8 lines
The virtual memory mappings are defined at compile time through a sorted array of virtual memory range objects. When a TLB miss exception happens, the exception handler does a binary search through the array until it finds a matching entry and loads it into the TLB. The u-boot image itself is covered by a fixed TLB entry which is never replaced.
This makes the 'saveenv' command work again on ATNGW100 and other boards using the CFI driver, hopefully without breaking any rules.
Can you please try and rebase this code on top of Heiko's ARM rework patches, i. e. with cache and relocation support?
See
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/81825/focus=82142
My intention is that after -rc1 has been released (i. e. when we have a "next" branch again), I will first apply the new environment code patches, and then, probably with a week delay or so, Heiko's ARM rework. Your stuff will then have to fit on top of this.
Thanks.
Best regards,
Wolfgang Denk
Signature · 5 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Let's say the docs present a simplified view of reality... :-)
- Larry Wall in <[email protected]>PATCH 3/3 avr32: Add simple paging support
Quoted 11 lines · Wolfgang Denk
Can you please try and rebase this code on top of Heiko's ARM rework patches, i. e. with cache and relocation support?
See
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/81825/focus=82142My intention is that after -rc1 has been released (i. e. when we have a "next" branch again), I will first apply the new environment code patches, and then, probably with a week delay or so, Heiko's ARM rework. Your stuff will then have to fit on top of this.
Sure. The patches probably needs more testing and a refresh anyway...I just saw some issues with SDRAM initialization on some boards which need to be investigated.
Haavard
cover avr32 fixes
In reply to Haavard SkinnemoenQuoted 3 lines · Haavard Skinnemoen
This series fixes a trivial build issue, as well as a longstanding problem with the 'saveenv' command on ATNGW100.
Is that the same problem that makes flash erase actions fail with the error that the start or end address does not match a sector boundary?
Quoted 6 lines
It also includes a trivial enhancement to the exception reporting which I found very useful during debugging.
Hopefully this will make mainline u-boot useful again on AVR32. Without this fix, v2008.10 is the latest usable release.
I had a problem with this version as well when the environment was empty. It said the flash was 4Gig and kept crashing with some DMA error (NGW100 board).
Quoted 4 lines
The patches are based on v2010.06, but it merges fine with the latest upstream master. The AVR32 master branch currently contains a workaround which I plan to revert if these patches are acceptable.
I'm happy to test them on my board. What a coincidence with my (first) mailing list post from earlier today.
Thanks a lot!
Bas.
Signature · 1 line
Bas.
cover avr32 fixes
Quoted 8 lines · Bas Mevissen
Quoted 3 lines · Haavard Skinnemoen
This series fixes a trivial build issue, as well as a longstanding problem with the 'saveenv' command on ATNGW100.
Is that the same problem that makes flash erase actions fail with the error that the start or end address does not match a sector boundary?
Yes, that's the one.
Quoted 7 lines
Quoted 3 lines
Hopefully this will make mainline u-boot useful again on AVR32. Without this fix, v2008.10 is the latest usable release.
I had a problem with this version as well when the environment was empty. It said the flash was 4Gig and kept crashing with some DMA error (NGW100 board).
Ok, I wasn't aware of that problem. I don't think I've ever tried running u-boot with empty environment; in fact, I'm not even sure how you do that since it will fall back to a default environment if it can't find anything in flash.
Quoted 6 lines
Quoted 3 lines
The patches are based on v2010.06, but it merges fine with the latest upstream master. The AVR32 master branch currently contains a workaround which I plan to revert if these patches are acceptable.
I'm happy to test them on my board. What a coincidence with my (first) mailing list post from earlier today.
That would be awesome. I don't really follow the mailing list very closely these days, so I didn't see your post.
Haavard
cover avr32 fixes
Quoted 1 line · Haavard Skinnemoen
Quoted 1 line
I had a problem with this version as well when the environment was
empty.
Quoted 1 line
Quoted 1 line
It said the flash was 4Gig and kept crashing with some DMA error
(NGW100
Quoted 7 lines
Quoted 1 line
board).
Ok, I wasn't aware of that problem. I don't think I've ever tried running u-boot with empty environment; in fact, I'm not even sure how you do that since it will fall back to a default environment if it can't find anything in flash.
Yes, the strange thing is that it worked fine a few times. But for some reason, it failed later on.
I'll try to reproduce the problem and make a proper report.
Signature · 1 line
Bas.
cover avr32 fixes
Quoted 11 lines · Bas Mevissen
Quoted 6 lines
Ok, I wasn't aware of that problem. I don't think I've ever tried running u-boot with empty environment; in fact, I'm not even sure how you do that since it will fall back to a default environment if it can't find anything in flash.
Yes, the strange thing is that it worked fine a few times. But for some reason, it failed later on.
I'll try to reproduce the problem and make a proper report.
Here it is, pasted as quotation to avoid line wrapping:
Quoted 23 lines
U-Boot 2008.10 (Aug 1 2010 - 01:34:48)
U-Boot code: 00000000 ->
00012f66data:000198e8->0004f4e0
malloc: Using memory from0x11f70000to0x11fb0000
DMA: Using memory from0x11f6c000to0x11f70000
Flash: 3.2 GB at address0x00000000
DRAM Configuration:
Bank #0: 10000000 32 MB
WARNING: Cannot allocate space for boot parameters *** Warning - bad CRC, using default environment*** Unhandled exception 5 at PC=0xffffffff
MMU exception at address0xffffffffpc: ffffffff lr: 11fb7ff0 sp: 11f6bf3c r12: ffffffff r11: 00041a67 r10: 00041a67 r9: 00000002 r8: 00000001 r7: 00041a67 r6: 11fca850 r5: 11f6bfa0 r4: 00000001 r3: 00041a67 r2: 00041a67 r1: 0001a85c r0: 0001a858Flags: qvNzc
Mode bits: hrje....g
CPU Mode: Supervisor
Quoted 7 lines
Stack: (0x11f6bf3c to 0x11f6bfa0)bf20:
11fb819e
bf40:11f6bfcc11fca85011f6bfa011fcf2a011fb076211f6bfcc11fca85011f6bfa0
bf60:11fcf2a011f6bfcc0001a8600001a85c0001a85811fb01820200000011fca850
bf80:24007fb411fcf2a068616e6411fb00000000000011fb000000000000 00000000 Unhandled exception
I don't know how u-boot knows the flash layout. Maybe something changed between 1.3.3 and 2008.10 (default partition table?)
I compiled pristine 2008.10 for atngw100 with just LZMA compression enabled and the right command line and boot command for OpenWRT:
Quoted 12 lines
include/configs/atngw100.h renamed from include/configs/atngw100.h.orig +1
-0@@ -62,6 +62,7 @@/* User serviceable stuff */ #define CONFIG_DOS_PARTITION 1 +#define CONFIG_LZMA 1#define CONFIG_CMDLINE_TAG 1#define CONFIG_SETUP_MEMORY_TAGS 1@@ -71,9 +72,9 @@
include/configs/atngw100.h line 80
Quoted 10 lines
include/configs/atngw100.h renamed from include/configs/atngw100.h.orig +2
-2#define CONFIG_BAUDRATE 115200#define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2" + "console=ttyS0i,115200 root=/dev/mtdblock2 rootfstype=jffs2 init=/etc/preinit"#define CONFIG_BOOTCOMMAND \ - "fsload; bootm" + "bootm 0x20000"/* * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
(make atngw100_config && make)
This is what 1.3.3 does. I just took the plain image from OpenWRT and not the one padded to 128K bytes as usual with OpenWRT. For 1.3.3, that does not seem to make a difference.
OpenWRT only adds LZMA decompression support to the pristine sources.
Quoted 12 lines
U-Boot 1.3.3 (Aug 1 2010 - 03:05:20)
U-Boot code: 00000000 -> 00011600 data:
00017b20->0004e408
SDRAM: 32 MB at address0x10000000
Testing SDRAM...OK
malloc: Using memory from0x11f71000to0x11fb1000
DMA: Using memory from0x11f6d000to0x11f71000
Flash: 8 MB at address0x00000000
DRAM Configuration:
Bank #0: 10000000 32 MB
*** Warning - bad CRC, using default environment
Quoted 9 lines
In: serial Out: serial Err: serial Net: macb0, macb1Press SPACE to abort autoboot in 1 seconds
Wrong Image Format for bootm command
ERROR: can't get kernel image!
Uboot>
You notice that the flash size is correctly recognized. I fully erased the flash between both attempts and there was no power cycle in between. Actually, I'm not even physically touching the board.
Signature · 1 line
Bas.