Fix typo inside atmel_mci driver
Subsystems (3)
PATCH 1/1 Fix typo inside atmel_mci driver
The function get_mci_clk_rate is used inside atmel_mci driver
but never defined. Fix this typo.
--- drivers/mmc/atmel_mci.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/mmc/atmel_mci.c +0 -0
@@ -67,7 +67,7 @@ static void mci_set_mode(unsigned long hz, unsigned
long blklen)
unsigned long bus_hz;
unsigned long clkdiv;
- bus_hz = get_mci_clk_rate();
+ bus_hz = get_mck_clk_rate();
clkdiv = (bus_hz / hz) / 2 - 1;
pr_debug("mmc: setting clock %lu Hz, block size %lu\n",
Signature · 7 lines
1.7.0.4 -- Claudio - OpenWrt Developer - Hardware designer - pub 1024D/0DFD7CBB C94D 759A 2EF0 172F 9673 65E4 C4C1 8627 0DFD 7CBB
PATCH 1/1 Fix typo inside atmel_mci driver
2010/6/22 Claudio Mignanti <[email protected]>:
Quoted 3 lines
The function
get_mci_clk_rateis used insideatmel_mcidriver ?but never defined. Fix this typo.
No comment on this topic.
PATCH 1/1 Fix typo inside atmel_mci driver
In reply to Claudio MignantiDear Claudio Mignanti,
Quoted 2 lines · In message <[email protected]> you…
The function
get_mci_clk_rateis used insideatmel_mcidriver
but never defined. Fix this typo.
Well, it is certainly defined inarch/avr32/include/asm/arch-at32ap700x/clk.h:
74 #ifdef AT32AP700x_CHIP_HAS_MMCI
75 static inline unsigned long get_mci_clk_rate(void) 76 {
77 return get_pbb_clk_rate();
78 }
79 #endif
drivers/mmc/atmel_mci.c static void mci_set_mode(unsigned long hz, unsigned · line 71
Quoted 9 lines
drivers/mmc/atmel_mci.c +1
-1@@ -67,7 +67,7 @@ static void mci_set_mode(unsigned long hz, unsigned long blklen)unsigned long bus_hz;unsigned long clkdiv; - bus_hz =get_mci_clk_rate (); + bus_hz =get_mck_clk_rate ();
Are you sure this patch is working and does not break anything?
Best regards,
Wolfgang Denk
Signature · 4 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Bus error -- driver executed.
PATCH 1/1 Fix typo inside atmel_mci driver
Quoted 7 lines · Wolfgang Denk
Dear Claudio Mignanti,
Quoted 3 lines · In message <[email protected]> you…
The function
get_mci_clk_rateis used insideatmel_mcidriver
but never defined. Fix this typo.
Thats NOT a typo. The current atmel_mci.c is for AVR32 ONLY.
Quoted 19 lines
Well, it is certainly defined in
arch/avr32/include/asm/arch-at32ap700x/clk.h:74 #ifdef
AT32AP700x_CHIP_HAS_MMCI
75 static inline unsigned longget_mci_clk_rate(void)76 {
77 returnget_pbb_clk_rate();
78 }
79 #endifQuoted 7 lines
drivers/mmc/atmel_mci.c +0
-0@@ -67,7 +67,7 @@ static void mci_set_mode(unsigned long hz, unsigned long blklen)unsigned long bus_hz;unsigned long clkdiv;
Quoted 6 lines
drivers/mmc/atmel_mci.c static void mci_set_mode(unsigned long hz, unsigned · line 72
Quoted 3 lines
drivers/mmc/atmel_mci.c +1
-1- bus_hz =get_mci_clk_rate (); + bus_hz =get_mck_clk_rate ();Are you sure this patch is working and does not break anything?
It will break on the AVR32 architecture.
Besides, the current atmel_mci.c driver WILL NOT work on the AT91SAM9. My patch from 07-Jul-10 fixes all issues and makes it work on AT91SAM9.
Reinhard
PATCH 1/1 Fix typo inside atmel_mci driver
2010/8/7 Reinhard Meyer <[email protected]>:
Quoted 8 lines
Quoted 7 lines · Wolfgang Denk
Dear Claudio Mignanti,
In message <[email protected]>
Quoted 1 line · you
Quoted 6 lines
Quoted 3 lines
Quoted 3 lines
The function
get_mci_clk_rateis used insideatmel_mcidriver ?but never defined. Fix this typo.Thats NOT a typo. The current
atmel_mci.cis for AVR32 ONLY.Quoted 1 line
With the proposed patch I successfully use this driver on at91sam9g20!
Probabily they share the same mci controller I don't know, I want only report this experience.
U-Boot 2009.08 (Dec 22 2009 - 13:15:07)
CPU: AT91SAM9G20 Crystal frequency: 18.432 MHz CPU clock : 396.288 MHz Master clock : 132.096 MHz DRAM: 64 MB DataFlash:AT45DB642 Nb pages: 8192 Page Size: 1056 Size= 8650752 bytes .... u-boot> mmc init mmc: setting clock 150000 Hz, block size 512 mmc: clock 150000 too low; setting CLKDIV to 255 Manufacturer ID: 1B OEM/Application ID: 534D Product name: UD Product Revision: 1.0 Product Serial Number: 3550481429 Manufacturing Date: 07/10 SD Card detected (RCA 45928) CSD data: 32002f00 000195f5 feb6df33 0009a5fc CSD structure version: 1.0 MMC System Spec version: 0 Card command classes: 5f5 Read block length: 512
Supports partial reads
Write block length: 512
Does not support partial writes
Supports group WP: 16
Card capacity: 510132224 bytes
File format: 0/0
Write protection:
mmc: Using 3145728 cycles data timeout (DTOR=0x73)
mmc: setting clock 5000000 Hz, block size 512 .mmc1 is available
PATCH 1/1 Fix typo inside atmel_mci driver
Quoted 7 lines · Claudio Mignanti
2010/8/7 Reinhard Meyer <[email protected]>:
Quoted 6 lines
Quoted 5 lines · Wolfgang Denk
Dear Claudio Mignanti,
In message <[email protected]> you wrote:
Quoted 8 lines
Quoted 4 lines
Quoted 3 lines
Quoted 3 lines
The function
get_mci_clk_rateis used insideatmel_mcidriver
but never defined. Fix this typo.Thats NOT a typo. The current
atmel_mci.cis for AVR32 ONLY.With the proposed patch I successfully use this driver on at91sam9g20!
Probabily they share the same mci controller I don't know, I want only report this experience.
NAK. That will break the driver for AVR32.
The correct way is to add get_mci_clk_rate() to clk.h:
arch/arm/include/asm/arch-at91/clk.h +5 -0
@@ -59,5 +59,10 @@ static inline unsigned long get_twi_clk_rate(unsigned int dev_id) return get_mck_clk_rate(); } +static inline unsigned long get_mci_clk_rate (void ) +{ +return get_mck_clk_rate (); +} +int at91_clock_init (unsigned long main_clock);#endif /* __ASM_ARM_ARCH_CLK_H__ */
On AVR32 there is no MCK and each peripherals' clock can be prescaled individually. Its just that the current AT91 have all clocks the same.
Best Regards,
Reinhard
PS: that driver will soon become obsolete, because a new, mmc framework based driver is in the mold already.