Updating SPEAr Support
Subsystems (15)
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
In reply to Artem BityutskiyQuoted 7 lines · Artem Bityutskiy
Quoted 6 lines · Viresh KUMAR
From: Vipin Kumar <[email protected]>
For a page size of 4096, the number of oob bytes are 128 per page. This demands for an increased
ecc_posarray as well as ecc can be placed at more than 64 locations.
Quoted 9 lines
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This patch is added because SPEAr platforms NAND controller has 13 bytes of ecc for each 512 bytes of data. This results in 104 bytes of ecc in case of 4096 byte page.
Signed-off-by Vipin Kumar <[email protected]>Signed-off-by Viresh Kumar <[email protected]>Nack, breaking ABI Is not allowed in Linux.
Hello Artem,
I could not understand your point. Can you please elaborate. How does this patch break ABI
Regards
Vipin
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Hi,
Quoted 3 lines · Vipin Kumar
Quoted 1 line
Nack, breaking ABI Is not allowed in Linux.
I could not understand your point. Can you please elaborate. How does this patch break ABI
You are changing data structure (struct nand_ecclayout) used for in MTD ioctl. Tha ioctl is part of the Linux ABI. By changing the data structure, you are breaking the ABI. This means that current binaries would stop working with newer versions of the Linux kernel if we'd accept your patch.
Signature · 2 lines
Best Regards, Artem Bityutskiy (???????? ?????)
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 4 lines · Artem Bityutskiy
Hi,
Quoted 1 line · Vipin Kumar
Quoted 1 line
Nack, breaking ABI Is not allowed in Linux.
Quoted 9 lines
Quoted 2 lines
I could not understand your point. Can you please elaborate. How does this patch break ABI
You are changing data structure (struct
nand_ecclayout) used for in MTD ioctl. Tha ioctl is part of the Linux ABI. By changing the data structure, you are breaking the ABI. This means that current binaries would stop working with newer versions of the Linux kernel if we'd accept your patch.
Hello,
The only change that I have made is increasing the number of bytes to keep ecc. Since the ecc is generally kept in spare area, it makes sense to have the ecc locations to be equal to the maximum spare area possible.
A NAND page with a page size of 4096 would contain a spare area of 128 bytes. Now, ecc for the page can be less/more than 64 bytes(currently allocated for ecc positions) depending on the algorithm used to generate ecc. Incidently, in our case the ecc can fit in 104 bytes and this is still quite logical to place it in spare area since the linux image supports 4096 page but the problem is that the ecc locations supported by linux are less than the practically possible scenario so in effect this change is an improvement in linux
Please let me know if you disagree
Regards
Vipin
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 14 lines · Vipin Kumar
Quoted 4 lines · Artem Bityutskiy
Hi,
Quoted 1 line · Vipin Kumar
Quoted 1 line
Nack, breaking ABI Is not allowed in Linux.
Quoted 9 lines
Quoted 2 lines
I could not understand your point. Can you please elaborate. How does this patch break ABI
You are changing data structure (struct
nand_ecclayout) used for in MTD ioctl. Tha ioctl is part of the Linux ABI. By changing the data structure, you are breaking the ABI. This means that current binaries would stop working with newer versions of the Linux kernel if we'd accept your patch.
Quoted 3 lines
Hello,
The only change that I have made is increasing the number of bytes to keep ecc.
Right, but this break ABI.
Quoted 2 lines
Since the ecc is generally kept in spare area, it makes sense to have the ecc locations to be equal to the maximum spare area possible.
May be.
Quoted 7 lines
A NAND page with a page size of 4096 would contain a spare area of 128 bytes. Now, ecc for the page can be less/more than 64 bytes(currently allocated for ecc positions) depending on the algorithm used to generate ecc. Incidently, in our case the ecc can fit in 104 bytes and this is still quite logical to place it in spare area since the linux image supports 4096 page but the problem is that the ecc locations supported by linux are less than the practically possible scenario so in effect this change is an improvement in linux
Yes, this is historical and a bit unfortunate, but you cannot break ABI even if you have reasons like that
Quoted 1 line
Please let me know if you disagree
Please, create an app which uses 'struct nand_ecclayout' and compile it against the old headers. Check that it works. Then do you kernel modification and run the same program (without re-compiling) and my prediction is that it won't work. This is what I call ABI breaking which is disallowed.
Signature · 2 lines
Best Regards, Artem Bityutskiy (???????? ?????)
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 17 lines · Artem Bityutskiy
Quoted 16 lines · Vipin Kumar
Quoted 4 lines · Artem Bityutskiy
Hi,
Quoted 1 line · Vipin Kumar
Quoted 1 line
Nack, breaking ABI Is not allowed in Linux.
Quoted 9 lines
Quoted 2 lines
I could not understand your point. Can you please elaborate. How does this patch break ABI
You are changing data structure (struct
nand_ecclayout) used for in MTD ioctl. Tha ioctl is part of the Linux ABI. By changing the data structure, you are breaking the ABI. This means that current binaries would stop working with newer versions of the Linux kernel if we'd accept your patch.Hello,
Quoted 17 lines
Quoted 1 line
The only change that I have made is increasing the number of bytes to keep ecc.
Right, but this break ABI.
Quoted 2 lines
Since the ecc is generally kept in spare area, it makes sense to have the ecc locations to be equal to the maximum spare area possible.
May be.
Quoted 7 lines
A NAND page with a page size of 4096 would contain a spare area of 128 bytes. Now, ecc for the page can be less/more than 64 bytes(currently allocated for ecc positions) depending on the algorithm used to generate ecc. Incidently, in our case the ecc can fit in 104 bytes and this is still quite logical to place it in spare area since the linux image supports 4096 page but the problem is that the ecc locations supported by linux are less than the practically possible scenario so in effect this change is an improvement in linux
Hello David/Artem,
I got the point, but this change is essential (at least for me). It may be essential to others as well in near future. Please let me know how to handle more than 64 bytes of ecc
Quoted 11 lines
Yes, this is historical and a bit unfortunate, but you cannot break ABI even if you have reasons like that
Quoted 1 line
Please let me know if you disagree
Please, create an app which uses 'struct
nand_ecclayout' and compile it against the old headers. Check that it works. Then do you kernel modification and run the same program (without re-compiling) and my prediction is that it won't work. This is what I call ABI breaking which is disallowed.
Regards
Vipin
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 36 lines · Vipin Kumar
Quoted 17 lines · Artem Bityutskiy
Quoted 16 lines · Vipin Kumar
Quoted 4 lines · Artem Bityutskiy
Hi,
Quoted 1 line · Vipin Kumar
Quoted 1 line
Nack, breaking ABI Is not allowed in Linux.
Quoted 9 lines
Quoted 2 lines
I could not understand your point. Can you please elaborate. How does this patch break ABI
You are changing data structure (struct
nand_ecclayout) used for in MTD ioctl. Tha ioctl is part of the Linux ABI. By changing the data structure, you are breaking the ABI. This means that current binaries would stop working with newer versions of the Linux kernel if we'd accept your patch.Hello,
Quoted 17 lines
Quoted 1 line
The only change that I have made is increasing the number of bytes to keep ecc.
Right, but this break ABI.
Quoted 2 lines
Since the ecc is generally kept in spare area, it makes sense to have the ecc locations to be equal to the maximum spare area possible.
May be.
Quoted 7 lines
A NAND page with a page size of 4096 would contain a spare area of 128 bytes. Now, ecc for the page can be less/more than 64 bytes(currently allocated for ecc positions) depending on the algorithm used to generate ecc. Incidently, in our case the ecc can fit in 104 bytes and this is still quite logical to place it in spare area since the linux image supports 4096 page but the problem is that the ecc locations supported by linux are less than the practically possible scenario so in effect this change is an improvement in linux
Quoted 8 lines
Hello David/Artem,
I got the point, but this change is essential (at least for me). It may be essential to others as well in near future. Please let me know how to handle more than 64 bytes of ecc
Quoted 2 lines
Yes, this is historical and a bit unfortunate, but you cannot break ABI even if you have reasons like that
We have run into this same problem using large page NAND chips. Our fix in the past has been the same as presented here simply because it is easy and for custom boards we do not care if we break the kernel ABI since the kernel will only be used on our custom board.
However, we are interested in having a proper solution to this problem. Basically the size of the eccpos array shouldn't be a fixed. Probably there should be two ioctls, one to get the size of the eccpos array and a second to get the actual array.
It is unfortunate that we already have the obsolete nand_oobinfo struct, and any fix to this problem is probably going to obsolete the nand_ecclayout struct, but we do need to fix this as the existing infrastructure is not suitable for larger nand chips.
~Ryan
Signature · 7 lines
Bluewater Systems Ltd - ARM Technology Solution Centre Ryan Mallon 5 Amuri Park, 404 Barbadoes St [email protected] PO Box 13 889, Christchurch 8013 http://www.bluewatersys.com New Zealand Phone: +64 3 3779127 Freecall: Australia 1800 148 751 Fax: +64 3 3779135 USA 1800 261 2934
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 1 line · Ryan Mallon
However, we are interested in having a proper solution to this problem.
I would suggest using this patch as a starting point - could you please review the changes and try it out?
Thanks.
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 7 lines · Kevin Cernekee
Quoted 1 line · Ryan Mallon
However, we are interested in having a proper solution to this problem.
I would suggest using this patch as a starting point - could you please review the changes and try it out?
That patch still breaks the ABI by renaming struct nand_ecclayout to nand_ecclayout_user. Any application using the old names will have to be rewritten to compile against a new kernel.
The old interface should remain unchanged in that include/mtd/mtd-abi.h. If an application using the old interface calls any of the ecc ioctls for a nand chip with > 64 bytes ecc it should return an error.
I still think the eccpos field should be a pointer, so that it can allocate as much space as is needed for the ecc. This also means that the kernel doesn't need to be changed every time a new NAND chips appears with a bigger ecc size.
~Ryan
Signature · 7 lines
Bluewater Systems Ltd - ARM Technology Solution Centre Ryan Mallon 5 Amuri Park, 404 Barbadoes St [email protected] PO Box 13 889, Christchurch 8013 http://www.bluewatersys.com New Zealand Phone: +64 3 3779127 Freecall: Australia 1800 148 751 Fax: +64 3 3779135 USA 1800 261 2934
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 11 lines · Ryan Mallon
Quoted 7 lines · Kevin Cernekee
Quoted 1 line · Ryan Mallon
However, we are interested in having a proper solution to this problem.
I would suggest using this patch as a starting point - could you please review the changes and try it out?
That patch still breaks the ABI by renaming struct
nand_ecclayouttonand_ecclayout_user.
Hmm, would you please show why my binary file 'nandwrite' would have to be re-built?
Quoted 2 lines
Any application using the old names will have to be
rewritten to compile against a new kernel.
Not necessary. mtd-utils, for example, maintain their own copy of the mtd-abi.h file, which I personally think is a good idea.
But if your apps depend on the kernel headers, then yes, you will need to amend it or copy the old header into your project.
IOW, the patch breaks API by renaming, but not ABI, I think. I do not see this as a major problem - just a small inconvenience.
Quoted 3 lines
The old interface should remain unchanged in that
include/mtd/mtd-abi.h. If an application using the old interface calls any of the ecc ioctls for a nand chip with > 64 bytes ecc it should return an error.
It will, because size of the structure is part of the ioctl number, even. See the corresponding ioctl macro definition.
Quoted 4 lines
I still think the eccpos field should be a pointer, so that it can allocate as much space as is needed for the ecc. This also means that the kernel doesn't need to be changed every time a new NAND chips appears with a bigger ecc size.
Sure, this is the whole point: go ahead and design the new ioctl, and then deprecate the old one. Just invest men/hours into that and we are all right :-)
Signature · 2 lines
Best Regards, Artem Bityutskiy (???????? ?????)
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 19 lines · Artem Bityutskiy
Quoted 11 lines · Ryan Mallon
Quoted 7 lines · Kevin Cernekee
Quoted 1 line · Ryan Mallon
However, we are interested in having a proper solution to this problem.
I would suggest using this patch as a starting point - could you please review the changes and try it out?
That patch still breaks the ABI by renaming struct
nand_ecclayouttonand_ecclayout_user.Hmm, would you please show why my binary file 'nandwrite' would have to be re-built?
Quoted 2 lines
Any application using the old names will have to be
rewritten to compile against a new kernel.
Quoted 8 lines
Not necessary. mtd-utils, for example, maintain their own copy of the
mtd-abi.hfile, which I personally think is a good idea.But if your apps depend on the kernel headers, then yes, you will need to amend it or copy the old header into your project.
IOW, the patch breaks API by renaming, but not ABI, I think. I do not see this as a major problem - just a small inconvenience.
Sorry, you are correct, it breaks the API not the ABI. I understood that such changes were still to be avoided.
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The old interface should remain unchanged in that
include/mtd/mtd-abi.h. If an application using the old interface calls any of the ecc ioctls for a nand chip with > 64 bytes ecc it should return an error.It will, because size of the structure is part of the ioctl number, even. See the corresponding ioctl macro definition.
Right, but I don't think it needs the complexity of the shrink_ecc function from Kevin's patch. The old ioctl should return an error (possibly with a kernel message) if the requested nand chip has > 64 bytes ecc. Otherwise it should just copy upto 64 bytes into the old nand_ecclayout structure and return.
Any new structure should be totally independent and should, IMHO, have an arbitrary sized array for the ecc. It should have its own new set of ioctls, one for getting the size of the ecc and one for getting the actual ecc data. Though I can't remember if ioctls support arbitrary sized arguments to make this possible.
~Ryan
Signature · 7 lines
Bluewater Systems Ltd - ARM Technology Solution Centre Ryan Mallon 5 Amuri Park, 404 Barbadoes St [email protected] PO Box 13 889, Christchurch 8013 http://www.bluewatersys.com New Zealand Phone: +64 3 3779127 Freecall: Australia 1800 148 751 Fax: +64 3 3779135 USA 1800 261 2934
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 36 lines · Ryan Mallon
Quoted 19 lines · Artem Bityutskiy
Quoted 11 lines · Ryan Mallon
Quoted 7 lines · Kevin Cernekee
Quoted 1 line · Ryan Mallon
However, we are interested in having a proper solution to this problem.
I would suggest using this patch as a starting point - could you please review the changes and try it out?
That patch still breaks the ABI by renaming struct
nand_ecclayouttonand_ecclayout_user.Hmm, would you please show why my binary file 'nandwrite' would have to be re-built?
Quoted 2 lines
Any application using the old names will have to be
rewritten to compile against a new kernel.Quoted 8 lines
Not necessary. mtd-utils, for example, maintain their own copy of the
mtd-abi.hfile, which I personally think is a good idea.But if your apps depend on the kernel headers, then yes, you will need to amend it or copy the old header into your project.
IOW, the patch breaks API by renaming, but not ABI, I think. I do not see this as a major problem - just a small inconvenience.
Sorry, you are correct, it breaks the API not the ABI. I understood that such changes were still to be avoided.
Quoted 4 lines
Quoted 3 lines
The old interface should remain unchanged in that
include/mtd/mtd-abi.h. If an application using the old interface calls any of the ecc ioctls for a nand chip with > 64 bytes ecc it should return an error.
Quoted 8 lines
Quoted 2 lines
It will, because size of the structure is part of the ioctl number, even. See the corresponding ioctl macro definition.
Right, but I don't think it needs the complexity of the
shrink_eccfunction from Kevin's patch. The old ioctl should return an error (possibly with a kernel message) if the requested nand chip has > 64 bytes ecc. Otherwise it should just copy upto 64 bytes into the oldnand_ecclayoutstructure and return.
Oops, I misread the patch. The shrink_ecclayout function is actually fine. The only change I would make is to possible add a warning/error if the data is being truncated.
~Ryan
Signature · 7 lines
Bluewater Systems Ltd - ARM Technology Solution Centre Ryan Mallon 5 Amuri Park, 404 Barbadoes St [email protected] PO Box 13 889, Christchurch 8013 http://www.bluewatersys.com New Zealand Phone: +64 3 3779127 Freecall: Australia 1800 148 751 Fax: +64 3 3779135 USA 1800 261 2934
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
In reply to Ryan MallonQuoted 7 lines · Ryan Mallon
Quoted 2 lines · Kevin Cernekee
On Wed, Sep 1, 2010 at 2:23 PM, Ryan Mallon <[email protected]> wrote:
http://git.infradead.org/users/dedekind/l2-mtd-2.6.git/commitdiff/b6d6ae730be2750fac166ed9df11ee6ea54d9160That patch still breaks the ABI by renaming struct
nand_ecclayouttonand_ecclayout_user. Any application using the old names will have to be rewritten to compile against a new kernel.
I don't know how exactly all user-space apps deal with this, but isn't that what the following typedef is for? (include/mtd/mtd-user.h)
typedef struct nand_ecclayout nand_ecclayout_t; changed to: typedef struct nand_ecclayout_user nand_ecclayout_t;
So any app that properly used nand_ecclayout_t would not need changes even when using the new headers. Again, I don't know who has been using what in user-space.
Quoted 8 lines
The old interface should remain unchanged in that
include/mtd/mtd-abi.h. If an application using the old interface calls any of the ecc ioctls for a nand chip with > 64 bytes ecc it should return an error.I still think the eccpos field should be a pointer, so that it can allocate as much space as is needed for the ecc. This also means that the kernel doesn't need to be changed every time a new NAND chips appears with a bigger ecc size.
Yes, dynamic allocation would probably make more sense in the future. However, it seems difficult (or impossible?) to create an arbitrary-sized ioctl; the size is hard-coded into the ioctl definition.
I'm curious how many applications actually need to have the ecclayout. nandwrite doesn't actually use it, just oobinfo.
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
Quoted 3 lines · Brian Norris
I'm curious how many applications actually need to have the ecclayout. nandwrite doesn't actually use it, just oobinfo.
That is good point - I think we should not accept new ioctl before the submitter shows us how and for what he will use it.
My point is simple - OOB layout should be transparent to users-space. Messing with this is error-prone.
Signature · 2 lines
Best Regards, Artem Bityutskiy (???????? ?????)
PATCH 28/74 Incrementing the ecc_pos array to contain 128 char
In reply to Vipin KumarHi,
Quoted 3 lines · Vipin Kumar
I got the point, but this change is essential (at least for me). It may be essential to others as well in near future. Please let me know how to handle more than 64 bytes of ecc
Invent new ioctl, and declare the old one deprecated.
Signature · 2 lines
Best Regards, Artem Bityutskiy (???????? ?????)
PATCH 29/74 Newly erased page read workaround
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
A newly erased page contains ff in data as well as spare area. While reading an erased page, the read out ecc from spare area does not match the ecc generated by fsmc ecc hardware accelarator. This is because ecc of data ff ff is not ff ff. This leads to errors when jffs2 fs erases and reads back the pages to ensure consistency.
This patch adds a software workaround to ensure that the ecc check is not performed for erased pages. An erased page is checked by checking data as ff ff.
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- drivers/mtd/nand/spear_nand.c | 28 ++++++++++++++++++++++------ 1 files changed, 22 insertions(+), 6 deletions(-)
drivers/mtd/nand/spear_nand.c +22 -6
@@ -381,7 +381,7 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,struct spear_nand_data *host =container_of (mtd, struct spear_nand_data, mtd);struct fsmc_eccplace *ecc_place = host->ecc_place; -int i, j, s, stat, eccsize = chip->ecc.size; +int i, j, k, s, stat, eccsize = chip->ecc.size;int eccbytes = chip->ecc.bytes;int eccsteps = chip->ecc.steps;u8 *p = buf;
@@ -421,11 +421,27 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,memcpy (&ecc_code[i], oob,13 ); chip->ecc.calculate (mtd, p, &ecc_calc[i]); - stat = chip->ecc.correct (mtd, p, &ecc_code[i], &ecc_calc[i]); -if (stat <0 ) - mtd->ecc_stats.failed++; -else - mtd->ecc_stats.corrected += stat; +/* +* This is a temporary erase check. A newly erased page read +* would result in an ecc error because the oob data is also +* erased to FF and the calculated ecc for an FF data is not +* FF..FF. +* This is a workaround to skip performing correction in case +* data is FF..FF +*/ +for (k =0 ; k < eccsize; k++) { +if (*(p + k) !=0xff ) +break ; + } + +if (k < eccsize) { + stat = chip->ecc.correct (mtd, p, &ecc_code[i], + &ecc_calc[i]); +if (stat <0 ) + mtd->ecc_stats.failed++; +else + mtd->ecc_stats.corrected += stat; + } }return 0 ;
Signature · 1 line
1.7.2.2
PATCH 25/74 ST SPEAr: Adding support for serial nor flash in all spear platforms
In reply to Viresh KUMARFrom: Shiraz Hashim <[email protected]>
Adding smi device support and enumerating all serial nor flashes present in spear(spear3xx/spear6xx/spear13xx) evaluation boards.
Signed-off-by Shiraz Hashim <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/generic.h | 1 + arch/arm/mach-spear13xx/spear1300_evb.c | 5 ++ arch/arm/mach-spear13xx/spear13xx.c | 19 +++++++ arch/arm/mach-spear3xx/include/mach/generic.h | 1 + arch/arm/mach-spear3xx/spear300_evb.c | 5 ++ arch/arm/mach-spear3xx/spear310_evb.c | 5 ++ arch/arm/mach-spear3xx/spear320_evb.c | 5 ++ arch/arm/mach-spear3xx/spear3xx.c | 19 +++++++ arch/arm/mach-spear6xx/include/mach/generic.h | 1 + arch/arm/mach-spear6xx/spear600_evb.c | 5 ++ arch/arm/mach-spear6xx/spear6xx.c | 19 +++++++ arch/arm/plat-spear/Makefile | 2 +- arch/arm/plat-spear/include/plat/smi.h | 3 + arch/arm/plat-spear/smi.c | 63 ++++++++++++++++++++++++ 14 files changed, 152 insertions(+), 1 deletions(-) create mode 100644 arch/arm/plat-spear/smi.c
arch/arm/mach-spear13xx/include/mach/generic.h +1 -0
@@ -38,6 +38,7 @@ extern struct platform_device kbd_device;extern struct platform_device ohci0_device;extern struct platform_device ohci1_device;extern struct platform_device rtc_device; +extern struct platform_device smi_device;extern struct sys_timer spear13xx_timer;/* Add spear1300 machine device structure declarations here */
arch/arm/mach-spear13xx/spear1300_evb.c +5 -0
@@ -17,6 +17,7 @@#include <mach/generic.h> #include <mach/spear.h> #include <plat/keyboard.h> +#include <plat/smi.h> static struct amba_device *amba_devs[]__initdata = { &gpio_device[0 ],
@@ -32,6 +33,7 @@ static struct platform_device *plat_devs[] __initdata = { &ohci0_device, &ohci1_device, &rtc_device, + &smi_device, };/* keyboard specific platform data */
@@ -56,6 +58,9 @@ static void __init spear1300_evb_init(void)/* Register slave devices on the I2C buses */ i2c_register_board_devices (); +/* initialize serial nor related data in smi plat data */ +smi_init_board_info (&smi_device); +/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));
arch/arm/mach-spear13xx/spear13xx.c +19 -0
@@ -241,6 +241,25 @@ struct platform_device rtc_device = { .resource = rtc_resources, }; +/* smi device registration */ +static struct resource smi_resources[] = { + { + .start =SPEAR13XX_SMI_CTRL_BASE , + .end =SPEAR13XX_SMI_CTRL_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_SMI , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device smi_device = { + .name ="smi" , + .id =-1 , + .num_resources =ARRAY_SIZE (smi_resources), + .resource = smi_resources, +}; +/* Do spear13xx familiy common initialization part here */ void __init spear13xx_init (void ) {
arch/arm/mach-spear3xx/include/mach/generic.h +1 -0
@@ -38,6 +38,7 @@ extern struct platform_device i2c_device;extern struct platform_device ohci0_device;extern struct platform_device ohci1_device;extern struct platform_device rtc_device; +extern struct platform_device smi_device;extern struct sys_timer spear3xx_timer;/* Add spear3xx family function declarations here */
arch/arm/mach-spear3xx/spear300_evb.c +5 -0
@@ -16,6 +16,7 @@#include <mach/generic.h> #include <mach/spear.h> #include <plat/keyboard.h> +#include <plat/smi.h> /* padmux devices to enable */ static struct pmx_dev *pmx_devs[] = {
@@ -50,6 +51,7 @@ static struct platform_device *plat_devs[] __initdata = { &ohci0_device, &ohci1_device, &rtc_device, + &smi_device,/* spear300 specific devices */ &kbd_device,
@@ -82,6 +84,9 @@ static void __init spear300_evb_init(void)/* Register slave devices on the I2C buses */ i2c_register_board_devices (); +/* initialize serial nor related data in smi plat data */ +smi_init_board_info (&smi_device); +/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));
arch/arm/mach-spear3xx/spear310_evb.c +5 -0
@@ -15,6 +15,7 @@#include <asm/mach-types.h> #include <mach/generic.h> #include <mach/spear.h> +#include <plat/smi.h> /* padmux devices to enable */ static struct pmx_dev *pmx_devs[] = {
@@ -55,6 +56,7 @@ static struct platform_device *plat_devs[] __initdata = { &ohci0_device, &ohci1_device, &rtc_device, + &smi_device,/* spear310 specific devices */ &plgpio_device,
@@ -75,6 +77,9 @@ static void __init spear310_evb_init(void)/* Register slave devices on the I2C buses */ i2c_register_board_devices (); +/* initialize serial nor related data in smi plat data */ +smi_init_board_info (&smi_device); +/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));
arch/arm/mach-spear3xx/spear320_evb.c +5 -0
@@ -15,6 +15,7 @@#include <asm/mach-types.h> #include <mach/generic.h> #include <mach/spear.h> +#include <plat/smi.h> /* padmux devices to enable */ static struct pmx_dev *pmx_devs[] = {
@@ -53,6 +54,7 @@ static struct platform_device *plat_devs[] __initdata = { &ohci0_device, &ohci1_device, &rtc_device, + &smi_device,/* spear320 specific devices */ &i2c1_device,
@@ -72,6 +74,9 @@ static void __init spear320_evb_init(void)/* call spear320 machine init function */ spear320_init (); +/* initialize serial nor related data in smi plat data */ +smi_init_board_info (&smi_device); +/* Register slave devices on the I2C buses */ i2c_register_board_devices ();
arch/arm/mach-spear3xx/spear3xx.c +19 -0
@@ -175,6 +175,25 @@ struct platform_device rtc_device = { .resource = rtc_resources, }; +/* smi device registration */ +static struct resource smi_resources[] = { + { + .start =SPEAR3XX_ICM3_SMI_CTRL_BASE , + .end =SPEAR3XX_ICM3_SMI_CTRL_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_BASIC_SMI , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device smi_device = { + .name ="smi" , + .id =-1 , + .num_resources =ARRAY_SIZE (smi_resources), + .resource = smi_resources, +}; +/* Do spear3xx familiy common initialization part here */ void __init spear3xx_init (void ) {
arch/arm/mach-spear6xx/include/mach/generic.h +1 -0
@@ -38,6 +38,7 @@ extern struct platform_device i2c_device;extern struct platform_device ohci0_device;extern struct platform_device ohci1_device;extern struct platform_device rtc_device; +extern struct platform_device smi_device;extern struct sys_timer spear6xx_timer;/* Add spear6xx family function declarations here */
arch/arm/mach-spear6xx/spear600_evb.c +5 -0
@@ -15,6 +15,7 @@#include <asm/mach-types.h> #include <mach/generic.h> #include <mach/spear.h> +#include <plat/smi.h> static struct amba_device *amba_devs[]__initdata = { &clcd_device,
@@ -32,6 +33,7 @@ static struct platform_device *plat_devs[] __initdata = { &ohci0_device, &ohci1_device, &rtc_device, + &smi_device, };static void __init spear600_evb_init (void )
@@ -44,6 +46,9 @@ static void __init spear600_evb_init(void)/* Register slave devices on the I2C buses */ i2c_register_board_devices (); +/* initialize serial nor related data in smi plat data */ +smi_init_board_info (&smi_device); +/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));
arch/arm/mach-spear6xx/spear6xx.c +19 -0
@@ -267,6 +267,25 @@ struct platform_device rtc_device = { .resource = rtc_resources, }; +/* smi device registration */ +static struct resource smi_resources[] = { + { + .start =SPEAR6XX_ICM3_SMI_CTRL_BASE , + .end =SPEAR6XX_ICM3_SMI_CTRL_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_BASIC_SMI , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device smi_device = { + .name ="smi" , + .id =-1 , + .num_resources =ARRAY_SIZE (smi_resources), + .resource = smi_resources, +}; +/* This will add devices, and do machine specific tasks */ void __init spear6xx_init (void ) {
arch/arm/plat-spear/Makefile +1 -1
@@ -3,7 +3,7 @@ # # Common support -obj-y := clcd.o clock.o time.o +obj-y := clcd.o clock.o time.o smi.o obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o obj-$(CONFIG_MACH_SPEAR310) += plgpio.o
arch/arm/plat-spear/include/plat/smi.h +3 -0
@@ -65,4 +65,7 @@ static inline void smi_set_plat_data(struct platform_device *pdev, pdev->dev.platform_data = pdata; } +/* function used to initialize default smi platform data */ +void smi_init_board_info (struct platform_device *pdev); +#endif /* __PLAT_SMI_H */
arch/arm/plat-spear/smi.c new file +63 -0
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Signature · 1 line
1.7.2.2
PATCH 26/74 ST SPEAr: Adding Watchdog support
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 3 ++- arch/arm/mach-spear3xx/include/mach/generic.h | 1 + arch/arm/mach-spear3xx/spear300_evb.c | 1 + arch/arm/mach-spear3xx/spear310_evb.c | 1 + arch/arm/mach-spear3xx/spear320_evb.c | 1 + arch/arm/mach-spear3xx/spear3xx.c | 12 ++++++++++++ arch/arm/mach-spear6xx/include/mach/generic.h | 1 + arch/arm/mach-spear6xx/spear600_evb.c | 1 + arch/arm/mach-spear6xx/spear6xx.c | 12 ++++++++++++ 9 files changed, 32 insertions(+), 1 deletions(-)
arch/arm/mach-spear13xx/clock.c +2 -1
@@ -263,7 +263,8 @@ static struct clk gpt3_clk = {/* watch dog timer clock */ static struct clk wdt_clk = { .flags =ALWAYS_ENABLED , - .pclk = &apb_clk, + .pclk = &cpu_clk, + .div_factor =2 , .recalc = &follow_parent, };
arch/arm/mach-spear3xx/include/mach/generic.h +1 -0
@@ -33,6 +33,7 @@/* Add spear3xx family device structure declarations here */ extern struct amba_device gpio_device;extern struct amba_device uart_device; +extern struct amba_device wdt_device;extern struct platform_device ehci_device;extern struct platform_device i2c_device;extern struct platform_device ohci0_device;
arch/arm/mach-spear3xx/spear300_evb.c +1 -0
@@ -38,6 +38,7 @@ static struct amba_device *amba_devs[] __initdata = {/* spear3xx specific devices */ &gpio_device, &uart_device, + &wdt_device,/* spear300 specific devices */ &clcd_device,
arch/arm/mach-spear3xx/spear310_evb.c +1 -0
@@ -45,6 +45,7 @@ static struct amba_device *amba_devs[] __initdata = {/* spear3xx specific devices */ &gpio_device, &uart_device, + &wdt_device, /* spear310 specific devices */ };
arch/arm/mach-spear3xx/spear320_evb.c +1 -0
@@ -42,6 +42,7 @@ static struct amba_device *amba_devs[] __initdata = {/* spear3xx specific devices */ &gpio_device, &uart_device, + &wdt_device,/* spear320 specific devices */ &clcd_device,
arch/arm/mach-spear3xx/spear3xx.c +12 -0
@@ -54,6 +54,18 @@ struct amba_device uart_device = { .irq = {IRQ_UART, NO_IRQ}, }; +/* watchdog device registeration */ +struct amba_device wdt_device = { + .dev = { + .init_name = "wdt", + }, + .res = { + .start = SPEAR3XX_ICM3_WDT_BASE, + .end = SPEAR3XX_ICM3_WDT_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + /* i2c device registeration */ static struct resource i2c_resources[] = { {
arch/arm/mach-spear6xx/include/mach/generic.h +1 -0
@@ -32,6 +32,7 @@extern struct amba_device clcd_device;extern struct amba_device gpio_device[];extern struct amba_device uart_device[]; +extern struct amba_device wdt_device;extern struct platform_device ehci0_device;extern struct platform_device ehci1_device;extern struct platform_device i2c_device;
arch/arm/mach-spear6xx/spear600_evb.c +1 -0
@@ -24,6 +24,7 @@ static struct amba_device *amba_devs[] __initdata = { &gpio_device[2 ], &uart_device[0 ], &uart_device[1 ], + &wdt_device, }; static struct platform_device *plat_devs[] __initdata = {
arch/arm/mach-spear6xx/spear6xx.c +12 -0
@@ -118,6 +118,18 @@ struct amba_device gpio_device[] = { } }; +/* watchdog device registeration */ +struct amba_device wdt_device = { + .dev = { + .init_name ="wdt" , + }, + .res = { + .start =SPEAR6XX_ICM3_WDT_BASE , + .end =SPEAR6XX_ICM3_WDT_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, +}; +/* i2c device registeration */ static struct resource i2c_resources[] = { {
Signature · 1 line
1.7.2.2
PATCH 30/74 ST SPEAr: Added PCIE host controller base driver support.
In reply to Viresh KUMARFrom: Pratyush Anand <[email protected]>
This driver is based on synopsys DWC version 3.30a.
Intr, MSI, & Hotplug and other interfaces have still to be implemented.
Signed-off-by Pratyush Anand <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/Kconfig | 5 +- arch/arm/mach-spear13xx/Makefile | 1 + arch/arm/mach-spear13xx/include/mach/hardware.h | 7 + arch/arm/mach-spear13xx/include/mach/irqs.h | 25 +- arch/arm/mach-spear13xx/include/mach/misc_regs.h | 20 + arch/arm/mach-spear13xx/include/mach/pcie.h | 169 +++++ arch/arm/mach-spear13xx/pcie.c | 881 ++++++++++++++++++++++ arch/arm/mach-spear13xx/spear1300_evb.c | 31 + arch/arm/mach-spear13xx/spear13xx.c | 28 + arch/arm/plat-spear/Kconfig | 1 + 10 files changed, 1163 insertions(+), 5 deletions(-) create mode 100644 arch/arm/mach-spear13xx/include/mach/pcie.h create mode 100644 arch/arm/mach-spear13xx/pcie.c
arch/arm/Kconfig +4 -1
@@ -1104,7 +1104,9 @@ config ISA_DMA_API bool config PCI - bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX + bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB ||\ + ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX ||\ + ARCH_SPEAR13XX help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside
@@ -1131,6 +1133,7 @@ config PCI_HOST_ITE8152 select DMABOUNCE source "drivers/pci/Kconfig" +source "drivers/pci/pcie/Kconfig" source "drivers/pcmcia/Kconfig"
arch/arm/mach-spear13xx/Makefile +1 -0
@@ -9,6 +9,7 @@ obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o # spear1300 specific files obj-$(CONFIG_MACH_SPEAR1300) += spear1300.o +obj-$(CONFIG_PCIEPORTBUS) += pcie.o # spear1300 boards files obj-$(CONFIG_BOARD_SPEAR1300_EVB) += spear1300_evb.o
arch/arm/mach-spear13xx/include/mach/hardware.h +7 -0
@@ -22,4 +22,11 @@/* typesafe io address */ #define __io_address (n) __io(IO_ADDRESS(n)) +#if defined(CONFIG_PCI ) +#define PCIBIOS_MIN_IO 0 +#define PCIBIOS_MIN_MEM 0 +#define pcibios_assign_all_busses () 0 +#endif + +#endif /* __MACH_HARDWARE_H */
arch/arm/mach-spear13xx/include/mach/irqs.h +21 -4
@@ -80,9 +80,9 @@#define IRQ_USBH_OHCI0 (IRQ_SHPI_START + 65)#define IRQ_USBH_EHCI1 (IRQ_SHPI_START + 66)#define IRQ_USBH_OHCI1 (IRQ_SHPI_START + 67) -#define IRQ_PCIE1 (IRQ_SHPI_START + 68) -#define IRQ_PCIE2 (IRQ_SHPI_START + 69) -#define IRQ_PCIE3 (IRQ_SHPI_START + 70) +#define IRQ_PCIE0 (IRQ_SHPI_START + 68) +#define IRQ_PCIE1 (IRQ_SHPI_START + 69) +#define IRQ_PCIE2 (IRQ_SHPI_START + 70)#define IRQ_GIC_END (IRQ_SHPI_START + 128)
@@ -93,7 +93,24 @@#define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO0_INT_BASE + 8)#define SPEAR_GPIO_INT_END (SPEAR_GPIO1_INT_BASE + 8) -#define VIRQ_END SPEAR_GPIO_INT_END +/* PCIE MSI virtual irqs */ +#define SPEAR_NUM_MSI_IRQS 64 +#define SPEAR_MSI0_INT_BASE (SPEAR_GPIO_INT_END + 0) +#define SPEAR_MSI0_INT_END (SPEAR_MSI0_INT_BASE + SPEAR_NUM_MSI_IRQS) +#define SPEAR_MSI1_INT_BASE (SPEAR_MSI0_INT_END + 0) +#define SPEAR_MSI1_INT_END (SPEAR_MSI1_INT_BASE + SPEAR_NUM_MSI_IRQS) +#define SPEAR_MSI2_INT_BASE (SPEAR_MSI1_INT_END + 0) +#define SPEAR_MSI2_INT_END (SPEAR_MSI2_INT_BASE + SPEAR_NUM_MSI_IRQS) + +#define SPEAR_NUM_INTX_IRQS 4 +#define SPEAR_INTX0_BASE (SPEAR_MSI2_INT_END + 0) +#define SPEAR_INTX0_END (SPEAR_INTX0_BASE + SPEAR_NUM_INTX_IRQS) +#define SPEAR_INTX1_BASE (SPEAR_INTX0_END + 0) +#define SPEAR_INTX1_END (SPEAR_INTX1_BASE + SPEAR_NUM_INTX_IRQS) +#define SPEAR_INTX2_BASE (SPEAR_INTX1_END + 0) +#define SPEAR_INTX2_END (SPEAR_INTX2_BASE + SPEAR_NUM_INTX_IRQS) + +#define VIRQ_END SPEAR_INTX2_END#define NR_IRQS VIRQ_END#endif /* __MACH_IRQS_H */
arch/arm/mach-spear13xx/include/mach/misc_regs.h +20 -0
@@ -202,6 +202,26 @@#define USBPHY_P2_CFG ((unsigned int *)(MISC_BASE + 0x31c))#define USBPHY_P3_CFG ((unsigned int *)(MISC_BASE + 0x320))#define PCIE_CFG ((unsigned int *)(MISC_BASE + 0x324)) +/* PCIE CFG MASks */ +#define PCIE2_CFG_AUX_CLK (1 << 0) +#define PCIE1_CFG_AUX_CLK (1 << 1) +#define PCIE0_CFG_AUX_CLK (1 << 2) +#define PCIE2_CFG_CORE_CLK (1 << 3) +#define PCIE1_CFG_CORE_CLK (1 << 4) +#define PCIE0_CFG_CORE_CLK (1 << 5) +#define PCIE2_CFG_POWERUP_RESET (1 << 6) +#define PCIE1_CFG_POWERUP_RESET (1 << 7) +#define PCIE0_CFG_POWERUP_RESET (1 << 8) +#define PCIE2_CFG_DEVICE_PRESENT (1 << 9) +#define PCIE1_CFG_DEVICE_PRESENT (1 << 10) +#define PCIE0_CFG_DEVICE_PRESENT (1 << 11) +#define PCIE0_CFG_VAL (PCIE0_CFG_AUX_CLK | PCIE0_CFG_CORE_CLK \ + | PCIE0_CFG_POWERUP_RESET | PCIE0_CFG_DEVICE_PRESENT) +#define PCIE1_CFG_VAL (PCIE1_CFG_AUX_CLK | PCIE1_CFG_CORE_CLK \ + | PCIE1_CFG_POWERUP_RESET | PCIE1_CFG_DEVICE_PRESENT) +#define PCIE2_CFG_VAL (PCIE2_CFG_AUX_CLK | PCIE2_CFG_CORE_CLK \ + | PCIE2_CFG_POWERUP_RESET | PCIE2_CFG_DEVICE_PRESENT) +#define PCIE_MIPHY_CFG ((unsigned int *)(MISC_BASE + 0x328))#define PERIP_CFG ((unsigned int *)(MISC_BASE + 0x32c))#define FSMC_CFG ((unsigned int *)(MISC_BASE + 0x330))
arch/arm/mach-spear13xx/include/mach/pcie.h new file +169 -0
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arch/arm/mach-spear13xx/pcie.c new file +881 -0
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arch/arm/mach-spear13xx/spear1300_evb.c +31 -0
@@ -17,6 +17,7 @@#include <asm/mach-types.h> #include <mach/generic.h> #include <mach/spear.h> +#include <mach/pcie.h> #include <plat/keyboard.h> #include <plat/nand.h> #include <plat/smi.h>
@@ -48,6 +49,30 @@ static struct kbd_platform_data kbd_data = { .rep = 1, }; +#ifdef CONFIG_PCIEPORTBUS +/* this function is needed for PCIE host and device driver. Same +* controller can not be programmed as host as well as device. So host +* driver must call this function and if this function returns 1 then +* only host should add that particular port as RC. +* A port to be added as device, one must also add device's information +* in plat_devs array defined in this file. +* it is the responsibility of calling function to not send port number +* greter than max no of controller(3) +*/ +static int spear1300_pcie_port_is_host (int port) +{ +switch (port) { +case 0 : +return 0 ; +case 1 : +return 1 ; +case 2 : +return 1 ; + } +return -EINVAL ; +} +#endif +static void __init spear1300_evb_init (void ) {unsigned int i;
@@ -69,6 +94,12 @@ static void __init spear1300_evb_init(void)/* initialize serial nor related data in smi plat data */ smi_init_board_info (&smi_device); +#ifdef CONFIG_PCIEPORTBUS +/* Enable PCIE0 clk */ +enable_pcie0_clk (); +pcie_init (&spear1300_pcie_port_is_host); +#endif +/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));
arch/arm/mach-spear13xx/spear13xx.c +28 -0
@@ -318,6 +318,34 @@ struct platform_device smi_device = { .resource = smi_resources, }; +#ifdef CONFIG_PCIEPORTBUS +/* PCIE0 clock always needs to be enabled if any of the three PCIE port +* have to be used. So call this function from the board initilization +* file. Ideally , all controller should have been independent from +* others with respect to clock. +*/ +int enable_pcie0_clk (void ) +{ +struct clk *clk; +/*Enable all CLK in CFG registers here only. Idealy only PCIE0 +* should have been enabled. But Controler does not work +* properly if PCIE1 and PCIE2's CFG CLK is enabled in stages. +*/ +writel (PCIE0_CFG_VAL |PCIE1_CFG_VAL |PCIE2_CFG_VAL ,PCIE_CFG ); + clk =clk_get_sys ("pcie0" ,NULL ); +if (!clk) { +pr_err ("%s:couldn't get clk for pcie0\n" , __func__); +return -ENODEV ; + } +if (clk_enable (clk)) { +pr_err ("%s:couldn't enable clk for pcie0\n" , __func__); +return -ENODEV ; + } + +return 0 ; +} +#endif +/* Do spear13xx familiy common initialization part here */ void __init spear13xx_init (void ) {
arch/arm/plat-spear/Kconfig +1 -0
@@ -12,6 +12,7 @@ config ARCH_SPEAR13XX bool "SPEAr13XX" select ARM_GIC select CPU_V7 + select ARCH_SUPPORTS_MSI help Supports for ARM's SPEAR13XX family
Signature · 1 line
1.7.2.2
PATCH 31/74 ST SPEAr: Adding support for SSP PL022
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 2 +- arch/arm/mach-spear13xx/include/mach/generic.h | 1 + arch/arm/mach-spear13xx/spear1300_evb.c | 47 ++++++++++++++ arch/arm/mach-spear13xx/spear13xx.c | 31 ++++++++++ arch/arm/mach-spear3xx/clock.c | 4 +- arch/arm/mach-spear3xx/include/mach/generic.h | 2 + arch/arm/mach-spear3xx/spear300_evb.c | 50 +++++++++++++++ arch/arm/mach-spear3xx/spear310_evb.c | 42 +++++++++++++ arch/arm/mach-spear3xx/spear320.c | 42 +++++++++++++ arch/arm/mach-spear3xx/spear320_evb.c | 46 ++++++++++++++ arch/arm/mach-spear3xx/spear3xx.c | 31 ++++++++++ arch/arm/mach-spear6xx/clock.c | 6 +- arch/arm/mach-spear6xx/include/mach/generic.h | 1 + arch/arm/mach-spear6xx/include/mach/spear.h | 4 +- arch/arm/mach-spear6xx/spear600_evb.c | 51 ++++++++++++++++ arch/arm/mach-spear6xx/spear6xx.c | 68 +++++++++++++++++++++ arch/arm/plat-spear/include/plat/spi.h | 77 ++++++++++++++++++++++++ 17 files changed, 497 insertions(+), 8 deletions(-) create mode 100644 arch/arm/plat-spear/include/plat/spi.h
arch/arm/mach-spear13xx/clock.c +1 -1
@@ -799,7 +799,7 @@ static struct clk_lookup spear_clk_lookups[] = { {.dev_id = "i2s0", .clk = &i2s0_clk}, {.dev_id = "i2s1", .clk = &i2s1_clk}, {.dev_id = "adc", .clk = &adc_clk}, - {.dev_id = "ssp", .clk = &ssp_clk}, + {.dev_id = "ssp-pl022", .clk = &ssp_clk}, {.dev_id = "gpio0", .clk = &gpio0_clk}, {.dev_id = "gpio1", .clk = &gpio1_clk}, {.dev_id = "keyboard", .clk = &kbd_clk},
arch/arm/mach-spear13xx/include/mach/generic.h +1 -0
@@ -30,6 +30,7 @@/* Add spear13xx family device structure declarations here */ extern struct amba_device gpio_device[]; +extern struct amba_device ssp_device;extern struct amba_device uart_device;extern struct platform_device ehci0_device;extern struct platform_device ehci1_device;
arch/arm/mach-spear13xx/spear1300_evb.c +47 -0
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arch/arm/mach-spear13xx/spear13xx.c +31 -0
@@ -12,6 +12,7 @@*/ #include <linux/types.h> +#include <linux/amba/pl022.h> #include <linux/amba/pl061.h> #include <linux/ptrace.h> #include <linux/io.h>
@@ -64,6 +65,36 @@ struct amba_device gpio_device[] = { } }; +/* ssp device registeration */ +static struct pl022_ssp_controller ssp_platform_data = { + .bus_id =0 , + .enable_dma =0 , +/* +* This is number of spi devices that can be connected to spi. There are +* two type of chipselects on which slave devices can work. One is chip +* select provided by spi masters other is controlled through external +* gpio's. We can't use chipselect provided from spi master (because as +* soon as FIFO becomes empty, CS is disabled and transfer ends). So +* this number now depends on number of gpios available for spi. each +* slave on each master requires a separate gpio pin. +*/ + .num_chipselect =2 , +}; + +struct amba_device ssp_device = { + .dev = { + .coherent_dma_mask = ~0 , + .init_name ="ssp-pl022" , + .platform_data = &ssp_platform_data, + }, + .res = { + .start =SPEAR13XX_SSP_BASE , + .end =SPEAR13XX_SSP_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, + .irq = {IRQ_SSP ,NO_IRQ }, +}; +/* uart device registeration */ struct amba_device uart_device = { .dev = {
arch/arm/mach-spear3xx/clock.c +2 -2
@@ -444,7 +444,7 @@ static struct clk adc_clk = { };/* ssp clock */ -static struct clk ssp_clk = { +static struct clk ssp0_clk = { .pclk = &apb_clk, .en_reg =PERIP1_CLK_ENB , .en_reg_bit =SSP_CLK_ENB ,
@@ -543,7 +543,7 @@ static struct clk_lookup spear_clk_lookups[] = { { .dev_id = "c3", .clk = &c3_clk}, /* clock derived from apb clk */ { .dev_id = "adc", .clk = &adc_clk}, - { .dev_id = "ssp", .clk = &ssp_clk}, + { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, { .dev_id = "gpio", .clk = &gpio_clk},#if defined(CONFIG_MACH_SPEAR300 ) || defined(CONFIG_MACH_SPEAR310 ) || \ defined(CONFIG_MACH_SPEAR320 )
arch/arm/mach-spear3xx/include/mach/generic.h +2 -0
@@ -32,6 +32,7 @@/* Add spear3xx family device structure declarations here */ extern struct amba_device gpio_device; +extern struct amba_device ssp0_device;extern struct amba_device uart_device;extern struct amba_device wdt_device;extern struct platform_device ehci_device;
@@ -176,6 +177,7 @@ void __init spear310_init(void);#elif defined(CONFIG_MACH_SPEAR320 )/* Add spear320 machine device structure declarations here */ extern struct amba_device clcd_device; +extern struct amba_device ssp_device[];extern struct platform_device i2c1_device;extern struct platform_device nand_device;extern struct platform_device plgpio_device;
arch/arm/mach-spear3xx/spear300_evb.c +50 -0
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arch/arm/mach-spear3xx/spear310_evb.c +42 -0
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arch/arm/mach-spear3xx/spear320.c +42 -0
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arch/arm/mach-spear3xx/spear320_evb.c +46 -0
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arch/arm/mach-spear3xx/spear3xx.c +31 -0
@@ -12,6 +12,7 @@*/ #include <linux/types.h> +#include <linux/amba/pl022.h> #include <linux/amba/pl061.h> #include <linux/ptrace.h> #include <linux/io.h>
@@ -41,6 +42,36 @@ struct amba_device gpio_device = { .irq = {IRQ_BASIC_GPIO, NO_IRQ}, }; +/* ssp device registeration */ +static struct pl022_ssp_controller ssp_platform_data = { + .bus_id = 0, + .enable_dma = 0, + /* + * This is number of spi devices that can be connected to spi. There are + * two type of chipselects on which slave devices can work. One is chip + * select provided by spi masters other is controlled through external + * gpio's. We can't use chipselect provided from spi master (because as + * soon as FIFO becomes empty, CS is disabled and transfer ends). So + * this number now depends on number of gpios available for spi. each + * slave on each master requires a separate gpio pin. + */ + .num_chipselect = 2, +}; + +struct amba_device ssp0_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "ssp-pl022.0", + .platform_data = &ssp_platform_data, + }, + .res = { + .start = SPEAR3XX_ICM1_SSP_BASE, + .end = SPEAR3XX_ICM1_SSP_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_SSP, NO_IRQ}, +}; + /* uart device registeration */ struct amba_device uart_device = { .dev = {
arch/arm/mach-spear6xx/clock.c +3 -3
@@ -605,9 +605,9 @@ static struct clk_lookup spear_clk_lookups[] = { { .con_id = "fsmc", .clk = &fsmc_clk}, /* clock derived from apb clk */ { .dev_id = "adc", .clk = &adc_clk}, - { .dev_id = "ssp0", .clk = &ssp0_clk}, - { .dev_id = "ssp1", .clk = &ssp1_clk}, - { .dev_id = "ssp2", .clk = &ssp2_clk}, + { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, + { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk}, + { .dev_id = "ssp-pl022.2", .clk = &ssp2_clk}, { .dev_id = "gpio0", .clk = &gpio0_clk}, { .dev_id = "gpio1", .clk = &gpio1_clk}, { .dev_id = "gpio2", .clk = &gpio2_clk},
arch/arm/mach-spear6xx/include/mach/generic.h +1 -0
@@ -31,6 +31,7 @@/* Add spear6xx family device structure declarations here */ extern struct amba_device clcd_device;extern struct amba_device gpio_device[]; +extern struct amba_device ssp_device[];extern struct amba_device uart_device[];extern struct amba_device wdt_device;extern struct platform_device ehci0_device;
arch/arm/mach-spear6xx/include/mach/spear.h +2 -2
@@ -68,8 +68,8 @@#define SPEAR6XX_ICM2_GPIO_BASE 0xD8100000#define SPEAR6XX_ICM2_GPIO_SIZE 0x00080000 -#define SPEAR6XX_ICM2_SPI2_BASE 0xD8180000 -#define SPEAR6XX_ICM2_SPI2_SIZE 0x00080000 +#define SPEAR6XX_ICM2_SSP2_BASE 0xD8180000 +#define SPEAR6XX_ICM2_SSP2_SIZE 0x00080000#define SPEAR6XX_ICM2_ADC_BASE 0xD8200000#define SPEAR6XX_ICM2_ADC_SIZE 0x00080000
arch/arm/mach-spear6xx/spear600_evb.c +51 -0
79 lines not on this page · raw message
arch/arm/mach-spear6xx/spear6xx.c +68 -0
80 lines not on this page · raw message
arch/arm/plat-spear/include/plat/spi.h new file +77 -0
77 lines not on this page · raw message
Signature · 1 line
1.7.2.2
PATCH 31/74 ST SPEAr: Adding support for SSP PL022
arch/arm/mach-spear13xx/clock.c static struct clk_lookup spear_clk_lookups[] = { · line 802
Quoted 10 lines · Viresh KUMAR
arch/arm/mach-spear13xx/clock.c +1
-1@@ -799,7 +799,7 @@ static struct clk_lookup spear_clk_lookups[] = { {.dev_id = "i2s0", .clk = &i2s0_clk}, {.dev_id = "i2s1", .clk = &i2s1_clk}, {.dev_id = "adc", .clk = &adc_clk}, - {.dev_id = "ssp", .clk = &ssp_clk}, + {.dev_id = "ssp-pl022", .clk = &ssp_clk},
All these kinds of changes are just noise in these patches, which add to the review workload (and review tiredness.) Your previous patches added the original definitions. Please roll these changes into your previous patches so that there's less overall changes to look at in your patch series.
It really is not necessary to show how you got from A to B via every minute step.
PATCH 31/74 ST SPEAr: Adding support for SSP PL022
Quoted 9 lines · Russell King - ARM Linux
All these kinds of changes are just noise in these patches, which add to the review workload (and review tiredness.) Your previous patches added the original definitions. Please roll these changes into your previous patches so that there's less overall changes to look at in your patch series.
It really is not necessary to show how you got from A to B via every minute step.
.
Ok.
PATCH 31/74 ST SPEAr: Adding support for SSP PL022
In reply to Viresh KUMAR2010/8/30 Viresh KUMAR <[email protected]>:
arch/arm/mach-spear13xx/spear1300_evb.c
Quoted 5 lines
(...)
arch/arm/mach-spear13xx/spear1300_evb.c +2
-0+/* Currently no gpios are free on eval board so it is kept commented */ +#if 0
Argh!
Quoted 4 lines
arch/arm/mach-spear13xx/spear1300_evb.c +4
-0+/* spi board information */ +/* spi0 flash Chip Select Control function, controlled by gpio pin mentioned */ +DECLARE_SPI_CS_CONTROL(0, flash, /* mention gpio number here */); +/* spi0 flash Chip Info structure */
arch/arm/mach-spear13xx/spear1300_evb.c static struct kbd_platform_data kbd_data = { · line 72
Quoted 10 lines
arch/arm/mach-spear13xx/spear1300_evb.c +10
-0+DECLARE_SPI_CHIP_INFO (0 , flash, spi0_flash_cs_control); + +/* spi0 spidev Chip Select Control function, controlled by gpio pin mentioned */ +DECLARE_SPI_CS_CONTROL(0, dev, /* mention gpio number here */); +/* spi0 spidev Chip Info structure */ +DECLARE_SPI_CHIP_INFO (0 , dev, spi0_dev_cs_control); +#endif + +static struct spi_board_info __initdata spi_board_info[] = { +#if 0
And again!
Quoted 9 lines
+ ? ? ? /* spi0 board info */
+ ? ? ? {
+ ? ? ? ? ? ? ? .modalias = "spidev",
+ ? ? ? ? ? ? ? .controller_data =&spi0_dev_chip_info,
+ ? ? ? ? ? ? ? .max_speed_hz = 10000000,
+ ? ? ? ? ? ? ? .bus_num = 0,
+ ? ? ? ? ? ? ? .chip_select = 0,
+ ? ? ? ? ? ? ? .mode = 0,
+ ? ? ? }, {
Quoted 8 lines
+ ? ? ? ? ? ? ? .modalias = "m25p80",
+ ? ? ? ? ? ? ? .controller_data =&spi0_flash_chip_info,
+ ? ? ? ? ? ? ? .max_speed_hz = 1000000,
+ ? ? ? ? ? ? ? .bus_num = 0,
+ ? ? ? ? ? ? ? .chip_select = 1,
+ ? ? ? ? ? ? ? .mode = 0,
+ ? ? ? }
+#endif
Don't commit commented-out code.
arch/arm/mach-spear3xx/spear300_evb.c static struct kbd_platform_data kbd_data = { · line 88
Quoted 8 lines
(...)
arch/arm/mach-spear3xx/spear300_evb.c +5
-0+/* +* Chip select of spidev, currently no gpio is free on eval board so it is kept +* commented +*/ +#if 0
Again!
arch/arm/mach-spear3xx/spear300_evb.c
Quoted 5 lines
(...)
arch/arm/mach-spear3xx/spear300_evb.c +4
-0+static struct spi_board_info __initdata spi_board_info[] = { + ? ? ? /* spi0 board info */ + ? ? ? { +#if 0
And again!
Quoted 8 lines
+ ? ? ? ? ? ? ? .modalias = "spidev",
+ ? ? ? ? ? ? ? .controller_data =&spi0_dev_chip_info,
+ ? ? ? ? ? ? ? .max_speed_hz = 10000000,
+ ? ? ? ? ? ? ? .bus_num = 0,
+ ? ? ? ? ? ? ? .chip_select = 0,
+ ? ? ? ? ? ? ? .mode = 0,
+ ? ? ? }, {
+#endif
Please grep your code for all #if 0 and remove it.
Yours,
Linus Walleij
PATCH 31/74 ST SPEAr: Adding support for SSP PL022
Quoted 9 lines · Linus Walleij
Quoted 8 lines
arch/arm/mach-spear13xx/spear1300_evb.c static struct kbd_platform_data kbd_data = { · line 89
Quoted 8 lines
arch/arm/mach-spear13xx/spear1300_evb.c +8
-0+ .modalias = "spidev", + .controller_data = &spi0_dev_chip_info, + .max_speed_hz = 10000000, + .bus_num = 0, + .chip_select = 0, + .mode = 0, + }, { +#endif Please grep your code for all #if 0 and remove it.
Sorry for the noise!!! Will correct it.
PATCH 32/74 ST SPEAr: Adding clk_set_rate support
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 74 +++++- arch/arm/mach-spear3xx/clock.c | 54 ++++ arch/arm/mach-spear6xx/clock.c | 58 ++++ arch/arm/plat-spear/clock.c | 423 ++++++++++++++++++++++++++---- arch/arm/plat-spear/include/plat/clock.h | 75 +++++- 5 files changed, 620 insertions(+), 64 deletions(-)
arch/arm/mach-spear13xx/clock.c +73 -1
@@ -87,6 +87,15 @@ static struct pll_clk_config pll1_config = { .masks = &pll_masks, }; +/* pll rate configuration table, in ascending order of rates */ +struct pll_rate_tbl pll_rtbl[] = { +/* PCLK 24MHz */ + {.mode =0 , .m =0x7D , .n =0x03 , .p =0x2 },/* 500 MHz */ + {.mode =0 , .m =0xA6 , .n =0x03 , .p =0x2 },/* 664 MHz */ + {.mode =0 , .m =0xC8 , .n =0x03 , .p =0x2 },/* 800 MHz */ + {.mode =0 , .m =0xFA , .n =0x06 , .p =0x1 },/* 1000 MHz */ +}; +/* pll1 clock */ static struct clk pll1_clk = { .flags =ENABLED_ON_INIT ,
@@ -94,7 +103,10 @@ static struct clk pll1_clk = { .pclk_sel_shift = PLL1_CLK_SHIFT, .en_reg = PLL1_CTR, .en_reg_bit = PLL_ENABLE, + .calc_rate = &pll_calc_rate, .recalc = &pll_clk_recalc, + .set_rate = &pll_clk_set_rate, + .rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 3}, .private_data = &pll1_config, };
@@ -127,7 +139,10 @@ static struct clk pll2_clk = { .pclk_sel_shift = PLL2_CLK_SHIFT, .en_reg = PLL2_CTR, .en_reg_bit = PLL_ENABLE, + .calc_rate = &pll_calc_rate, .recalc = &pll_clk_recalc, + .set_rate = &pll_clk_set_rate, + .rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 3}, .private_data = &pll2_config, };
@@ -144,7 +159,10 @@ static struct clk pll3_clk = { .pclk_sel_shift = PLL3_CLK_SHIFT, .en_reg = PLL3_CTR, .en_reg_bit = PLL_ENABLE, + .calc_rate = &pll_calc_rate, .recalc = &pll_clk_recalc, + .set_rate = &pll_clk_set_rate, + .rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 3}, .private_data = &pll3_config, };
@@ -155,13 +173,24 @@ static struct pll_clk_config pll4_config = { .masks = &pll_masks, }; +/* pll4 rate configuration table, in ascending order of rates */ +struct pll_rate_tbl pll4_rtbl[] = { + {.mode =0 , .m =0x7D , .n =0x03 , .p =0x2 },/* 500 MHz */ + {.mode =0 , .m =0xA6 , .n =0x03 , .p =0x2 },/* 664 MHz */ + {.mode =0 , .m =0xC8 , .n =0x03 , .p =0x2 },/* 800 MHz */ + {.mode =0 , .m =0xFA , .n =0x06 , .p =0x1 },/* 1000 MHz */ +}; +/* pll4 (DDR) clock */ static struct clk pll4_clk = { .flags =ENABLED_ON_INIT , .pclk = &osc1_24m_clk, .en_reg =PLL4_CTR , .en_reg_bit =PLL_ENABLE , + .calc_rate = &pll_calc_rate, .recalc = &pll_clk_recalc, + .set_rate = &pll_clk_set_rate, + .rate_config = {pll4_rtbl,ARRAY_SIZE (pll4_rtbl),3 }, .private_data = &pll4_config, };
@@ -287,12 +316,24 @@ static struct aux_clk_config uart_synth_config = { .masks = &aux_masks, }; +/* aux rate configuration table, in ascending order of rates */ +struct aux_rate_tbl aux_rtbl[] = { +/* For PLL1div2 = 500 MHz */ + {.xscale =1 , .yscale =6 , .eq =1 },/* 83 MHz */ + {.xscale =1 , .yscale =4 , .eq =1 },/* 125 MHz */ + {.xscale =1 , .yscale =3 , .eq =1 },/* 166 MHz */ + {.xscale =1 , .yscale =2 , .eq =1 },/* 250 MHz */ +}; +/* uart synth clock */ static struct clk uart_synth_clk = { .en_reg =UART_CLK_SYNT , .en_reg_bit =AUX_SYNT_ENB , .pclk = &pll1div2_clk, + .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, + .set_rate = &aux_clk_set_rate, + .rate_config = {aux_rtbl,ARRAY_SIZE (aux_rtbl),0 }, .private_data = &uart_synth_config, };
@@ -335,8 +376,11 @@ static struct clk sd_synth_clk = { .en_reg = SD_CLK_SYNT, .en_reg_bit = AUX_SYNT_ENB, .pclk = &pll1div2_clk, + .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, - .private_data = &sd_synth_config, + .set_rate = &aux_clk_set_rate, + .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2}, + .private_data = &sdhci_synth_config, };/* sd clock */
@@ -358,7 +402,10 @@ static struct clk cfxd_synth_clk = { .en_reg = CFXD_CLK_SYNT, .en_reg_bit = AUX_SYNT_ENB, .pclk = &pll1div2_clk, + .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, + .set_rate = &aux_clk_set_rate, + .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2}, .private_data = &cfxd_synth_config, };
@@ -381,7 +428,10 @@ static struct clk c3_synth_clk = { .en_reg = C3_CLK_SYNT, .en_reg_bit = AUX_SYNT_ENB, .pclk = &pll1div2_clk, + .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, + .set_rate = &aux_clk_set_rate, + .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 0}, .private_data = &c3_synth_config, };
@@ -453,11 +503,23 @@ static struct clk gmac_phy_input_clk = { .recalc = &follow_parent, }; +/* gmac rate configuration table, in ascending order of rates */ +struct aux_rate_tbl gmac_rtbl[] = { +/* For gmac phy input clk */ + {.xscale =1 , .yscale =6 , .eq =1 },/* divided by 6 */ + {.xscale =1 , .yscale =4 , .eq =1 },/* divided by 4 */ + {.xscale =1 , .yscale =3 , .eq =1 },/* divided by 3 */ + {.xscale =1 , .yscale =2 , .eq =1 },/* divided by 2 */ +}; +static struct clk gmac_phy_synth_clk = { .en_reg =GMAC_CLK_CFG , .en_reg_bit =GMAC_PHY_SYNT_ENB , .pclk = &gmac_phy_input_clk, + .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, + .set_rate = &aux_clk_set_rate, + .rate_config = {gmac_rtbl,ARRAY_SIZE (gmac_rtbl),0 }, .private_data = &gmac_phy_synth_config, };
@@ -518,13 +580,23 @@ static struct pclk_sel clcd_synth_pclk_sel = { .pclk_sel_mask = CLCD_SYNT_CLK_MASK, }; +/* clcd rate configuration table, in ascending order of rates */ +struct clcd_rate_tbl clcd_rtbl[] = { +/* For pll1div4 = 250 MHz */ + {.div =0x4000 },/* 62.5 MHz */ + {.div =0x2000 },/* 125 MHz */ +}; +/* clcd synth clock */ static struct clk clcd_synth_clk = { .en_reg =CLCD_CLK_SYNT , .en_reg_bit =CLCD_SYNT_ENB , .pclk_sel = &clcd_synth_pclk_sel, .pclk_sel_shift =CLCD_SYNT_CLK_SHIFT , + .calc_rate = &clcd_calc_rate, .recalc = &clcd_clk_recalc, + .set_rate = &clcd_clk_set_rate, + .rate_config = {clcd_rtbl,ARRAY_SIZE (clcd_rtbl),1 }, .private_data = &clcd_synth_config, };
arch/arm/mach-spear3xx/clock.c +54 -0
131 lines not on this page · raw message
arch/arm/mach-spear6xx/clock.c +58 -0
148 lines not on this page · raw message
arch/arm/plat-spear/clock.c +368 -55
584 lines not on this page · raw message
arch/arm/plat-spear/include/plat/clock.h +67 -8
126 lines not on this page · raw message
Signature · 1 line
1.7.2.2
PATCH 32/74 ST SPEAr: Adding clk_set_rate support
Quoted 3 lines · Viresh KUMAR
Signed-off-by Viresh Kumar <[email protected]>Signed-off-by Rajeev Kumar <[email protected]>Signed-off-by shiraz hashim <[email protected]>
Can't this patch be rolled into a previous patch - especially as it deletes a load of code added by that previous patch (eg, clk_is_enabled)? It doesn't look like it depends on the other various changes between that patch and this one.
PATCH 32/74 ST SPEAr: Adding clk_set_rate support
Quoted 11 lines · Russell King - ARM Linux
Quoted 3 lines · Viresh KUMAR
Signed-off-by Viresh Kumar <[email protected]>Signed-off-by Rajeev Kumar <[email protected]>Signed-off-by shiraz hashim <[email protected]>Can't this patch be rolled into a previous patch - especially as it deletes a load of code added by that previous patch (eg,
clk_is_enabled)? It doesn't look like it depends on the other various changes between that patch and this one.
.
OK.
PATCH 33/74 ST SPEAr: Adding support for SDHCI (SDIO)
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 24 ++++---- arch/arm/mach-spear13xx/include/mach/generic.h | 1 + arch/arm/mach-spear13xx/include/mach/irqs.h | 2 +- arch/arm/mach-spear13xx/include/mach/misc_regs.h | 4 +- arch/arm/mach-spear13xx/include/mach/spear.h | 2 +- arch/arm/mach-spear13xx/spear1300_evb.c | 1 + arch/arm/mach-spear13xx/spear13xx.c | 22 ++++++++ arch/arm/mach-spear3xx/clock.c | 15 +++++ arch/arm/mach-spear3xx/include/mach/generic.h | 13 +++-- arch/arm/mach-spear3xx/include/mach/irqs.h | 4 +- arch/arm/mach-spear3xx/include/mach/spear300.h | 4 +- arch/arm/mach-spear3xx/include/mach/spear320.h | 6 +- arch/arm/mach-spear3xx/spear300.c | 62 ++++++++++++++++++---- arch/arm/mach-spear3xx/spear300_evb.c | 18 ++++++- arch/arm/mach-spear3xx/spear320.c | 43 ++++++++++++---- arch/arm/mach-spear3xx/spear320_evb.c | 15 +++++- 16 files changed, 187 insertions(+), 49 deletions(-)
arch/arm/mach-spear13xx/clock.c +12 -12
@@ -365,15 +365,15 @@ static struct clk uart_clk = { .recalc = &follow_parent, }; -/* sd configurations */ -static struct aux_clk_config sd_synth_config = { - .synth_reg =SD_CLK_SYNT , +/* sdhci configurations */ +static struct aux_clk_config sdhci_synth_config = { + .synth_reg =SDHCI_CLK_SYNT , .masks = &aux_masks, }; -/* sd synth clock */ -static struct clk sd_synth_clk = { - .en_reg =SD_CLK_SYNT , +/* sdhci synth clock */ +static struct clk sdhci_synth_clk = { + .en_reg =SDHCI_CLK_SYNT , .en_reg_bit =AUX_SYNT_ENB , .pclk = &pll1div2_clk, .calc_rate = &aux_calc_rate,
@@ -383,11 +383,11 @@ static struct clk sd_synth_clk = { .private_data = &sdhci_synth_config, }; -/* sd clock */ -static struct clk sd_clk = { +/* sdhci clock */ +static struct clk sdhci_clk = { .en_reg =PERIP1_CLK_ENB , - .en_reg_bit =SD_CLK_ENB , - .pclk = &sd_synth_clk, + .en_reg_bit =SDHCI_CLK_ENB , + .pclk = &sdhci_synth_clk, .recalc = &follow_parent, };
@@ -833,7 +833,7 @@ static struct clk_lookup spear_clk_lookups[] = { {.con_id = "gmii_txclk123_pad_clk", .clk = &gmii_txclk125_pad}, {.con_id = "clcd_synth_clk", .clk = &clcd_synth_clk}, {.con_id = "uart_synth_clk", .clk = &uart_synth_clk}, - {.con_id = "sd_synth_clk", .clk = &sd_synth_clk}, + {.con_id = "sdhci_synth_clk", .clk = &sdhci_synth_clk}, {.con_id = "cfxd_synth_clk", .clk = &cfxd_synth_clk}, {.con_id = "gmac_phy_input_clk", .clk = &gmac_phy_input_clk}, {.con_id = "gmac_phy_synth_clk", .clk = &gmac_phy_synth_clk},
@@ -862,7 +862,7 @@ static struct clk_lookup spear_clk_lookups[] = { {.dev_id = "pcie1", .clk = &pcie1_clk}, {.dev_id = "pcie2", .clk = &pcie2_clk}, {.dev_id = "cfxd", .clk = &cfxd_clk}, - {.dev_id = "sd", .clk = &sd_clk}, + {.dev_id = "sdhci", .clk = &sdhci_clk}, {.con_id = "fsmc", .clk = &fsmc_clk}, {.dev_id = "sysram0", .clk = &sysram0_clk}, {.dev_id = "sysram1", .clk = &sysram1_clk},
arch/arm/mach-spear13xx/include/mach/generic.h +1 -0
@@ -40,6 +40,7 @@ extern struct platform_device nand_device;extern struct platform_device ohci0_device;extern struct platform_device ohci1_device;extern struct platform_device rtc_device; +extern struct platform_device sdhci_device;extern struct platform_device smi_device;extern struct sys_timer spear13xx_timer;
arch/arm/mach-spear13xx/include/mach/irqs.h +1 -1
@@ -45,7 +45,7 @@#define IRQ_GPIO1 (IRQ_SHPI_START + 25)#define IRQ_PLAY_I2S1 (IRQ_SHPI_START + 26)#define IRQ_JPEG (IRQ_SHPI_START + 27) -#define IRQ_MMC (IRQ_SHPI_START + 28) +#define IRQ_SDHCI (IRQ_SHPI_START + 28)#define IRQ_CF (IRQ_SHPI_START + 29)#define IRQ_SMI (IRQ_SHPI_START + 30)#define IRQ_SSP (IRQ_SHPI_START + 31)
arch/arm/mach-spear13xx/include/mach/misc_regs.h +2 -2
@@ -120,7 +120,7 @@#define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x254))#define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x258)) -#define SD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x25c)) +#define SDHCI_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x25c))#define CFXD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x260))#define RAS_CLK_SYNT0 ((unsigned int *)(MISC_BASE + 0x264))#define RAS_CLK_SYNT1 ((unsigned int *)(MISC_BASE + 0x268))
@@ -145,7 +145,7 @@#define SYSRAM0_CLK_ENB 3#define FSMC_CLK_ENB 4#define SMI_CLK_ENB 5 -#define SD_CLK_ENB 6 +#define SDHCI_CLK_ENB 6#define CFXD_CLK_ENB 7#define GMAC_CLK_ENB 8#define UHC0_CLK_ENB 9
arch/arm/mach-spear13xx/include/mach/spear.h +1 -1
@@ -84,7 +84,7 @@#define SPEAR13XX_FSMC_BASE 0xB0000000#define SPEAR13XX_JPEG_BASE 0xB2000000#define SPEAR13XX_MCIF_CF_BASE 0xB2800000 -#define SPEAR13XX_MCIF_MMC_BASE 0xB3000000 +#define SPEAR13XX_MCIF_SDHCI_BASE 0xB3000000/* Debug uart for linux, will be used for debug and uncompress messages */ #define SPEAR_DBG_UART_BASE SPEAR13XX_UART_BASE
arch/arm/mach-spear13xx/spear1300_evb.c +1 -0
@@ -42,6 +42,7 @@ static struct platform_device *plat_devs[] __initdata = { &ohci0_device, &ohci1_device, &rtc_device, + &sdhci_device, &smi_device, };
arch/arm/mach-spear13xx/spear13xx.c +22 -0
@@ -377,6 +377,28 @@ int enable_pcie0_clk(void) }#endif +/* sdhci (sdio) device declaration */ +static struct resource sdhci_resources[] = { + { + .start =SPEAR13XX_MCIF_SDHCI_BASE , + .end =SPEAR13XX_MCIF_SDHCI_BASE +SZ_256 -1 , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_SDHCI , + .flags =IORESOURCE_IRQ , + } +}; + +struct platform_device sdhci_device = { + .dev = { + .coherent_dma_mask = ~0 , + }, + .name ="sdhci" , + .id =-1 , + .num_resources =ARRAY_SIZE (sdhci_resources), + .resource = sdhci_resources, +}; +/* Do spear13xx familiy common initialization part here */ void __init spear13xx_init (void ) {
arch/arm/mach-spear3xx/clock.c +15 -0
@@ -525,6 +525,16 @@ static struct clk fsmc_clk = { };#endif +/* common clocks to spear300 and spear320 */ +#if defined(CONFIG_MACH_SPEAR300 ) || defined(CONFIG_MACH_SPEAR320 ) +/* sdhci clock */ +static struct clk sdhci_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ahb_clk, + .recalc = &follow_parent, +}; +#endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */ +/* spear300 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR300 /* keyboard clock */
@@ -618,6 +628,11 @@ static struct clk_lookup spear_clk_lookups[] = { { .dev_id = "i2c_designware.1", .clk = &i2c1_clk}, { .dev_id = "pwm", .clk = &pwm_clk}, #endif + + /* common clock to spear300 and spear320 */ +#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320) + { .dev_id = "sdhci", .clk = &sdhci_clk}, +#endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */ }; void __init clk_init(void)
arch/arm/mach-spear3xx/include/mach/generic.h +9 -4
@@ -116,6 +116,7 @@ extern struct platform_device nand0_device;extern struct platform_device nand1_device;extern struct platform_device nand2_device;extern struct platform_device nand3_device; +extern struct platform_device sdhci_device;/* pad mux modes */ extern struct pmx_mode nand_mode;
@@ -144,12 +145,15 @@ extern struct pmx_dev pmx_telecom_camera;extern struct pmx_dev pmx_telecom_dac;extern struct pmx_dev pmx_telecom_i2s;extern struct pmx_dev pmx_telecom_boot_pins; -extern struct pmx_dev pmx_telecom_sdio_4bit; -extern struct pmx_dev pmx_telecom_sdio_8bit; +extern struct pmx_dev pmx_telecom_sdhci_4bit; +extern struct pmx_dev pmx_telecom_sdhci_8bit;extern struct pmx_dev pmx_gpio1;/* Add spear300 machine function declarations here */ void __init spear300_init (void ); +#define SDHCI_MEM_ENB 0x1 +#define I2S_MEM_ENB 0x2 +void sdhci_i2s_mem_enable (u8 mask);/* Add misc structure declarations here */ extern struct clcd_board clcd_plat_data;
@@ -182,6 +186,7 @@ extern struct platform_device i2c1_device;extern struct platform_device nand_device;extern struct platform_device plgpio_device;extern struct platform_device pwm_device; +extern struct platform_device sdhci_device;/* pad mux modes */ extern struct pmx_mode auto_net_smii_mode;
@@ -194,14 +199,14 @@ extern struct pmx_dev pmx_clcd;extern struct pmx_dev pmx_emi;extern struct pmx_dev pmx_fsmc;extern struct pmx_dev pmx_spp; -extern struct pmx_dev pmx_sdio; +extern struct pmx_dev pmx_sdhci;extern struct pmx_dev pmx_i2s;extern struct pmx_dev pmx_uart1;extern struct pmx_dev pmx_uart1_modem;extern struct pmx_dev pmx_uart2;extern struct pmx_dev pmx_touchscreen;extern struct pmx_dev pmx_can; -extern struct pmx_dev pmx_sdio_led; +extern struct pmx_dev pmx_sdhci_led;extern struct pmx_dev pmx_pwm0;extern struct pmx_dev pmx_pwm1;extern struct pmx_dev pmx_pwm2;
arch/arm/mach-spear3xx/include/mach/irqs.h +2 -2
@@ -69,7 +69,7 @@#define IRQ_CLCD IRQ_GEN_RAS_3/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ -#define IRQ_SDIO IRQ_INTRCOMM_RAS_ARM +#define IRQ_SDHCI IRQ_INTRCOMM_RAS_ARM/* GPIO pins virtual irqs */ #define SPEAR_GPIO_INT_BASE (VIRQ_START + 9)
@@ -115,7 +115,7 @@#define VIRQ_SPP (VIRQ_START + 2)/* IRQs sharing IRQ_GEN_RAS_2 */ -#define IRQ_SDIO IRQ_GEN_RAS_2 +#define IRQ_SDHCI IRQ_GEN_RAS_2/* IRQs sharing IRQ_GEN_RAS_3 */ #define VIRQ_PLGPIO (VIRQ_START + 3)
arch/arm/mach-spear3xx/include/mach/spear300.h +2 -2
@@ -39,8 +39,8 @@#define SPEAR300_CLCD_BASE 0x60000000#define SPEAR300_CLCD_SIZE 0x10000000 -#define SPEAR300_SDIO_BASE 0x70000000 -#define SPEAR300_SDIO_SIZE 0x10000000 +#define SPEAR300_SDHCI_BASE 0x70000000 +#define SPEAR300_SDHCI_SIZE 0x10000000#define SPEAR300_NAND_0_BASE 0x80000000#define SPEAR300_NAND_0_SIZE 0x04000000
arch/arm/mach-spear3xx/include/mach/spear320.h +3 -3
@@ -28,8 +28,8 @@#define SPEAR320_I2S_BASE 0x60000000#define SPEAR320_I2S_SIZE 0x10000000 -#define SPEAR320_SDIO_BASE 0x70000000 -#define SPEAR320_SDIO_SIZE 0x10000000 +#define SPEAR320_SDHCI_BASE 0x70000000 +#define SPEAR320_SDHCI_SIZE 0x10000000#define SPEAR320_CLCD_BASE 0x90000000#define SPEAR320_CLCD_SIZE 0x10000000
@@ -77,7 +77,7 @@#define EMI_IRQ_MASK (1 << 7)#define CLCD_IRQ_MASK (1 << 8)#define SPP_IRQ_MASK (1 << 9) -#define SDIO_IRQ_MASK (1 << 10) +#define SDHCI_IRQ_MASK (1 << 10)#define CAN_U_IRQ_MASK (1 << 11)#define CAN_L_IRQ_MASK (1 << 12)#define UART1_IRQ_MASK (1 << 13)
arch/arm/mach-spear3xx/spear300.c +52 -10
95 lines not on this page · raw message
arch/arm/mach-spear3xx/spear300_evb.c +17 -1
@@ -16,6 +16,7 @@#include <asm/mach-types.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h> +#include <linux/mmc/sdhci-spear.h> #include <mach/generic.h> #include <mach/gpio.h> #include <mach/spear.h>
@@ -36,7 +37,7 @@ static struct pmx_dev *pmx_devs[] = {/* spear300 specific devices */ &pmx_fsmc_2_chips, &pmx_clcd, - &pmx_telecom_sdio_4bit, + &pmx_telecom_sdhci_4bit, &pmx_gpio1, };
@@ -64,6 +65,15 @@ static struct platform_device *plat_devs[] __initdata = {/* spear300 specific devices */ &kbd_device, + &sdhci_device, +}; + +/* sdhci board specific information */ +static struct sdhci_plat_data sdhci_plat_data = { + .card_power_gpio =RAS_GPIO_2 , + .power_active_high =0 , + .power_always_enb =0 , + .card_int_gpio =RAS_GPIO_0 , };/* keyboard specific platform data */
@@ -134,6 +144,12 @@ static void __init spear300_evb_init(void)nand_set_plat_data (&nand0_device,NULL ,0 ,NAND_SKIP_BBTSCAN ,SPEAR_NAND_BW8 ); +/* set sdhci device platform data */ +sdhci_set_plat_data (&sdhci_device, &sdhci_plat_data); + +/* Enable sdhci memory */ +sdhci_i2s_mem_enable (SDHCI_MEM_ENB ); +/* call spear300 machine init function */ spear300_init ();
arch/arm/mach-spear3xx/spear320.c +33 -10
79 lines not on this page · raw message
arch/arm/mach-spear3xx/spear320_evb.c +14 -1
@@ -15,6 +15,7 @@#include <asm/mach/arch.h> #include <asm/mach-types.h> #include <linux/spi/flash.h> +#include <linux/mmc/sdhci-spear.h> #include <linux/spi/spi.h> #include <mach/generic.h> #include <mach/gpio.h>
@@ -33,7 +34,7 @@ static struct pmx_dev *pmx_devs[] = {/* spear320 specific devices */ &pmx_fsmc, - &pmx_sdio, + &pmx_sdhci, &pmx_i2s, &pmx_uart1, &pmx_uart2,
@@ -68,6 +69,15 @@ static struct platform_device *plat_devs[] __initdata = { &i2c1_device, &plgpio_device, &pwm_device, + &sdhci_device, +}; + +/* sdhci board specific information */ +static struct sdhci_plat_data sdhci_plat_data = { + .card_power_gpio =PLGPIO_61 , + .power_active_high =0 , + .power_always_enb =1 , + .card_int_gpio =-1 , };/* Currently no gpios are free on eval board so it is kept commented */
@@ -114,6 +124,9 @@ static void __init spear320_evb_init(void) {unsigned int i; +/* set sdhci device platform data */ +sdhci_set_plat_data (&sdhci_device, &sdhci_plat_data); +/* padmux initialization, must be done before spear320_init */ pmx_driver.mode = &auto_net_mii_mode; pmx_driver.devs = pmx_devs;
Signature · 1 line
1.7.2.2
PATCH 34/74 ST SPEAr: Changing resource size of amba devices to SZ_4K
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
--- arch/arm/mach-spear3xx/spear300.c | 2 +- arch/arm/mach-spear3xx/spear320.c | 2 +- arch/arm/mach-spear3xx/spear3xx.c | 2 +- arch/arm/mach-spear6xx/spear6xx.c | 8 +++----- 4 files changed, 6 insertions(+), 8 deletions(-)
arch/arm/mach-spear3xx/spear300.c +1 -1
@@ -382,7 +382,7 @@ struct amba_device clcd_device = { }, .res = { .start = SPEAR300_CLCD_BASE, - .end = SPEAR300_CLCD_BASE + SPEAR300_CLCD_SIZE - 1, + .end = SPEAR300_CLCD_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .dma_mask = ~0,
arch/arm/mach-spear3xx/spear320.c +1 -1
@@ -399,7 +399,7 @@ struct amba_device clcd_device = { }, .res = { .start = SPEAR320_CLCD_BASE, - .end = SPEAR320_CLCD_BASE + SPEAR320_CLCD_SIZE - 1, + .end = SPEAR320_CLCD_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .dma_mask = ~0,
arch/arm/mach-spear3xx/spear3xx.c +1 -1
@@ -79,7 +79,7 @@ struct amba_device uart_device = { }, .res = { .start = SPEAR3XX_ICM1_UART_BASE, - .end = SPEAR3XX_ICM1_UART_BASE + SPEAR3XX_ICM1_UART_SIZE - 1, + .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = {IRQ_UART, NO_IRQ},
arch/arm/mach-spear6xx/spear6xx.c +3 -5
@@ -35,7 +35,7 @@ struct amba_device clcd_device = { }, .res = { .start = SPEAR6XX_ICM3_CLCD_BASE, - .end = SPEAR6XX_ICM3_CLCD_BASE + SPEAR6XX_ICM3_CLCD_SIZE - 1, + .end = SPEAR6XX_ICM3_CLCD_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .dma_mask = ~0,
@@ -117,8 +117,7 @@ struct amba_device uart_device[] = { }, .res = { .start = SPEAR6XX_ICM1_UART0_BASE, - .end = SPEAR6XX_ICM1_UART0_BASE + - SPEAR6XX_ICM1_UART0_SIZE - 1, + .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = {IRQ_UART_0, NO_IRQ},
@@ -128,8 +127,7 @@ struct amba_device uart_device[] = { }, .res = { .start = SPEAR6XX_ICM1_UART1_BASE, - .end = SPEAR6XX_ICM1_UART1_BASE + - SPEAR6XX_ICM1_UART1_SIZE - 1, + .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = {IRQ_UART_1, NO_IRQ},
Signature · 1 line
1.7.2.2
PATCH 35/74 ST SPEAr: Enabling clocks before amba device registeration
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/generic.h | 1 + arch/arm/mach-spear13xx/spear1300_evb.c | 5 +-- arch/arm/mach-spear3xx/include/mach/generic.h | 1 + arch/arm/mach-spear3xx/spear300_evb.c | 7 +--- arch/arm/mach-spear3xx/spear310_evb.c | 7 +--- arch/arm/mach-spear3xx/spear320_evb.c | 7 +--- arch/arm/mach-spear6xx/include/mach/generic.h | 1 + arch/arm/mach-spear6xx/spear600_evb.c | 7 +--- arch/arm/plat-spear/include/plat/device.h | 37 ++++++++++++++++++++++++ 9 files changed, 49 insertions(+), 24 deletions(-) create mode 100644 arch/arm/plat-spear/include/plat/device.h
arch/arm/mach-spear13xx/include/mach/generic.h +1 -0
@@ -19,6 +19,7 @@#include <linux/init.h> #include <linux/platform_device.h> #include <linux/amba/bus.h> +#include <plat/device.h> /* * Each GPT has 2 timer channels
arch/arm/mach-spear13xx/spear1300_evb.c +1 -4
@@ -121,8 +121,6 @@ static int spear1300_pcie_port_is_host(int port)static void __init spear1300_evb_init (void ) { -unsigned int i; -/* set keyboard plat data */ kbd_set_plat_data (&kbd_device, &kbd_data);
@@ -150,8 +148,7 @@ static void __init spear1300_evb_init(void)platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));/* Add Amba Devices */ -for (i =0 ; i <ARRAY_SIZE (amba_devs); i++) -amba_device_register (amba_devs[i], &iomem_resource); +spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs));spi_init (); }
arch/arm/mach-spear3xx/include/mach/generic.h +1 -0
@@ -19,6 +19,7 @@#include <linux/init.h> #include <linux/platform_device.h> #include <linux/amba/bus.h> +#include <plat/device.h> #include <plat/padmux.h> /* spear3xx declarations */
arch/arm/mach-spear3xx/spear300_evb.c +2 -5
@@ -11,9 +11,9 @@* warranty of any kind, whether express or implied. */ -#include <linux/mtd/nand.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> +#include <linux/mtd/nand.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h> #include <linux/mmc/sdhci-spear.h>
@@ -130,8 +130,6 @@ static void __init spi_init(void)static void __init spear300_evb_init (void ) { -unsigned int i; -/* padmux initialization, must be done before spear300_init */ pmx_driver.mode = &photo_frame_mode; pmx_driver.devs = pmx_devs;
@@ -163,8 +161,7 @@ static void __init spear300_evb_init(void)platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));/* Add Amba Devices */ -for (i =0 ; i <ARRAY_SIZE (amba_devs); i++) -amba_device_register (amba_devs[i], &iomem_resource); +spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs));spi_init (); }
arch/arm/mach-spear3xx/spear310_evb.c +2 -5
@@ -11,9 +11,9 @@* warranty of any kind, whether express or implied. */ -#include <linux/mtd/nand.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> +#include <linux/mtd/nand.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h> #include <mach/generic.h>
@@ -108,8 +108,6 @@ static void __init spi_init(void)static void __init spear310_evb_init (void ) { -unsigned int i; -/* padmux initialization, must be done before spear310_init */ pmx_driver.mode =NULL ; pmx_driver.devs = pmx_devs;
@@ -132,8 +130,7 @@ static void __init spear310_evb_init(void)platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));/* Add Amba Devices */ -for (i =0 ; i <ARRAY_SIZE (amba_devs); i++) -amba_device_register (amba_devs[i], &iomem_resource); +spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs));spi_init (); }
arch/arm/mach-spear3xx/spear320_evb.c +2 -5
@@ -11,9 +11,9 @@* warranty of any kind, whether express or implied. */ -#include <linux/mtd/nand.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> +#include <linux/mtd/nand.h> #include <linux/spi/flash.h> #include <linux/mmc/sdhci-spear.h> #include <linux/spi/spi.h>
@@ -122,8 +122,6 @@ static void __init spi_init(void)static void __init spear320_evb_init (void ) { -unsigned int i; -/* set sdhci device platform data */ sdhci_set_plat_data (&sdhci_device, &sdhci_plat_data);
@@ -149,8 +147,7 @@ static void __init spear320_evb_init(void)platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));/* Add Amba Devices */ -for (i =0 ; i <ARRAY_SIZE (amba_devs); i++) -amba_device_register (amba_devs[i], &iomem_resource); +spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs));spi_init (); }
arch/arm/mach-spear6xx/include/mach/generic.h +1 -0
@@ -19,6 +19,7 @@#include <linux/init.h> #include <linux/platform_device.h> #include <linux/amba/bus.h> +#include <plat/device.h> /* * Each GPT has 2 timer channels
arch/arm/mach-spear6xx/spear600_evb.c +2 -5
@@ -11,9 +11,9 @@* warranty of any kind, whether express or implied. */ -#include <linux/mtd/nand.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> +#include <linux/mtd/nand.h> #include <linux/gpio.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h>
@@ -91,8 +91,6 @@ static void __init spi_init(void)static void __init spear600_evb_init (void ) { -unsigned int i; -/* set nand device's plat data */ nand_set_plat_data (&nand_device,NULL ,0 ,NAND_SKIP_BBTSCAN ,SPEAR_NAND_BW8 );
@@ -110,8 +108,7 @@ static void __init spear600_evb_init(void)platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));/* Add Amba Devices */ -for (i =0 ; i <ARRAY_SIZE (amba_devs); i++) -amba_device_register (amba_devs[i], &iomem_resource); +spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs));spi_init (); }
arch/arm/plat-spear/include/plat/device.h new file +37 -0
@@ -0,0 +1,37 @@ +/* +* arch/arm/plat-spear/include/plat/device.h +* +* device definitions for SPEAr platform +* +* Copyright (C) 2010 ST Microelectronics +* Viresh Kumar<[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#ifndef __PLAT_DEVICE_H +#define __PLAT_DEVICE_H + +#include <linux/amba/bus.h> +#include <linux/err.h> +#include <linux/clk.h> + +static inline void +spear_amba_device_register (struct amba_device **devices,u32 count) +{ +u32 i; + +for (i =0 ; i < count; i++) { +struct clk *clk =clk_get_sys (devices[i]->dev.init_name,NULL ); +if (IS_ERR (clk)) +continue ; + +clk_enable (clk); +amba_device_register (devices[i], &iomem_resource); +clk_disable (clk); + } +} + +#endif /* __PLAT_DEVICE_H */
Signature · 1 line
1.7.2.2
PATCH 35/74 ST SPEAr: Enabling clocks before amba device registeration
On Mon, Aug 30, 2010 at 04:08:59PM +0530, Viresh KUMAR wrote:
No description, so I'm going to have to guess about this.
arch/arm/plat-spear/include/plat/device.h line 33
Quoted 13 lines
arch/arm/plat-spear/include/plat/device.h new file +13
-0+static inline void +spear_amba_device_register (struct amba_device **devices,u32 count) +{ +u32 i; + +for (i =0 ; i < count; i++) { +struct clk *clk =clk_get_sys (devices[i]->dev.init_name,NULL ); +if (IS_ERR (clk)) +continue ; + +clk_enable (clk); +amba_device_register (devices[i], &iomem_resource); +clk_disable (clk);
My guess is that you're doing this to work around the fact that your SoC enables/disables both the bus clock and the functional clock to each primecell, and so you're finding that you need to enable the clock to access the device registers.
We've fixed this in the generic code by introducing an 'apb_pclk' clock which the core bus code controls (and eventually drivers.) See discussion earlier this month/last month on this list about this.
That makes this patch redundant.
PATCH 35/74 ST SPEAr: Enabling clocks before amba device registeration
Quoted 3 lines · Russell King - ARM Linux
On Mon, Aug 30, 2010 at 04:08:59PM +0530, Viresh KUMAR wrote:
No description, so I'm going to have to guess about this.
Sorry!!
Quoted 20 lines
Quoted 4 lines
arch/arm/plat-spear/include/plat/device.h new file +3
-0+static inline void +spear_amba_device_register (struct amba_device **devices,u32 count) +{arch/arm/plat-spear/include/plat/device.h line 33
Quoted 10 lines
arch/arm/plat-spear/include/plat/device.h new file +10
-0+u32 i; + +for (i =0 ; i < count; i++) { +struct clk *clk =clk_get_sys (devices[i]->dev.init_name,NULL ); +if (IS_ERR (clk)) +continue ; + +clk_enable (clk); +amba_device_register (devices[i], &iomem_resource); +clk_disable (clk);My guess is that you're doing this to work around the fact that your SoC enables/disables both the bus clock and the functional clock to each primecell, and so you're finding that you need to enable the clock to access the device registers.
Quoted 6 lines
We've fixed this in the generic code by introducing an '
apb_pclk' clock which the core bus code controls (and eventually drivers.) See discussion earlier this month/last month on this list about this.That makes this patch redundant.
.
Yes this patch is not required.
PATCH 36/74 ST SPEAr: Replacing SIZE macro's with actual required size
In reply to Viresh KUMARFrom: Shiraz Hashim <[email protected]>
In arch specific files SIZE macro's were defined which were used for creating memory/io mappings for sepecific devices. These macro's are coming straight from h/w user manual and are much greated than required sizes. Replacing these macros by actual required size.
Signed-off-by Shiraz Hashim <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/spear300.c | 9 +++------ arch/arm/mach-spear3xx/spear310.c | 2 +- arch/arm/mach-spear3xx/spear320.c | 2 +- arch/arm/mach-spear3xx/spear3xx.c | 8 ++++---- arch/arm/mach-spear6xx/spear6xx.c | 10 +++++----- 5 files changed, 14 insertions(+), 17 deletions(-)
arch/arm/mach-spear3xx/spear300.c +3 -6
@@ -604,8 +604,7 @@ struct spear_shirq shirq_ras1 = {void sdhci_i2s_mem_enable (u8 mask) {u32 val; -void __iomem *base =ioremap (SPEAR300_SOC_CONFIG_BASE , -SPEAR300_SOC_CONFIG_SIZE ); +void __iomem *base =ioremap (SPEAR300_SOC_CONFIG_BASE ,SZ_4K );if (!base) {pr_debug ("sdhci_i2s_enb: ioremap fail\n" );return ;
@@ -628,8 +627,7 @@ void __init spear300_init(void)spear3xx_init ();/* shared irq registeration */ - shirq_ras1.regs.base = -ioremap (SPEAR300_TELECOM_BASE ,SPEAR300_TELECOM_REG_SIZE ); + shirq_ras1.regs.base =ioremap (SPEAR300_TELECOM_BASE ,SZ_4K );if (shirq_ras1.regs.base) { ret =spear_shirq_register (&shirq_ras1);if (ret)
@@ -637,8 +635,7 @@ void __init spear300_init(void) }/* pmx initialization */ - pmx_driver.base =ioremap (SPEAR300_SOC_CONFIG_BASE , -SPEAR300_SOC_CONFIG_SIZE ); + pmx_driver.base =ioremap (SPEAR300_SOC_CONFIG_BASE ,SZ_4K );if (pmx_driver.base) { ret =pmx_register (&pmx_driver);if (ret)
arch/arm/mach-spear3xx/spear310.c +1 -1
@@ -362,7 +362,7 @@ void __init spear310_init(void)spear3xx_init ();/* shared irq registeration */ - base =ioremap (SPEAR310_SOC_CONFIG_BASE ,SPEAR310_SOC_CONFIG_SIZE ); + base =ioremap (SPEAR310_SOC_CONFIG_BASE ,SZ_4K );if (base) {/* shirq 1 */ shirq_ras1.regs.base = base;
arch/arm/mach-spear3xx/spear320.c +1 -1
@@ -694,7 +694,7 @@ void __init spear320_init(void)spear3xx_init ();/* shared irq registeration */ - base =ioremap (SPEAR320_SOC_CONFIG_BASE ,SPEAR320_SOC_CONFIG_SIZE ); + base =ioremap (SPEAR320_SOC_CONFIG_BASE ,SZ_4K );if (base) {/* shirq 1 */ shirq_ras1.regs.base = base;
arch/arm/mach-spear3xx/spear3xx.c +4 -4
@@ -254,22 +254,22 @@ struct map_desc spear3xx_io_desc[] __initdata = { { .virtual = VA_SPEAR3XX_ICM1_UART_BASE, .pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE), - .length = SPEAR3XX_ICM1_UART_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, { .virtual = VA_SPEAR3XX_ML1_VIC_BASE, .pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE), - .length = SPEAR3XX_ML1_VIC_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, { .virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE, .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE), - .length = SPEAR3XX_ICM3_SYS_CTRL_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, { .virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE, .pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE), - .length = SPEAR3XX_ICM3_MISC_REG_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, };
arch/arm/mach-spear6xx/spear6xx.c +5 -5
@@ -408,27 +408,27 @@ static struct map_desc spear6xx_io_desc[] __initdata = { { .virtual = VA_SPEAR6XX_ICM1_UART0_BASE, .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE), - .length = SPEAR6XX_ICM1_UART0_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, { .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE, .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE), - .length = SPEAR6XX_CPU_VIC_PRI_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, { .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE, .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE), - .length = SPEAR6XX_CPU_VIC_SEC_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, { .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE, .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE), - .length = SPEAR6XX_ICM3_MISC_REG_BASE, + .length = SZ_4K, .type =MT_DEVICE }, { .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE, .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE), - .length = SPEAR6XX_ICM3_MISC_REG_SIZE, + .length = SZ_4K, .type =MT_DEVICE }, };
Signature · 1 line
1.7.2.2
PATCH 37/74 SPEAr: removing size based macros except those necessary
In reply to Viresh KUMARFrom: Shiraz Hashim <[email protected]>
Size macros are defined in machine specific files which are really not required. These size defines were coming straight from h/w user manual which were much greater than required size. Hence these are removed for any use.
Also the base addresses are defined as ulong.
Signed-off-by Shiraz Hashim <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/spear.h | 91 ++++++------ arch/arm/mach-spear3xx/include/mach/spear.h | 134 +++++------------- arch/arm/mach-spear3xx/include/mach/spear300.h | 59 ++------ arch/arm/mach-spear3xx/include/mach/spear310.h | 34 ++--- arch/arm/mach-spear3xx/include/mach/spear320.h | 68 +++------- arch/arm/mach-spear6xx/include/mach/spear.h | 174 ++++++----------------- 6 files changed, 172 insertions(+), 388 deletions(-)
arch/arm/mach-spear13xx/include/mach/spear.h +46 -45
@@ -14,12 +14,13 @@#ifndef __MACH_SPEAR13XX_H#define __MACH_SPEAR13XX_H +#include <asm/memory.h> #include <mach/spear1300.h> -#define SPEAR13XX_L2CC_BASE 0xED000000 +#define SPEAR13XX_L2CC_BASE UL(0xED000000)/* ARM9SMP peripheral base address */ -#define SPEAR13XX_A9SM_PERIP_BASE 0xEC800000 +#define SPEAR13XX_A9SM_PERIP_BASE UL(0xEC800000)#define VA_SPEAR13XX_A9SM_PERIP_BASE IO_ADDRESS(SPEAR13XX_A9SM_PERIP_BASE)/* A9SM peripheral offsets */ #define SPEAR13XX_SCU_BASE (SPEAR13XX_A9SM_PERIP_BASE + 0x00)
@@ -29,26 +30,26 @@#define SPEAR13XX_WDT_BASE (SPEAR13XX_A9SM_PERIP_BASE + 0x620)#define SPEAR13XX_GIC_DIST_BASE (SPEAR13XX_A9SM_PERIP_BASE + 0x1000) -#define SPEAR13XX_UART_BASE 0xE0000000 +#define SPEAR13XX_UART_BASE UL(0xE0000000)#define VA_SPEAR13XX_UART_BASE IO_ADDRESS(SPEAR13XX_UART_BASE) -#define SPEAR13XX_ADC_BASE 0xE0080000 -#define SPEAR13XX_SSP_BASE 0xE0100000 -#define SPEAR13XX_I2S0_BASE 0xE0180000 -#define SPEAR13XX_I2S1_BASE 0xE0200000 -#define SPEAR13XX_I2C_BASE 0xE0280000 -#define SPEAR13XX_KBD_BASE 0xE0300000 -#define SPEAR13XX_GPT0_BASE 0xE0380000 -#define SPEAR13XX_GPT1_BASE 0xE0400000 -#define SPEAR13XX_GPT2_BASE 0xE0480000 -#define SPEAR13XX_GPT3_BASE 0xE0500000 -#define SPEAR13XX_RTC_BASE 0xE0580000 -#define SPEAR13XX_GPIO0_BASE 0xE0600000 -#define SPEAR13XX_GPIO1_BASE 0xE0680000 -#define SPEAR13XX_MISC_BASE 0xE0700000 +#define SPEAR13XX_ADC_BASE UL(0xE0080000) +#define SPEAR13XX_SSP_BASE UL(0xE0100000) +#define SPEAR13XX_I2S0_BASE UL(0xE0180000) +#define SPEAR13XX_I2S1_BASE UL(0xE0200000) +#define SPEAR13XX_I2C_BASE UL(0xE0280000) +#define SPEAR13XX_KBD_BASE UL(0xE0300000) +#define SPEAR13XX_GPT0_BASE UL(0xE0380000) +#define SPEAR13XX_GPT1_BASE UL(0xE0400000) +#define SPEAR13XX_GPT2_BASE UL(0xE0480000) +#define SPEAR13XX_GPT3_BASE UL(0xE0500000) +#define SPEAR13XX_RTC_BASE UL(0xE0580000) +#define SPEAR13XX_GPIO0_BASE UL(0xE0600000) +#define SPEAR13XX_GPIO1_BASE UL(0xE0680000) +#define SPEAR13XX_MISC_BASE UL(0xE0700000)#define VA_SPEAR13XX_MISC_BASE IO_ADDRESS(SPEAR13XX_MISC_BASE) -#define SPEAR13XX_SYSRAM0_BASE 0xB3800000 +#define SPEAR13XX_SYSRAM0_BASE UL(0xB3800000)#define SPEAR13XX_SYSRAM0_SIZE 0x00800000/*
@@ -57,34 +58,34 @@*/ #define SPEAR13XX_SYS_LOCATION (SPEAR13XX_SYSRAM0_BASE + 0x600) -#define SPEAR13XX_SYSRAM1_BASE 0xE0800000 +#define SPEAR13XX_SYSRAM1_BASE UL(0xE0800000)#define SPEAR13XX_SYSRAM1_SIZE 0x00800000 -#define SPEAR13XX_CLCD_BASE 0xE1000000 -#define SPEAR13XX_C3_BASE 0xE1800000 -#define SPEAR13XX_GETH_BASE 0xE2000000 -#define SPEAR13XX_UPD_BASE 0xE2800000 -#define SPEAR13XX_UDC_BASE 0xE3800000 -#define SPEAR13XX_UHC0_OHCI_BASE 0xE4000000 -#define SPEAR13XX_UHC0_EHCI_BASE 0xE4800000 -#define SPEAR13XX_UHC1_OHCI_BASE 0xE5000000 -#define SPEAR13XX_UHC1_EHCI_BASE 0xE5800000 -#define SPEAR13XX_SMI_MEM_BASE 0xE6000000 -#define SPEAR13XX_SMI_CTRL_BASE 0xEA000000 -#define SPEAR13XX_DMAC0_BASE 0xEA800000 -#define SPEAR13XX_DMAC1_BASE 0xEB000000 -#define SPEAR13XX_MII_PHY_BASE 0xEB800000 -#define SPEAR13XX_MPMC_BASE 0xEC000000 -#define SPEAR13XX_PCIE0_BASE 0x80000000 -#define SPEAR13XX_PCIE1_BASE 0x90000000 -#define SPEAR13XX_PCIE2_BASE 0xC0000000 -#define SPEAR13XX_PCIE0_APP_BASE 0xB1000000 -#define SPEAR13XX_PCIE1_APP_BASE 0xB1800000 -#define SPEAR13XX_PCIE2_APP_BASE 0xB4000000 -#define SPEAR13XX_FSMC_MEM_BASE 0xA0000000 -#define SPEAR13XX_FSMC_BASE 0xB0000000 -#define SPEAR13XX_JPEG_BASE 0xB2000000 -#define SPEAR13XX_MCIF_CF_BASE 0xB2800000 -#define SPEAR13XX_MCIF_SDHCI_BASE 0xB3000000 +#define SPEAR13XX_CLCD_BASE UL(0xE1000000) +#define SPEAR13XX_C3_BASE UL(0xE1800000) +#define SPEAR13XX_GETH_BASE UL(0xE2000000) +#define SPEAR13XX_UPD_BASE UL(0xE2800000) +#define SPEAR13XX_UDC_BASE UL(0xE3800000) +#define SPEAR13XX_UHC0_OHCI_BASE UL(0xE4000000) +#define SPEAR13XX_UHC0_EHCI_BASE UL(0xE4800000) +#define SPEAR13XX_UHC1_OHCI_BASE UL(0xE5000000) +#define SPEAR13XX_UHC1_EHCI_BASE UL(0xE5800000) +#define SPEAR13XX_SMI_MEM_BASE UL(0xE6000000) +#define SPEAR13XX_SMI_CTRL_BASE UL(0xEA000000) +#define SPEAR13XX_DMAC0_BASE UL(0xEA800000) +#define SPEAR13XX_DMAC1_BASE UL(0xEB000000) +#define SPEAR13XX_MII_PHY_BASE UL(0xEB800000) +#define SPEAR13XX_MPMC_BASE UL(0xEC000000) +#define SPEAR13XX_PCIE0_BASE UL(0x80000000) +#define SPEAR13XX_PCIE1_BASE UL(0x90000000) +#define SPEAR13XX_PCIE2_BASE UL(0xC0000000) +#define SPEAR13XX_PCIE0_APP_BASE UL(0xB1000000) +#define SPEAR13XX_PCIE1_APP_BASE UL(0xB1800000) +#define SPEAR13XX_PCIE2_APP_BASE UL(0xB4000000) +#define SPEAR13XX_FSMC_MEM_BASE UL(0xA0000000) +#define SPEAR13XX_FSMC_BASE UL(0xB0000000) +#define SPEAR13XX_JPEG_BASE UL(0xB2000000) +#define SPEAR13XX_MCIF_CF_BASE UL(0xB2800000) +#define SPEAR13XX_MCIF_SDHCI_BASE UL(0xB3000000)/* Debug uart for linux, will be used for debug and uncompress messages */ #define SPEAR_DBG_UART_BASE SPEAR13XX_UART_BASE
arch/arm/mach-spear3xx/include/mach/spear.h +36 -98
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arch/arm/mach-spear3xx/include/mach/spear300.h +15 -44
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arch/arm/mach-spear3xx/include/mach/spear310.h +11 -23
@@ -16,30 +16,18 @@#ifndef __MACH_SPEAR310_H#define __MACH_SPEAR310_H -#define SPEAR310_NAND_BASE 0x40000000 -#define SPEAR310_NAND_SIZE 0x04000000 +#define SPEAR310_NAND_BASE UL(0x40000000) +#define SPEAR310_FSMC_BASE UL(0x44000000) +#define SPEAR310_UART1_BASE UL(0xB2000000) +#define SPEAR310_UART2_BASE UL(0xB2080000) +#define SPEAR310_UART3_BASE UL(0xB2100000) +#define SPEAR310_UART4_BASE UL(0xB2180000) +#define SPEAR310_UART5_BASE UL(0xB2200000) +#define SPEAR310_HDLC_BASE UL(0xB2800000) +#define SPEAR310_RS485_0_BASE UL(0xB3000000) +#define SPEAR310_RS485_1_BASE UL(0xB3800000) +#define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000) -#define SPEAR310_FSMC_BASE 0x44000000 -#define SPEAR310_FSMC_SIZE 0x01000000 - -#define SPEAR310_UART1_BASE 0xB2000000 -#define SPEAR310_UART2_BASE 0xB2080000 -#define SPEAR310_UART3_BASE 0xB2100000 -#define SPEAR310_UART4_BASE 0xB2180000 -#define SPEAR310_UART5_BASE 0xB2200000 -#define SPEAR310_UART_SIZE 0x00080000 - -#define SPEAR310_HDLC_BASE 0xB2800000 -#define SPEAR310_HDLC_SIZE 0x00800000 - -#define SPEAR310_RS485_0_BASE 0xB3000000 -#define SPEAR310_RS485_0_SIZE 0x00800000 - -#define SPEAR310_RS485_1_BASE 0xB3800000 -#define SPEAR310_RS485_1_SIZE 0x00800000 - -#define SPEAR310_SOC_CONFIG_BASE 0xB4000000 -#define SPEAR310_SOC_CONFIG_SIZE 0x00000070/* Interrupt registers offsets and masks */ #define INT_STS_MASK_REG 0x04#define SMII0_IRQ_MASK (1 << 0)
arch/arm/mach-spear3xx/include/mach/spear320.h +18 -50
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arch/arm/mach-spear6xx/include/mach/spear.h +46 -128
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Signature · 1 line
1.7.2.2
PATCH 38/74 ST SPEAr3xx: Rearranging declarations in clock.c file
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/clock.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-)
arch/arm/mach-spear3xx/clock.c +5 -5
@@ -614,6 +614,11 @@ static struct clk_lookup spear_clk_lookups[] = { { .con_id = "fsmc", .clk = &fsmc_clk}, #endif + /* common clock to spear300 and spear320 */ +#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320) + { .dev_id = "sdhci", .clk = &sdhci_clk}, +#endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */ + /* spear300 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR300 { .dev_id = "keyboard", .clk = &kbd_clk},
@@ -628,11 +633,6 @@ static struct clk_lookup spear_clk_lookups[] = { { .dev_id = "i2c_designware.1", .clk = &i2c1_clk}, { .dev_id = "pwm", .clk = &pwm_clk},#endif - - /* common clock to spear300 and spear320 */ -#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320) - { .dev_id = "sdhci", .clk = &sdhci_clk}, -#endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */ };void __init clk_init (void )
Signature · 1 line
1.7.2.2
PATCH 38/74 ST SPEAr3xx: Rearranging declarations in clock.c file
Quoted 1 line · Viresh KUMAR
Signed-off-by Viresh Kumar <[email protected]>
Do this in the patch which adds the sdhci clock instead. This patch on its own is pure noise.
PATCH 38/74 ST SPEAr3xx: Rearranging declarations in clock.c file
Quoted 2 lines · Russell King - ARM Linux
Do this in the patch which adds the sdhci clock instead. This patch on its own is pure noise.
OK.
PATCH 39/74 ST SPEAr: Adding miscellaneous devices and clocks
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/clock.c | 87 +++++++++++++++++-- arch/arm/mach-spear3xx/include/mach/generic.h | 7 ++ arch/arm/mach-spear3xx/spear310.c | 115 +++++++++++++++++++------ arch/arm/mach-spear3xx/spear320.c | 26 ++++++ 4 files changed, 201 insertions(+), 34 deletions(-)
arch/arm/mach-spear3xx/clock.c +78 -9
@@ -409,13 +409,6 @@ static struct clk usbd_clk = { .recalc = &follow_parent, }; -/* clcd clock */ -static struct clk clcd_clk = { - .flags =ALWAYS_ENABLED , - .pclk = &pll3_48m_clk, - .recalc = &follow_parent, -}; -/* clock derived from ahb clk */ /* apb masks structure */ static struct bus_clk_masks apb_masks = {
@@ -525,8 +518,32 @@ static struct clk fsmc_clk = { };#endif +/* common clocks to spear310 and spear320 */ +#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 ) +/* uart1 clock */ +static struct clk uart1_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; + +/* uart2 clock */ +static struct clk uart2_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; +#endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */ +/* common clocks to spear300 and spear320 */ #if defined(CONFIG_MACH_SPEAR300 ) || defined(CONFIG_MACH_SPEAR320 ) +/* clcd clock */ +static struct clk clcd_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &pll3_48m_clk, + .recalc = &follow_parent, +}; +/* sdhci clock */ static struct clk sdhci_clk = { .flags = ALWAYS_ENABLED,
@@ -537,6 +554,13 @@ static struct clk sdhci_clk = {/* spear300 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR300 +/* gpio1 clock */ +static struct clk gpio1_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; +/* keyboard clock */ static struct clk kbd_clk = { .flags = ALWAYS_ENABLED,
@@ -548,7 +572,26 @@ static struct clk kbd_clk = {/* spear310 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR310 +/* uart3 clock */ +static struct clk uart3_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; + +/* uart4 clock */ +static struct clk uart4_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; +/* uart5 clock */ +static struct clk uart5_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +};#endif /* spear320 machine specific clock structures */
@@ -560,6 +603,20 @@ static struct clk i2c1_clk = { .recalc = &follow_parent, }; +/* ssp1 clock */ +static struct clk ssp1_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; + +/* ssp2 clock */ +static struct clk ssp2_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; +/* pwm clock */ static struct clk pwm_clk = { .flags =ALWAYS_ENABLED ,
@@ -596,7 +653,6 @@ static struct clk_lookup spear_clk_lookups[] = {/* clock derived from pll3 clk */ { .con_id = "usbh_clk", .clk = &usbh_clk}, { .dev_id = "usbd", .clk = &usbd_clk}, - { .dev_id = "clcd", .clk = &clcd_clk}, /* clock derived from ahb clk */ { .con_id = "apb_clk", .clk = &apb_clk}, { .dev_id = "i2c_designware.0", .clk = &i2c_clk},
@@ -614,23 +670,36 @@ static struct clk_lookup spear_clk_lookups[] = { { .con_id = "fsmc", .clk = &fsmc_clk}, #endif +/* common clocks to spear310 and spear320 */ +#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) + { .dev_id = "uart1", .clk = &uart1_clk}, + { .dev_id = "uart2", .clk = &uart2_clk}, +#endif + /* common clock to spear300 and spear320 */ #if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320) - { .dev_id = "sdhci", .clk = &sdhci_clk}, + { .dev_id = "clcd", .clk = &clcd_clk}, + { .dev_id = "sdhci", .clk = &sdhci_clk}, #endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */ /* spear300 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR300 + { .dev_id = "gpio1", .clk = &gpio1_clk}, { .dev_id = "keyboard", .clk = &kbd_clk}, #endif /* spear310 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR310 + { .dev_id = "uart3", .clk = &uart3_clk}, + { .dev_id = "uart4", .clk = &uart4_clk}, + { .dev_id = "uart5", .clk = &uart5_clk}, #endif /* spear320 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR320 { .dev_id = "i2c_designware.1", .clk = &i2c1_clk}, + { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk}, + { .dev_id = "ssp-pl022.2", .clk = &ssp2_clk}, { .dev_id = "pwm", .clk = &pwm_clk}, #endif };
arch/arm/mach-spear3xx/include/mach/generic.h +7 -0
@@ -162,6 +162,11 @@ extern struct clcd_board clcd_plat_data;/* spear310 declarations */ #elif defined(CONFIG_MACH_SPEAR310 )/* Add spear310 machine device structure declarations here */ +extern struct amba_device uart1_device; +extern struct amba_device uart2_device; +extern struct amba_device uart3_device; +extern struct amba_device uart4_device; +extern struct amba_device uart5_device;extern struct platform_device plgpio_device;extern struct platform_device nand_device;
@@ -183,6 +188,8 @@ void __init spear310_init(void);/* Add spear320 machine device structure declarations here */ extern struct amba_device clcd_device;extern struct amba_device ssp_device[]; +extern struct amba_device uart1_device; +extern struct amba_device uart2_device;extern struct platform_device i2c1_device;extern struct platform_device nand_device;extern struct platform_device plgpio_device;
arch/arm/mach-spear3xx/spear310.c +90 -25
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arch/arm/mach-spear3xx/spear320.c +26 -0
@@ -447,6 +447,32 @@ struct amba_device ssp_device[] = { } }; +/* uart1 device registeration */ +struct amba_device uart1_device = { + .dev = { + .init_name ="uart1" , + }, + .res = { + .start =SPEAR320_UART1_BASE , + .end =SPEAR320_UART1_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, + .irq = {VIRQ_UART1 ,NO_IRQ }, +}; + +/* uart2 device registeration */ +struct amba_device uart2_device = { + .dev = { + .init_name ="uart2" , + }, + .res = { + .start =SPEAR320_UART2_BASE , + .end =SPEAR320_UART2_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, + .irq = {VIRQ_UART2 ,NO_IRQ }, +}; +/* plgpio device registeration */ static struct plgpio_platform_data plgpio_plat_data = { .gpio_base =8 ,
Signature · 1 line
1.7.2.2
PATCH 40/74 ST SPEAr 13xx : Adding support for SPEAr1310
In reply to Viresh KUMARFrom: Bhupesh Sharma <[email protected]>
Signed-off-by Bhupesh Sharma <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/Makefile | 1 + arch/arm/configs/spear1310-smp_defconfig | 875 ++++++++++++++++++++++ arch/arm/mach-spear13xx/Kconfig | 6 + arch/arm/mach-spear13xx/Kconfig1310 | 17 + arch/arm/mach-spear13xx/Makefile | 6 +- arch/arm/mach-spear13xx/include/mach/irqs.h | 37 + arch/arm/mach-spear13xx/include/mach/spear.h | 1 + arch/arm/mach-spear13xx/include/mach/spear1310.h | 24 + arch/arm/mach-spear13xx/spear1310.c | 25 + arch/arm/mach-spear13xx/spear1310_evb.c | 161 ++++ arch/arm/plat-spear/Makefile | 1 + 11 files changed, 1153 insertions(+), 1 deletions(-) create mode 100644 arch/arm/configs/spear1310-smp_defconfig create mode 100644 arch/arm/mach-spear13xx/Kconfig1310 create mode 100644 arch/arm/mach-spear13xx/include/mach/spear1310.h create mode 100644 arch/arm/mach-spear13xx/spear1310.c create mode 100644 arch/arm/mach-spear13xx/spear1310_evb.c
arch/arm/Makefile +1 -0
@@ -192,6 +192,7 @@ machine-$(CONFIG_ARCH_W90X900) := w90x900 machine-$(CONFIG_ARCH_NUC93X) := nuc93x machine-$(CONFIG_FOOTBRIDGE) := footbridge machine-$(CONFIG_MACH_SPEAR1300) := spear13xx +machine-$(CONFIG_MACH_SPEAR1310) := spear13xx machine-$(CONFIG_MACH_SPEAR300) := spear3xx machine-$(CONFIG_MACH_SPEAR310) := spear3xx machine-$(CONFIG_MACH_SPEAR320) := spear3xx
arch/arm/configs/spear1310-smp_defconfig new file +875 -0
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arch/arm/mach-spear13xx/Kconfig +6 -0
@@ -13,9 +13,15 @@ config MACH_SPEAR1300 help Supports ST SPEAr1300 Machine +config MACH_SPEAR1310 + bool "SPEAr1310" + help + Supports ST SPEAr1310 Machine + endchoice # Adding SPEAr13XX machine specific configuration files source "arch/arm/mach-spear13xx/Kconfig1300" +source "arch/arm/mach-spear13xx/Kconfig1310" endif #ARCH_SPEAR13XX
arch/arm/mach-spear13xx/Kconfig1310 new file +17 -0
@@ -0,0 +1,17 @@ +# +# SPEAr1310 machine configuration file +# + +if MACH_SPEAR1310 + +choice + prompt "SPEAr1310 Boards" + default BOARD_SPEAR1310_EVB + +config BOARD_SPEAR1310_EVB + bool "SPEAr1310 Evaluation Board" + help + Supports ST SPEAr1310 Evaluation Board +endchoice + +endif #MACH_SPEAR1310
arch/arm/mach-spear13xx/Makefile +5 -1
@@ -10,6 +10,10 @@ obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o # spear1300 specific files obj-$(CONFIG_MACH_SPEAR1300) += spear1300.o obj-$(CONFIG_PCIEPORTBUS) += pcie.o - # spear1300 boards files obj-$(CONFIG_BOARD_SPEAR1300_EVB) += spear1300_evb.o + +# spear1310 specific files +obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o +# spear1310 boards files +obj-$(CONFIG_BOARD_SPEAR1310_EVB) += spear1310_evb.o
arch/arm/mach-spear13xx/include/mach/irqs.h +37 -0
@@ -5,6 +5,7 @@* * Copyright (C) 2010 ST Microelectronics * Shiraz Hashim <[email protected]> +* Bhupesh Sharma <[email protected]> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any
@@ -84,6 +85,42 @@#define IRQ_PCIE1 (IRQ_SHPI_START + 69)#define IRQ_PCIE2 (IRQ_SHPI_START + 70) +/* Add spear1310 specific IRQs here */ +#ifdef CONFIG_MACH_SPEAR1310 +#define IRQ_FSMC_PC1 (IRQ_SHPI_START + 76) +#define IRQ_FSMC_PC2 (IRQ_SHPI_START + 77) +#define IRQ_FSMC_PC3 (IRQ_SHPI_START + 78) +#define IRQ_FSMC_PC4 (IRQ_SHPI_START + 79) +#define IRQ_RS4850 (IRQ_SHPI_START + 80) +#define IRQ_RS4851 (IRQ_SHPI_START + 81) +#define IRQ_CCAN0 (IRQ_SHPI_START + 82) +#define IRQ_CCAN1 (IRQ_SHPI_START + 83) +#define IRQ_TDM0 (IRQ_SHPI_START + 84) +#define IRQ_TDM1 (IRQ_SHPI_START + 85) +#define IRQ_UART0 (IRQ_SHPI_START + 86) +#define IRQ_UART1 (IRQ_SHPI_START + 87) +#define IRQ_UART2 (IRQ_SHPI_START + 88) +#define IRQ_UART3 (IRQ_SHPI_START + 89) +#define IRQ_UART4 (IRQ_SHPI_START + 90) +#define IRQ_I2C_CNTR (IRQ_SHPI_START + 91) +#define IRQ_GMAC0_SBD (IRQ_SHPI_START + 92) +#define IRQ_GMAC0_PMT (IRQ_SHPI_START + 93) +#define IRQ_GMAC1_SBD (IRQ_SHPI_START + 94) +#define IRQ_GMAC1_PMT (IRQ_SHPI_START + 95) +#define IRQ_GMAC2_SBD (IRQ_SHPI_START + 96) +#define IRQ_GMAC2_PMT (IRQ_SHPI_START + 97) +#define IRQ_GMAC3_SBD (IRQ_SHPI_START + 98) +#define IRQ_GMAC3_PMT (IRQ_SHPI_START + 99) +#define IRQ_GPIO (IRQ_SHPI_START + 100) +#define IRQ_PCI_BRDG_HOST_FATAL (IRQ_SHPI_START + 101) +#define IRQ_PCI_INTA (IRQ_SHPI_START + 102) +#define IRQ_PCI_INTB (IRQ_SHPI_START + 103) +#define IRQ_PCI_INTC (IRQ_SHPI_START + 104) +#define IRQ_PCI_INTD (IRQ_SHPI_START + 105) +#define IRQ_PCI_ME_TO_ARM (IRQ_SHPI_START + 106) +#define IRQ_PCI_SERR_TO_ARM (IRQ_SHPI_START + 107) +#endif /* CONFIG_MACH_SPEAR1310 */ +#define IRQ_GIC_END (IRQ_SHPI_START + 128)#define VIRQ_START IRQ_GIC_END
arch/arm/mach-spear13xx/include/mach/spear.h +1 -0
@@ -16,6 +16,7 @@#include <asm/memory.h> #include <mach/spear1300.h> +#include <mach/spear1310.h> #define SPEAR13XX_L2CC_BASE UL(0xED000000)
arch/arm/mach-spear13xx/include/mach/spear1310.h new file +24 -0
@@ -0,0 +1,24 @@ +/* +* arch/arm/mach-spear13xx/include/mach/spear1310.h +* +* SPEAr1310 Machine specific definition +* +* Copyright (C) 2010 ST Microelectronics +* Bhupesh Sharma <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#ifdef CONFIG_MACH_SPEAR1310 + +#ifndef __MACH_SPEAR1310_H +#define __MACH_SPEAR1310_H + +#define SPEAR1310_CAN0_BASE UL(0x6DA00000) +#define SPEAR1310_CAN1_BASE UL(0x6DB00000) + +#endif /* __MACH_SPEAR1310_H */ + +#endif /* CONFIG_MACH_SPEAR1310 */
arch/arm/mach-spear13xx/spear1310.c new file +25 -0
@@ -0,0 +1,25 @@ +/* +* arch/arm/mach-spear13xx/spear1310.c +* +* SPEAr1310 machine source file +* +* Copyright (C) 2010 ST Microelectronics +* Bhupesh Sharma <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#include <linux/ptrace.h> +#include <asm/irq.h> +#include <mach/generic.h> +#include <mach/hardware.h> + +/* Add spear1310 specific devices here */ + +void __init spear1310_init (void ) +{ +/* call spear13xx family common init function */ +spear13xx_init (); +}
arch/arm/mach-spear13xx/spear1310_evb.c new file +161 -0
161 lines not on this page · raw message
arch/arm/plat-spear/Makefile +1 -0
@@ -10,6 +10,7 @@ obj-$(CONFIG_MACH_SPEAR310) += plgpio.o obj-$(CONFIG_MACH_SPEAR320) += plgpio.o obj-$(CONFIG_SPEAR_PWM) += pwm.o +obj-$(CONFIG_BOARD_SPEAR1310_EVB) += i2c_eval_board.o obj-$(CONFIG_BOARD_SPEAR1300_EVB) += i2c_eval_board.o obj-$(CONFIG_BOARD_SPEAR300_EVB) += i2c_eval_board.o obj-$(CONFIG_BOARD_SPEAR310_EVB) += i2c_eval_board.o
Signature · 1 line
1.7.2.2
PATCH 40/74 ST SPEAr 13xx : Adding support for SPEAr1310
Quoted 8 lines · Viresh KUMAR
From: Bhupesh Sharma <[email protected]>
Signed-off-by Bhupesh Sharma <[email protected]>Signed-off-by shiraz hashim <[email protected]>Signed-off-by Viresh Kumar <[email protected]>--- arch/arm/Makefile | 1 + arch/arm/configs/spear1310-smp_defconfig | 875 ++++++++++++++++++++++
NAK. No new large defconfigs.
PATCH 40/74 ST SPEAr 13xx : Adding support for SPEAr1310
Quoted 3 lines · Russell King - ARM Linux
Quoted 2 lines
arch/arm/Makefile | 1 +Quoted 1 line
arch/arm/configs/spear1310-smp_defconfig | 875 ++++++++++++++++++++++NAK. No new large defconfigs.
Ok. Will correct all defconfig patches.
PATCH 41/74 ST SPEAr : Adding CAN platform support for SPEAr320 and SPEAr1310
In reply to Viresh KUMARFrom: Bhupesh Sharma <[email protected]>
Signed-off-by Bhupesh Sharma <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 32 ++++++++++++++++++++ arch/arm/mach-spear13xx/include/mach/generic.h | 21 +++++++++++-- arch/arm/mach-spear13xx/spear1310.c | 37 ++++++++++++++++++++++++ arch/arm/mach-spear13xx/spear1310_evb.c | 6 ++++ arch/arm/mach-spear3xx/clock.c | 16 ++++++++++ arch/arm/mach-spear3xx/include/mach/generic.h | 2 + arch/arm/mach-spear3xx/spear320.c | 37 ++++++++++++++++++++++++ arch/arm/mach-spear3xx/spear320_evb.c | 2 + 8 files changed, 150 insertions(+), 3 deletions(-)
arch/arm/mach-spear13xx/clock.c +32 -0
@@ -803,6 +803,28 @@ static struct clk kbd_clk = { .recalc = &follow_parent, }; +/* spear1300 machine specific clock structures */ +#ifdef CONFIG_MACH_SPEAR1300 + +#endif + +/* spear1310 machine specific clock structures */ +#ifdef CONFIG_MACH_SPEAR1310 +/* can0 clock */ +static struct clk can0_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; + +/* can1 clock */ +static struct clk can1_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; +#endif +/* array of all spear 13xx clock lookups */ static struct clk_lookup spear_clk_lookups[] = {/* root clks */
@@ -876,6 +898,16 @@ static struct clk_lookup spear_clk_lookups[] = { {.dev_id = "gpio1", .clk = &gpio1_clk}, {.dev_id = "keyboard", .clk = &kbd_clk}, {.dev_id = "wdt", .clk = &wdt_clk}, + + /* spear1300 machine specific clock structures */ +#ifdef CONFIG_MACH_SPEAR1300 +#endif + + /* spear1310 machine specific clock structures */ +#ifdef CONFIG_MACH_SPEAR1310 + {.dev_id = "spear_can.0", .clk = &can0_clk}, + {.dev_id = "spear_can.1", .clk = &can1_clk}, +#endif }; void __init clk_init(void)
arch/arm/mach-spear13xx/include/mach/generic.h +18 -3
@@ -45,17 +45,32 @@ extern struct platform_device sdhci_device;extern struct platform_device smi_device;extern struct sys_timer spear13xx_timer; -/* Add spear1300 machine device structure declarations here */ -/* Add spear13xx family function declarations here */ void __init clk_init (void );void __init i2c_register_board_devices (void );void __init spear_setup_timer (void ); -void __init spear1300_init (void );void __init spear13xx_map_io (void );void __init spear13xx_init_irq (void );void __init spear13xx_init (void );void __init nand_mach_init (u32 busw);void spear13xx_secondary_startup (void ); +/* spear1300 declarations */ +#ifdef CONFIG_MACH_SPEAR1300 +/* Add spear1300 machine function declarations here */ +void __init spear1300_init (void ); + +#endif /* CONFIG_MACH_SPEAR1300 */ + +/* spear1310 declarations */ +#ifdef CONFIG_MACH_SPEAR1310 +/* Add spear1310 machine device structure declarations here */ +extern struct platform_device can0_device; +extern struct platform_device can1_device; + +/* Add spear1310 machine function declarations here */ +void __init spear1310_init (void ); + +#endif /* CONFIG_MACH_SPEAR1310 */ +#endif /* __MACH_GENERIC_H */
arch/arm/mach-spear13xx/spear1310.c +37 -0
@@ -18,6 +18,43 @@/* Add spear1310 specific devices here */ +/* CAN device registeration */ +static struct resource can0_resources[] = { + { + .start =SPEAR1310_CAN0_BASE , + .end =SPEAR1310_CAN0_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_CCAN0 , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device can0_device = { + .name ="spear_can" , + .id =0 , + .num_resources =ARRAY_SIZE (can0_resources), + .resource = can0_resources, +}; + +static struct resource can1_resources[] = { + { + .start =SPEAR1310_CAN1_BASE , + .end =SPEAR1310_CAN1_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_CCAN1 , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device can1_device = { + .name ="spear_can" , + .id =1 , + .num_resources =ARRAY_SIZE (can1_resources), + .resource = can1_resources, +}; +void __init spear1310_init (void ) {/* call spear13xx family common init function */
arch/arm/mach-spear13xx/spear1310_evb.c +6 -0
@@ -27,6 +27,7 @@#include <plat/spi.h> static struct amba_device *amba_devs[]__initdata = { +/* spear13xx specific devices */ &gpio_device[0 ], &gpio_device[1 ], &ssp_device,
@@ -34,6 +35,7 @@ static struct amba_device *amba_devs[] __initdata = { };static struct platform_device *plat_devs[]__initdata = { +/* spear13xx specific devices */ &ehci0_device, &ehci1_device, &i2c_device,
@@ -45,6 +47,10 @@ static struct platform_device *plat_devs[] __initdata = { &sdhci_device, &smi_device, &pcie_gadget0_device, + +/* spear1310 specific devices */ + &can0_device, + &can1_device, };/* keyboard specific platform data */
arch/arm/mach-spear3xx/clock.c +16 -0
@@ -596,6 +596,20 @@ static struct clk uart5_clk = {/* spear320 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR320 +/* can0 clock */ +static struct clk can0_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; + +/* can1 clock */ +static struct clk can1_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &apb_clk, + .recalc = &follow_parent, +}; +/* i2c1 clock */ static struct clk i2c1_clk = { .flags = ALWAYS_ENABLED,
@@ -697,6 +711,8 @@ static struct clk_lookup spear_clk_lookups[] = {#endif /* spear320 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR320 + { .dev_id = "spear_can.0", .clk = &can0_clk}, + { .dev_id = "spear_can.1", .clk = &can1_clk}, { .dev_id = "i2c_designware.1", .clk = &i2c1_clk}, { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk}, { .dev_id = "ssp-pl022.2", .clk = &ssp2_clk},
arch/arm/mach-spear3xx/include/mach/generic.h +2 -0
@@ -190,6 +190,8 @@ extern struct amba_device clcd_device;extern struct amba_device ssp_device[];extern struct amba_device uart1_device;extern struct amba_device uart2_device; +extern struct platform_device can0_device; +extern struct platform_device can1_device;extern struct platform_device i2c1_device;extern struct platform_device nand_device;extern struct platform_device plgpio_device;
arch/arm/mach-spear3xx/spear320.c +37 -0
@@ -480,6 +480,43 @@ static struct plgpio_platform_data plgpio_plat_data = { .gpio_count = SPEAR_PLGPIO_COUNT, }; +/* CAN device registeration */ +static struct resource can0_resources[] = { + { + .start =SPEAR320_CAN0_BASE , + .end =SPEAR320_CAN0_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, { + .start =VIRQ_CANU , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device can0_device = { + .name ="spear_can" , + .id =0 , + .num_resources =ARRAY_SIZE (can0_resources), + .resource = can0_resources, +}; + +static struct resource can1_resources[] = { + { + .start =SPEAR320_CAN1_BASE , + .end =SPEAR320_CAN1_BASE +SZ_4K -1 , + .flags =IORESOURCE_MEM , + }, { + .start =VIRQ_CANL , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device can1_device = { + .name ="spear_can" , + .id =1 , + .num_resources =ARRAY_SIZE (can1_resources), + .resource = can1_resources, +}; +/* i2c1 device registeration */ static struct resource i2c1_resources[] = { {
arch/arm/mach-spear3xx/spear320_evb.c +2 -0
@@ -66,6 +66,8 @@ static struct platform_device *plat_devs[] __initdata = { &smi_device,/* spear320 specific devices */ + &can0_device, + &can1_device, &i2c1_device, &plgpio_device, &pwm_device,
Signature · 1 line
1.7.2.2
PATCH 42/74 ST SPEAr: Adding support for DDR in clock framework
In reply to Viresh KUMARChanging rate of clk, which is ancestor of DDR requires to put DDR in refresh mode before changing parents rate. For this DDR support is added in clock framework. Now at boot time all ancestors of DDR is marked specially and changing their rate must be first acked by ddr (i.e. ddr will run on that clock). This patch adds support for this.
Signed-off-by Viresh Kumar <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 69 ++++++++--- arch/arm/mach-spear13xx/include/mach/generic.h | 2 +- arch/arm/mach-spear13xx/include/mach/misc_regs.h | 4 + arch/arm/mach-spear13xx/spear13xx.c | 2 +- arch/arm/mach-spear3xx/clock.c | 105 ++++++++++++++---- arch/arm/mach-spear3xx/include/mach/generic.h | 2 +- arch/arm/mach-spear3xx/include/mach/misc_regs.h | 7 + arch/arm/mach-spear3xx/spear3xx.c | 2 +- arch/arm/mach-spear6xx/clock.c | 105 ++++++++++++++---- arch/arm/mach-spear6xx/include/mach/generic.h | 2 +- arch/arm/mach-spear6xx/include/mach/misc_regs.h | 7 + arch/arm/mach-spear6xx/spear6xx.c | 2 +- arch/arm/plat-spear/clock.c | 133 ++++++++++++++++++--- arch/arm/plat-spear/include/plat/clock.h | 42 +++++-- 14 files changed, 385 insertions(+), 99 deletions(-)
arch/arm/mach-spear13xx/clock.c +50 -19
@@ -22,19 +22,19 @@/* root clks */ /* 24 MHz oscillator clock */ static struct clk osc1_24m_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .rate =24000000 , };/* 32 KHz oscillator clock */ static struct clk osc2_32k_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .rate =32000 , };/* 25 MHz MIPHY oscillator clock */ static struct clk osc3_25m_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .rate =25000000 , };
@@ -98,7 +98,7 @@ struct pll_rate_tbl pll_rtbl[] = {/* pll1 clock */ static struct clk pll1_clk = { - .flags =ENABLED_ON_INIT , + .flags =ENABLED_ON_INIT |SYSTEM_CLK , .pclk_sel = &pll_pclk_sel, .pclk_sel_shift =PLL1_CLK_SHIFT , .en_reg =PLL1_CTR ,
@@ -112,7 +112,7 @@ static struct clk pll1_clk = {/* pll1div2 clock */ static struct clk pll1div2_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .pclk = &pll1_clk, .div_factor =2 , .recalc = &follow_parent,
@@ -120,7 +120,7 @@ static struct clk pll1div2_clk = {/* pll1div4 clock */ static struct clk pll1div4_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .pclk = &pll1_clk, .div_factor =4 , .recalc = &follow_parent,
@@ -135,6 +135,7 @@ static struct pll_clk_config pll2_config = {/* pll2 clock */ static struct clk pll2_clk = { + .flags =SYSTEM_CLK , .pclk_sel = &pll_pclk_sel, .pclk_sel_shift =PLL2_CLK_SHIFT , .en_reg =PLL2_CTR ,
@@ -155,6 +156,7 @@ static struct pll_clk_config pll3_config = {/* pll3 clock */ static struct clk pll3_clk = { + .flags =SYSTEM_CLK , .pclk_sel = &pll_pclk_sel, .pclk_sel_shift =PLL3_CLK_SHIFT , .en_reg =PLL3_CTR ,
@@ -183,7 +185,7 @@ struct pll_rate_tbl pll4_rtbl[] = {/* pll4 (DDR) clock */ static struct clk pll4_clk = { - .flags =ENABLED_ON_INIT , + .flags =ENABLED_ON_INIT |SYSTEM_CLK , .pclk = &osc1_24m_clk, .en_reg =PLL4_CTR , .en_reg_bit =PLL_ENABLE ,
@@ -196,22 +198,54 @@ static struct clk pll4_clk = {/* pll5 USB 48 MHz clock */ static struct clk pll5_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .pclk = &osc1_24m_clk, .rate =48000000 , };/* pll6 (MIPHY) clock */ static struct clk pll6_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .pclk = &osc3_25m_clk, .rate =25000000 , };/* clocks derived from pll1 clk */ +/* ddr clock */ +struct ddr_rate_tbl ddr_rate_tbl = { + .minrate =332000000 , + .maxrate =500000000 , +}; + +static struct pclk_info ddr_pclk_info[] = { + { + .pclk = &pll1_clk, + .pclk_val =MCTR_CLK_PLL1_VAL , + }, { + .pclk = &pll4_clk, + .pclk_val =MCTR_CLK_PLL4_VAL , + }, +}; + +/* ddr parent select structure */ +static struct pclk_sel ddr_pclk_sel = { + .pclk_info = ddr_pclk_info, + .pclk_count =ARRAY_SIZE (ddr_pclk_info), + .pclk_sel_reg =PERIP_CLK_CFG , + .pclk_sel_mask =MCTR_CLK_MASK , +}; + +static struct clk ddr_clk = { + .flags =ALWAYS_ENABLED |SYSTEM_CLK , + .recalc = &follow_parent, + .pclk_sel = &ddr_pclk_sel, + .pclk_sel_shift =MCTR_CLK_SHIFT , + .private_data = &ddr_rate_tbl, +}; +/* cpu clock */ static struct clk cpu_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .pclk = &pll1_clk, .div_factor =2 , .recalc = &follow_parent,
@@ -219,7 +253,7 @@ static struct clk cpu_clk = {/* ahb clock */ static struct clk ahb_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .pclk = &pll1_clk, .div_factor =6 , .recalc = &follow_parent,
@@ -227,7 +261,7 @@ static struct clk ahb_clk = {/* apb clock */ static struct clk apb_clk = { - .flags =ALWAYS_ENABLED , + .flags =ALWAYS_ENABLED |SYSTEM_CLK , .pclk = &pll1_clk, .div_factor =12 , .recalc = &follow_parent,
@@ -844,6 +878,7 @@ static struct clk_lookup spear_clk_lookups[] = { {.con_id = "pll6_clk", .clk = &pll6_clk}, /* clock derived from pll1 clk */ + {.con_id = "ddr_clk", .clk = &ddr_clk}, {.con_id = "cpu_clk", .clk = &cpu_clk}, {.con_id = "ahb_clk", .clk = &ahb_clk}, {.con_id = "apb_clk", .clk = &apb_clk},
@@ -910,12 +945,8 @@ static struct clk_lookup spear_clk_lookups[] = {#endif }; -void __init clk_init (void ) +/* machine clk init */ +void __init spear13xx_clk_init (void ) { -int i; - -for (i =0 ; i <ARRAY_SIZE (spear_clk_lookups); i++) -clk_register (&spear_clk_lookups[i]); - -recalc_root_clocks (); +clk_init (spear_clk_lookups,ARRAY_SIZE (spear_clk_lookups), &ddr_clk); }
arch/arm/mach-spear13xx/include/mach/generic.h +1 -1
@@ -46,7 +46,7 @@ extern struct platform_device smi_device;extern struct sys_timer spear13xx_timer;/* Add spear13xx family function declarations here */ -void __init clk_init (void ); +void __init spear13xx_clk_init (void );void __init i2c_register_board_devices (void );void __init spear_setup_timer (void );void __init spear13xx_map_io (void );
arch/arm/mach-spear13xx/include/mach/misc_regs.h +4 -0
@@ -98,6 +98,10 @@#define CLCD_CLK_SHIFT 2#define C3_CLK_MASK 1#define C3_CLK_SHIFT 1 +#define MCTR_CLK_SHIFT 10 +#define MCTR_CLK_MASK 0x1 +#define MCTR_CLK_PLL1_VAL 0x0 +#define MCTR_CLK_PLL4_VAL 0x1#define GMAC_CLK_CFG ((unsigned int *)(MISC_BASE + 0x248))
arch/arm/mach-spear13xx/spear13xx.c +1 -1
@@ -443,7 +443,7 @@ void __init spear13xx_map_io(void)iotable_init (spear13xx_io_desc,ARRAY_SIZE (spear13xx_io_desc));/* This will initialize clock framework */ -clk_init (); +spear13xx_clk_init (); }static void __init spear13xx_timer_init (void )
arch/arm/mach-spear3xx/clock.c +83 -22
185 lines not on this page · raw message
arch/arm/mach-spear3xx/include/mach/generic.h +1 -1
@@ -45,7 +45,7 @@ extern struct platform_device smi_device;extern struct sys_timer spear3xx_timer;/* Add spear3xx family function declarations here */ -void __init clk_init (void ); +void __init spear3xx_clk_init (void );void __init i2c_register_board_devices (void );void __init spear_setup_timer (void );void __init spear3xx_map_io (void );
arch/arm/mach-spear3xx/include/mach/misc_regs.h +7 -0
@@ -46,6 +46,13 @@#define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C))#define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020)) +/* PLL_CLK_CFG register masks */ +#define MCTR_CLK_SHIFT 28 +#define MCTR_CLK_MASK 0x7 +#define MCTR_CLK_HCLK_VAL 0x0 +#define MCTR_CLK_2HCLK_VAL 0x1 +#define MCTR_CLK_PLL2_VAL 0x3 +#define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024))/* CORE CLK CFG register masks */ #define PLL_HCLK_RATIO_SHIFT 10
arch/arm/mach-spear3xx/spear3xx.c +1 -1
@@ -280,7 +280,7 @@ void __init spear3xx_map_io(void)iotable_init (spear3xx_io_desc,ARRAY_SIZE (spear3xx_io_desc));/* This will initialize clock framework */ -clk_init (); +spear3xx_clk_init (); }/* pad multiplexing support */
arch/arm/mach-spear6xx/clock.c +83 -22
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arch/arm/mach-spear6xx/include/mach/generic.h +1 -1
@@ -52,7 +52,7 @@ void __init spear6xx_map_io(void);void __init spear6xx_init_irq (void );void __init spear6xx_init (void );void __init spear600_init (void ); -void __init clk_init (void ); +void __init spear6xx_clk_init (void );/* Add spear600 machine device structure declarations here */
arch/arm/mach-spear6xx/include/mach/misc_regs.h +7 -0
@@ -47,6 +47,13 @@#define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C))#define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020))#define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024)) +/* PLL_CLK_CFG register masks */ +#define MCTR_CLK_SHIFT 28 +#define MCTR_CLK_MASK 0x7 +#define MCTR_CLK_HCLK_VAL 0x0 +#define MCTR_CLK_2HCLK_VAL 0x1 +#define MCTR_CLK_PLL2_VAL 0x3 +/* CORE CLK CFG register masks */ #define PLL_HCLK_RATIO_SHIFT 10#define PLL_HCLK_RATIO_MASK 0x3
arch/arm/mach-spear6xx/spear6xx.c +1 -1
@@ -439,7 +439,7 @@ void __init spear6xx_map_io(void)iotable_init (spear6xx_io_desc,ARRAY_SIZE (spear6xx_io_desc));/* This will initialize clock framework */ -clk_init (); +spear6xx_clk_init (); }static void __init spear6xx_timer_init (void )
arch/arm/plat-spear/clock.c +114 -19
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arch/arm/plat-spear/include/plat/clock.h +31 -11
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Signature · 1 line
1.7.2.2
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
2 SPEAr platform SoCs(spear310 and spear320) support an External Memory Interface controller. This controller is used to interface with Parallel NOR Flash devices.
This patch adds just the platform code needed for EMI (mainly EMI initialization). The driver being used is driver/mtd/maps/physmap.c
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/Makefile | 4 + arch/arm/mach-spear3xx/clock.c | 12 +++ arch/arm/mach-spear3xx/emi.c | 86 ++++++++++++++++++++++++ arch/arm/mach-spear3xx/include/mach/emi.h | 79 ++++++++++++++++++++++ arch/arm/mach-spear3xx/include/mach/generic.h | 2 + arch/arm/mach-spear3xx/include/mach/spear310.h | 9 +++ arch/arm/mach-spear3xx/include/mach/spear320.h | 6 ++ arch/arm/mach-spear3xx/spear310.c | 20 ++++++ arch/arm/mach-spear3xx/spear310_evb.c | 18 +++++ arch/arm/mach-spear3xx/spear320.c | 20 ++++++ arch/arm/mach-spear3xx/spear320_evb.c | 17 +++++ 11 files changed, 273 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-spear3xx/emi.c create mode 100644 arch/arm/mach-spear3xx/include/mach/emi.h
arch/arm/mach-spear3xx/Makefile +4 -0
@@ -24,3 +24,7 @@ obj-$(CONFIG_MACH_SPEAR320) += spear320.o # spear320 boards files obj-$(CONFIG_BOARD_SPEAR320_EVB) += spear320_evb.o + +# specific files +obj-$(CONFIG_MACH_SPEAR310) += emi.o +obj-$(CONFIG_MACH_SPEAR320) += emi.o
arch/arm/mach-spear3xx/clock.c +12 -0
@@ -552,6 +552,15 @@ static struct clk adc_clk = { .recalc = &follow_parent, }; +#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 ) +/* emi clock */ +static struct clk emi_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ahb_clk, + .recalc = &follow_parent, +}; +#endif +/* ssp clock */ static struct clk ssp0_clk = { .pclk = &apb_clk,
@@ -744,6 +753,9 @@ static struct clk_lookup spear_clk_lookups[] = { { .dev_id = "adc", .clk = &adc_clk}, { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, { .dev_id = "gpio", .clk = &gpio_clk}, +#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) + { .dev_id = "physmap-flash", .clk = &emi_clk}, +#endif #if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR310) || \ defined(CONFIG_MACH_SPEAR320) { .con_id = "fsmc", .clk = &fsmc_clk},
arch/arm/mach-spear3xx/emi.c new file +86 -0
86 lines not on this page · raw message
arch/arm/mach-spear3xx/include/mach/emi.h new file +79 -0
79 lines not on this page · raw message
arch/arm/mach-spear3xx/include/mach/generic.h +2 -0
@@ -167,6 +167,7 @@ extern struct amba_device uart2_device;extern struct amba_device uart3_device;extern struct amba_device uart4_device;extern struct amba_device uart5_device; +extern struct platform_device emi_nor_device;extern struct platform_device plgpio_device;extern struct platform_device nand_device;
@@ -192,6 +193,7 @@ extern struct amba_device uart1_device;extern struct amba_device uart2_device;extern struct platform_device can0_device;extern struct platform_device can1_device; +extern struct platform_device emi_nor_device;extern struct platform_device i2c1_device;extern struct platform_device nand_device;extern struct platform_device plgpio_device;
arch/arm/mach-spear3xx/include/mach/spear310.h +9 -0
@@ -18,6 +18,15 @@#define SPEAR310_NAND_BASE UL(0x40000000)#define SPEAR310_FSMC_BASE UL(0x44000000) +#define SPEAR310_EMI_REG_BASE UL(0x4F000000) +#define SPEAR310_EMI_MEM_0_BASE UL(0x50000000) +#define SPEAR310_EMI_MEM_1_BASE UL(0x60000000) +#define SPEAR310_EMI_MEM_2_BASE UL(0x70000000) +#define SPEAR310_EMI_MEM_3_BASE UL(0x80000000) +#define SPEAR310_EMI_MEM_4_BASE UL(0x90000000) +#define SPEAR310_EMI_MEM_5_BASE UL(0xA0000000) +#define SPEAR310_EMI_MEM_SIZE UL(0x10000000) +#define SPEAR310_UART1_BASE UL(0xB2000000)#define SPEAR310_UART2_BASE UL(0xB2080000)#define SPEAR310_UART3_BASE UL(0xB2100000)
arch/arm/mach-spear3xx/include/mach/spear320.h +6 -0
@@ -17,6 +17,12 @@#define __MACH_SPEAR320_H#define SPEAR320_EMI_CTRL_BASE UL(0x40000000) +#define SPEAR320_EMI_MEM_0_BASE UL(0x44000000) +#define SPEAR320_EMI_MEM_1_BASE UL(0x45000000) +#define SPEAR320_EMI_MEM_2_BASE UL(0x46000000) +#define SPEAR320_EMI_MEM_3_BASE UL(0x47000000) +#define SPEAR320_EMI_MEM_SIZE UL(0x01000000) +#define SPEAR320_FSMC_BASE UL(0x4C000000)#define SPEAR320_NAND_BASE UL(0x50000000)#define SPEAR320_I2S_BASE UL(0x60000000)
arch/arm/mach-spear3xx/spear310.c +20 -0
@@ -11,6 +11,7 @@* warranty of any kind, whether express or implied. */ +#include <linux/mtd/physmap.h> #include <linux/ptrace.h> #include <asm/irq.h> #include <mach/generic.h>
@@ -268,6 +269,25 @@ int spear300_o2p(int offset)return offset +2 ; } +/* emi nor flash device registeration */ +static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR310_EMI_MEM_0_BASE , + .end =SPEAR310_EMI_MEM_0_BASE +SPEAR310_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +}; + +struct platform_device emi_nor_device = { + .name ="physmap-flash" , + .id =-1 , + .resource = emi_nor_resources, + .num_resources =ARRAY_SIZE (emi_nor_resources), + .dev.platform_data = &emi_norflash_data, +}; +static struct plgpio_platform_data plgpio_plat_data = { .gpio_base =8 , .irq_base =SPEAR_PLGPIO_INT_BASE ,
arch/arm/mach-spear3xx/spear310_evb.c +18 -0
@@ -16,6 +16,7 @@#include <linux/mtd/nand.h> #include <linux/spi/flash.h> #include <linux/spi/spi.h> +#include <mach/emi.h> #include <mach/generic.h> #include <mach/gpio.h> #include <mach/spear.h>
@@ -23,6 +24,15 @@#include <plat/smi.h> #include <plat/spi.h> +#define PARTITION (n, off, sz) {.name = n, .offset = off, .size = sz} + +static struct mtd_partition partition_info[] = { +PARTITION ("X-loader" ,0 ,1 *0x20000 ), +PARTITION ("U-Boot" ,0x20000 ,3 *0x20000 ), +PARTITION ("Kernel" ,0x80000 ,24 *0x20000 ), +PARTITION ("Root File System" ,0x380000 ,84 *0x20000 ), +}; +/* padmux devices to enable */ static struct pmx_dev *pmx_devs[] = {/* spear3xx specific devices */
@@ -60,6 +70,7 @@ static struct amba_device *amba_devs[] __initdata = {static struct platform_device *plat_devs[]__initdata = {/* spear3xx specific devices */ &ehci_device, + &emi_nor_device, &i2c_device, &nand_device, &ohci0_device,
@@ -126,12 +137,19 @@ static void __init spear310_evb_init(void)/* initialize serial nor related data in smi plat data */ smi_init_board_info (&smi_device); +/* initialize emi related data in emi plat data */ +emi_init_board_info (&emi_nor_device, partition_info, +ARRAY_SIZE (partition_info),EMI_FLASH_WIDTH32 ); +/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));/* Add Amba Devices */ spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs)); +/* Initialize emi regiters */ +emi_init (&emi_nor_device,SPEAR310_EMI_REG_BASE ,0 ,EMI_FLASH_WIDTH32 ); +spi_init (); }
arch/arm/mach-spear3xx/spear320.c +20 -0
@@ -12,6 +12,7 @@*/ #include <linux/amba/pl022.h> +#include <linux/mtd/physmap.h> #include <linux/ptrace.h> #include <linux/types.h> #include <linux/mmc/sdhci-spear.h>
@@ -473,6 +474,25 @@ struct amba_device uart2_device = { .irq = {VIRQ_UART2, NO_IRQ}, }; +/* emi nor flash device registeration */ +static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR320_EMI_MEM_0_BASE , + .end =SPEAR320_EMI_MEM_0_BASE +SPEAR320_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +}; + +struct platform_device emi_nor_device = { + .name ="physmap-flash" , + .id =-1 , + .resource = emi_nor_resources, + .num_resources =ARRAY_SIZE (emi_nor_resources), + .dev.platform_data = &emi_norflash_data, +}; +/* plgpio device registeration */ static struct plgpio_platform_data plgpio_plat_data = { .gpio_base = 8,
arch/arm/mach-spear3xx/spear320_evb.c +17 -0
@@ -17,6 +17,7 @@#include <linux/spi/flash.h> #include <linux/mmc/sdhci-spear.h> #include <linux/spi/spi.h> +#include <mach/emi.h> #include <mach/generic.h> #include <mach/gpio.h> #include <mach/spear.h>
@@ -24,6 +25,15 @@#include <plat/smi.h> #include <plat/spi.h> +#define PARTITION (n, off, sz) {.name = n, .offset = off, .size = sz} + +static struct mtd_partition partition_info[] = { +PARTITION ("X-loader" ,0 ,1 *0x20000 ), +PARTITION ("U-Boot" ,0x20000 ,3 *0x20000 ), +PARTITION ("Kernel" ,0x80000 ,24 *0x20000 ), +PARTITION ("Root File System" ,0x380000 ,84 *0x20000 ), +}; +/* padmux devices to enable */ static struct pmx_dev *pmx_devs[] = {/* spear3xx specific devices */
@@ -145,12 +155,19 @@ static void __init spear320_evb_init(void)/* Register slave devices on the I2C buses */ i2c_register_board_devices (); +/* initialize emi related data in emi plat data */ +emi_init_board_info (&emi_nor_device, partition_info, +ARRAY_SIZE (partition_info),EMI_FLASH_WIDTH16 ); +/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));/* Add Amba Devices */ spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs)); +/* Initialize emi regiters */ +emi_init (&emi_nor_device,SPEAR320_EMI_CTRL_BASE ,0 ,EMI_FLASH_WIDTH16 ); +spi_init (); }
Signature · 1 line
1.7.2.2
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 44 lines · Viresh KUMAR
From: Vipin Kumar <[email protected]>
2 SPEAr platform SoCs(spear310 and spear320) support an External Memory Interface controller. This controller is used to interface with Parallel NOR Flash devices.
This patch adds just the platform code needed for EMI (mainly EMI initialization). The driver being used is
driver/mtd/maps/physmap.cSigned-off-by Vipin Kumar <[email protected]>Signed-off-by Viresh Kumar <[email protected]>--- arch/arm/mach-spear3xx/Makefile | 4 + arch/arm/mach-spear3xx/clock.c | 12 +++ arch/arm/mach-spear3xx/emi.c | 86 ++++++++++++++++++++++++ arch/arm/mach-spear3xx/include/mach/emi.h | 79 ++++++++++++++++++++++ arch/arm/mach-spear3xx/include/mach/generic.h | 2 + arch/arm/mach-spear3xx/include/mach/spear310.h | 9 +++ arch/arm/mach-spear3xx/include/mach/spear320.h | 6 ++ arch/arm/mach-spear3xx/spear310.c | 20 ++++++ arch/arm/mach-spear3xx/spear310_evb.c | 18 +++++ arch/arm/mach-spear3xx/spear320.c | 20 ++++++ arch/arm/mach-spear3xx/spear320_evb.c | 17 +++++ 11 files changed, 273 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-spear3xx/emi.c create mode 100644 arch/arm/mach-spear3xx/include/mach/emi.harch/arm/mach-spear3xx/Makefile +4
-0@@ -24,3 +24,7 @@ obj-$(CONFIG_MACH_SPEAR320) += spear320.o # spear320 boards files obj-$(CONFIG_BOARD_SPEAR320_EVB) += spear320_evb.o + +# specific files +obj-$(CONFIG_MACH_SPEAR310) += emi.o +obj-$(CONFIG_MACH_SPEAR320) += emi.oarch/arm/mach-spear3xx/clock.c +0
-0
arch/arm/mach-spear3xx/clock.c static struct clk adc_clk = { · line 555
Quoted 4 lines
arch/arm/mach-spear3xx/clock.c +1
-0@@ -552,6 +552,15 @@ static struct clk adc_clk = { .recalc = &follow_parent, }; +#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 )
can you create a macro for this?
or even better detect it
Quoted 39 lines
arch/arm/mach-spear3xx/clock.c +11
-0+/* emi clock */ +static struct clk emi_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ahb_clk, + .recalc = &follow_parent, +}; +#endif +/* ssp clock */ static struct clk ssp0_clk = { .pclk = &apb_clk,@@ -744,6 +753,9 @@ static struct clk_lookup spear_clk_lookups[] = { { .dev_id = "adc", .clk = &adc_clk}, { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, { .dev_id = "gpio", .clk = &gpio_clk}, +#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) + { .dev_id = "physmap-flash", .clk = &emi_clk}, +#endif #if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR310) || \ defined(CONFIG_MACH_SPEAR320) { .con_id = "fsmc", .clk = &fsmc_clk},arch/arm/mach-spear3xx/emi.c new file +12
-0@@ -0,0 +1,86 @@ +/* +* arch/arm/mach-spear3xx/emi.c +* +* EMI (External Memory Interface) file +* +* Copyright (C) 2010 ST Microelectronics +* Vipin Kumar<[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/
arch/arm/mach-spear3xx/emi.c line 22
Quoted 10 lines
arch/arm/mach-spear3xx/emi.c new file +10
-0+ +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/io.h> +#include <mach/emi.h> + +int __init emi_init (struct platform_device *pdev,unsigned long base, +u32 bank,u32 width) +{
how about request the memory region
and use platform device to register the bank ressource instead of define
it will make it more flexible
Quoted 19 lines
arch/arm/mach-spear3xx/emi.c new file +19
-0+void __iomem *emi_reg_base; +struct clk *clk; +int ret; + +if (bank > (EMI_MAX_BANKS -1 )) +return -EINVAL ; + + emi_reg_base =ioremap (base,EMI_REG_SIZE ); +if (!emi_reg_base) +return -ENOMEM ; + + clk =clk_get (&pdev->dev,NULL ); +if (IS_ERR (clk)) { +iounmap (emi_reg_base); +return PTR_ERR (clk); + } + + ret =clk_enable (clk); +if (ret) {
arch/arm/mach-spear3xx/emi.c line 51
Quoted 10 lines
arch/arm/mach-spear3xx/emi.c new file +10
-0+iounmap (emi_reg_base); +return ret; + } + +/* set the timing */ +writel (0x10 , emi_reg_base + (EMI_BANK_REG_SIZE * bank) +TAP_REG ); +writel (0x05 , emi_reg_base + (EMI_BANK_REG_SIZE * bank) +TSDP_REG ); +writel (0x0a , emi_reg_base + (EMI_BANK_REG_SIZE * bank) +TDPW_REG ); +writel (0x0a , emi_reg_base + (EMI_BANK_REG_SIZE * bank) +TDPR_REG ); +writel (0x05 , emi_reg_base + (EMI_BANK_REG_SIZE * bank) +TDCS_REG );
you always set the same timmings?
it's wired as the timings as supposed to be nor or nand specific
and you can you more than one nor or nand
so NACK
Quoted 25 lines
arch/arm/mach-spear3xx/emi.c new file +25
-0+ +switch (width) { +case EMI_FLASH_WIDTH8 : + width =EMI_CNTL_WIDTH8 ; +break ; + +case EMI_FLASH_WIDTH16 : + width =EMI_CNTL_WIDTH16 ; +break ; + +case EMI_FLASH_WIDTH32 : + width =EMI_CNTL_WIDTH32 ; +break ; +default : + width =EMI_CNTL_WIDTH8 ; +break ; + } +/* set the data width */ +writel (width |EMI_CNTL_ENBBYTERW , + emi_reg_base + (EMI_BANK_REG_SIZE * bank) +CTRL_REG ); + +/* disable all the acks */ +writel (0x3f << bank, emi_reg_base +ACK_REG ); + +iounmap (emi_reg_base);
arch/arm/mach-spear3xx/emi.c line 86
Quoted 10 lines
arch/arm/mach-spear3xx/emi.c new file +10
-0+ +return 0 ; +} + +void __init emi_init_board_info (struct platform_device *pdev, +struct mtd_partition *partitions,unsigned int nr_partitions, +unsigned int width) +{ +emi_init_plat_data (pdev, partitions, nr_partitions, width); +}
???
Quoted 158 lines
arch/arm/mach-spear3xx/include/mach/emi.h new file +79
-0@@ -0,0 +1,79 @@ +/* +* arch/arm/mach-spear3xx/include/mach/emi.h +* +* EMI macros for SPEAr platform +* +* Copyright (C) 2010 ST Microelectronics +* Vipin Kumar <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#ifndef __MACH_EMI_H +#define __MACH_EMI_H + +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/mtd/physmap.h> + +#define EMI_FLASH_WIDTH8 1 +#define EMI_FLASH_WIDTH16 2 +#define EMI_FLASH_WIDTH32 4 + +#define EMI_REG_SIZE 0x100 +#define EMI_BANK_REG_SIZE 0x18 + +#define TAP_REG (0x0) +#define TSDP_REG (0x4) +#define TDPW_REG (0x8) +#define TDPR_REG (0xC) +#define TDCS_REG (0x10) +#define CTRL_REG (0x14) + +#if defined(CONFIG_MACH_SPEAR310 ) +#define TIMEOUT_REG (0x90) +#define ACK_REG (0x94) +#define IRQ_REG (0x98) + +#define EMI_MAX_BANKS 6 + +#elif defined(CONFIG_MACH_SPEAR320 ) +#define TIMEOUT_REG (0x60) +#define ACK_REG (0x64) +#define IRQ_REG (0x68) + +#define EMI_MAX_BANKS 4 + +#endif + +/* Control register definitions */ +#define EMI_CNTL_WIDTH8 (0 << 0) +#define EMI_CNTL_WIDTH16 (1 << 0) +#define EMI_CNTL_WIDTH32 (2 << 0) +#define EMI_CNTL_ENBBYTEW (1 << 2) +#define EMI_CNTL_ENBBYTER (1 << 3) +#define EMI_CNTL_ENBBYTERW (EMI_CNTL_ENBBYTER | EMI_CNTL_ENBBYTEW) + +static inline void emi_init_plat_data (struct platform_device *pdev, +struct mtd_partition *partitions,unsigned int nr_partitions, +unsigned int width) +{ +struct physmap_flash_data *emi_plat_data; + emi_plat_data =dev_get_platdata (&pdev->dev); + +if (partitions) { + emi_plat_data->parts = partitions; + emi_plat_data->nr_parts = nr_partitions; + } + + emi_plat_data->width = width; +} + +extern int __init emi_init (struct platform_device *pdev,unsigned long base, +u32 bank,u32 width); +extern void __init emi_init_board_info (struct platform_device *pdev, +struct mtd_partition *partitions,unsigned int nr_partitions, +unsigned int width); +#endif arch/arm/mach-spear3xx/include/mach/generic.h +2
-0@@ -167,6 +167,7 @@ extern struct amba_device uart2_device;extern struct amba_device uart3_device;extern struct amba_device uart4_device;extern struct amba_device uart5_device; +extern struct platform_device emi_nor_device;extern struct platform_device plgpio_device;extern struct platform_device nand_device;@@ -192,6 +193,7 @@ extern struct amba_device uart1_device;extern struct amba_device uart2_device;extern struct platform_device can0_device;extern struct platform_device can1_device; +extern struct platform_device emi_nor_device;extern struct platform_device i2c1_device;extern struct platform_device nand_device;extern struct platform_device plgpio_device;arch/arm/mach-spear3xx/include/mach/spear310.h +9
-0@@ -18,6 +18,15 @@#define SPEAR310_NAND_BASE UL(0x40000000)#define SPEAR310_FSMC_BASE UL(0x44000000) +#define SPEAR310_EMI_REG_BASE UL(0x4F000000) +#define SPEAR310_EMI_MEM_0_BASE UL(0x50000000) +#define SPEAR310_EMI_MEM_1_BASE UL(0x60000000) +#define SPEAR310_EMI_MEM_2_BASE UL(0x70000000) +#define SPEAR310_EMI_MEM_3_BASE UL(0x80000000) +#define SPEAR310_EMI_MEM_4_BASE UL(0x90000000) +#define SPEAR310_EMI_MEM_5_BASE UL(0xA0000000) +#define SPEAR310_EMI_MEM_SIZE UL(0x10000000) +#define SPEAR310_UART1_BASE UL(0xB2000000)#define SPEAR310_UART2_BASE UL(0xB2080000)#define SPEAR310_UART3_BASE UL(0xB2100000)arch/arm/mach-spear3xx/include/mach/spear320.h +6
-0@@ -17,6 +17,12 @@#define __MACH_SPEAR320_H#define SPEAR320_EMI_CTRL_BASE UL(0x40000000) +#define SPEAR320_EMI_MEM_0_BASE UL(0x44000000) +#define SPEAR320_EMI_MEM_1_BASE UL(0x45000000) +#define SPEAR320_EMI_MEM_2_BASE UL(0x46000000) +#define SPEAR320_EMI_MEM_3_BASE UL(0x47000000) +#define SPEAR320_EMI_MEM_SIZE UL(0x01000000) +#define SPEAR320_FSMC_BASE UL(0x4C000000)#define SPEAR320_NAND_BASE UL(0x50000000)#define SPEAR320_I2S_BASE UL(0x60000000)arch/arm/mach-spear3xx/spear310.c +1
-0@@ -11,6 +11,7 @@* warranty of any kind, whether express or implied. */ +#include <linux/mtd/physmap.h> #include <linux/ptrace.h> #include <asm/irq.h> #include <mach/generic.h> @@ -268,6 +269,25 @@ int spear300_o2p(int offset)return offset +2 ; }
arch/arm/mach-spear3xx/spear310.c int spear300_o2p(int offset) · line 281
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arch/arm/mach-spear3xx/spear310.c +10
-0+/* emi nor flash device registeration */ +static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR310_EMI_MEM_0_BASE , + .end =SPEAR310_EMI_MEM_0_BASE +SPEAR310_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +};
it's board specfic not mach
NACK
Best Regards,
J.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 8 lines · Jean-Christophe PLAGNIOL-VILLARD
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arch/arm/mach-spear3xx/clock.c +0
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index 41a2b5e..4f049fe 100644
arch/arm/mach-spear3xx/clock.c +0
-0@@ -552,6 +552,15 @@ static struct clk adc_clk = { .recalc = &follow_parent, };
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arch/arm/mach-spear3xx/clock.c static struct clk adc_clk = { · line 555
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arch/arm/mach-spear3xx/clock.c +1
-0+#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 )can you create a macro for this?
or even better detect it
It should be statically allocated, registering this to clkdev framework should be dynamic, which is done in my local repository (as mentioned in i2c patch).
Regarding creating macros: As we have three machines in spear3xx (300, 310, 320) we need to create 4 macros (300 & 310, 310 &320, 300 & 320, 300&310&320), This will make it even more complex to read. So, i would like to keep it as it is.
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arch/arm/mach-spear3xx/clock.c static struct clk adc_clk = { · line 562
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arch/arm/mach-spear3xx/clock.c +7
-0+/* emi clock */ +static struct clk emi_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ahb_clk, + .recalc = &follow_parent, +}; +#endif +/* emi nor flash device registeration */
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arch/arm/mach-spear3xx/clock.c static struct clk adc_clk = {
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arch/arm/mach-spear3xx/clock.c +9
-0+static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR310_EMI_MEM_0_BASE , + .end =SPEAR310_EMI_MEM_0_BASE +SPEAR310_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +};it's board specfic not mach
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NACK
No. This is machine specific. Same for all boards.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 43 lines · viresh kumar
Quoted 8 lines · Jean-Christophe PLAGNIOL-VILLARD
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arch/arm/mach-spear3xx/clock.c +0
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index 41a2b5e..4f049fe 100644
arch/arm/mach-spear3xx/clock.c +0
-0@@ -552,6 +552,15 @@ static struct clk adc_clk = { .recalc = &follow_parent, };Quoted 4 lines
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arch/arm/mach-spear3xx/clock.c static struct clk adc_clk = { · line 555
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arch/arm/mach-spear3xx/clock.c +1
-0+#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 )can you create a macro for this?
or even better detect itIt should be statically allocated, registering this to clkdev framework should be dynamic, which is done in my local repository (as mentioned in i2c patch).
Regarding creating macros: As we have three machines in spear3xx (300, 310, 320) we need to create 4 macros (300 & 310, 310 &320, 300 & 320, 300&310&320), This will make it even more complex to read. So, i would like to keep it as it is.
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arch/arm/mach-spear3xx/clock.c static struct clk adc_clk = { · line 562
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arch/arm/mach-spear3xx/clock.c +7
-0+/* emi clock */ +static struct clk emi_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ahb_clk, + .recalc = &follow_parent, +}; +#endif +/* emi nor flash device registeration */
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arch/arm/mach-spear3xx/clock.c static struct clk adc_clk = {
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arch/arm/mach-spear3xx/clock.c +9
-0+static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR310_EMI_MEM_0_BASE , + .end =SPEAR310_EMI_MEM_0_BASE +SPEAR310_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +};it's board specfic not mach
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NACK
No. This is machine specific. Same for all boards.
NACK as you can have a flash at other place and more than one flash and the size depend on the flash
Best Regards,
J.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 12 lines · Jean-Christophe PLAGNIOL-VILLARD
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+/* emi nor flash device registeration */
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arch/arm/mach-spear3xx/spear310.c int spear300_o2p(int offset) · line 281
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arch/arm/mach-spear3xx/spear310.c +9
-0+static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR310_EMI_MEM_0_BASE , + .end =SPEAR310_EMI_MEM_0_BASE +SPEAR310_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +};it's board specfic not mach
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NACK
No. This is machine specific. Same for all boards.
NACK as you can have a flash at other place and more than one flash and the size depend on the flash
Correct!! Size has to be board specific. Will modify it.
thanks
viresh.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 13 lines · viresh kumar
Quoted 12 lines · Jean-Christophe PLAGNIOL-VILLARD
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+/* emi nor flash device registeration */
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arch/arm/mach-spear3xx/spear310.c int spear300_o2p(int offset) · line 281
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arch/arm/mach-spear3xx/spear310.c +9
-0+static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR310_EMI_MEM_0_BASE , + .end =SPEAR310_EMI_MEM_0_BASE +SPEAR310_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +};it's board specfic not mach
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NACK
No. This is machine specific. Same for all boards.
NACK as you can have a flash at other place and more than one flash and the size depend on the flash
Correct!! Size has to be board specific. Will modify it.
and the start also as you may have 2 nor flash on different bank
Best Regards,
J.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 14 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 13 lines · viresh kumar
Quoted 12 lines · Jean-Christophe PLAGNIOL-VILLARD
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+/* emi nor flash device registeration */
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arch/arm/mach-spear3xx/spear310.c int spear300_o2p(int offset) · line 281
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arch/arm/mach-spear3xx/spear310.c +9
-0+static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start =SPEAR310_EMI_MEM_0_BASE , + .end =SPEAR310_EMI_MEM_0_BASE +SPEAR310_EMI_MEM_SIZE -1 , + .flags =IORESOURCE_MEM , + }, +};it's board specfic not mach
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NACK
No. This is machine specific. Same for all boards.
NACK as you can have a flash at other place and more than one flash and the size depend on the flash
Correct!! Size has to be board specific. Will modify it.
and the start also as you may have 2 nor flash on different bank
The start addresses in our case are fixed for a particular bank.
Regards
Vipin
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Best Regards,
J.
.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 18 lines · Vipin Kumar
Quoted 17 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 16 lines · viresh kumar
Quoted 15 lines · Jean-Christophe PLAGNIOL-VILLARD
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+/* emi nor flash device registeration */
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Review
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-0+static struct physmap_flash_data emi_norflash_data; + +static struct resource emi_nor_resources[] = { + { + .start = SPEAR310_EMI_MEM_0_BASE, + .end = SPEAR310_EMI_MEM_0_BASE + SPEAR310_EMI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +};it's board specfic not mach
NACK
No. This is machine specific. Same for all boards.
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NACK as you can have a flash at other place and more than one flash and the size depend on the flash
Correct!! Size has to be board specific. Will modify it.
and the start also as you may have 2 nor flash on different bank
The start addresses in our case are fixed for a particular bank.
but not for the nor so let this decide by every board not by the SoC
Best Regards,
J.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 22 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 21 lines · Vipin Kumar
Quoted 20 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 19 lines · viresh kumar
Quoted 17 lines · Jean-Christophe PLAGNIOL-VILLARD
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+/* emi nor flash device registeration */
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+static struct physmap_flash_data emi_norflash_data;
+
+static struct resource emi_nor_resources[] = {
+ {
+ .start = SPEAR310_EMI_MEM_0_BASE,
+ .end = SPEAR310_EMI_MEM_0_BASE + SPEAR310_EMI_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};it's board specfic not mach
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NACK
No. This is machine specific. Same for all boards.
NACK as you can have a flash at other place and more than one flash and the size depend on the flash
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Correct!! Size has to be board specific. Will modify it.
and the start also as you may have 2 nor flash on different bank
The start addresses in our case are fixed for a particular bank.
but not for the nor so let this decide by every board not by the SoC
The NOR memory is placed within the system memory address space. For NAND offourse, it lies beyond system space.
EMI is a Parallel NOR memory controller and the base address and maximum size of each bank is fixed in our system...
Regards
Vipin
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
Quoted 32 lines · Vipin Kumar
Quoted 22 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 21 lines · Vipin Kumar
Quoted 20 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 19 lines · viresh kumar
Quoted 17 lines · Jean-Christophe PLAGNIOL-VILLARD
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+/* emi nor flash device registeration */
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+static struct physmap_flash_data emi_norflash_data;
+
+static struct resource emi_nor_resources[] = {
+ {
+ .start = SPEAR310_EMI_MEM_0_BASE,
+ .end = SPEAR310_EMI_MEM_0_BASE + SPEAR310_EMI_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};it's board specfic not mach
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NACK
No. This is machine specific. Same for all boards.
NACK as you can have a flash at other place and more than one flash and the size depend on the flash
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Correct!! Size has to be board specific. Will modify it.
and the start also as you may have 2 nor flash on different bank
The start addresses in our case are fixed for a particular bank.
but not for the nor so let this decide by every board not by the SoC
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The NOR memory is placed within the system memory address space. For NAND offourse, it lies beyond system space.
EMI is a Parallel NOR memory controller and the base address and maximum size of each bank is fixed in our system...
but the then is not necessarely at bank 0
Best Regards,
J.
PATCH 43/74 ST SPEAr : EMI (Extrenal Memory Interface) controller driver
In reply to Jean-Christophe PLAGNIOL-VILLARDQuoted 30 lines · Jean-Christophe PLAGNIOL-VILLARD
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arch/arm/mach-spear3xx/emi.c +0
-0Quoted 19 lines
new file mode 100644
index 0000000..dd5cb8earch/arm/mach-spear3xx/emi.c new file +14
-0@@ -0,0 +1,86 @@ +/* +* arch/arm/mach-spear3xx/emi.c +* +* EMI (External Memory Interface) file +* +* Copyright (C) 2010 ST Microelectronics +* Vipin Kumar<[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#include <linux/clk.h> Quoted 8 lines
arch/arm/mach-spear3xx/emi.c line 22
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arch/arm/mach-spear3xx/emi.c new file +8
-0+#include <linux/err.h> +#include <linux/init.h> +#include <linux/io.h> +#include <mach/emi.h> + +int __init emi_init (struct platform_device *pdev,unsigned long base, +u32 bank,u32 width) +{how about request the memory region
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and use platform device to register the bank ressource instead of define
it will make it more flexible
Hello Jean,
Sorry for replying late
Since the physmap driver implementation is generic for all the CFI device controllers, the driver expects only the actual flash base address in resource. Offcourse, the controller needs to be initialized separately.
Moreover, in most of the platforms where physmap driver is being used, the controllers are initialized independently. i.e only the NOR flash base addresses are passed as resource
examples are
arch/arm/mach-at91/board-cap9adk.carch/arm/mach-ep93xx/adssphere.carch/arm/mach-ep93xx/micro9.c
and many more
Regards
Vipin
PATCH 44/74 ST SPEAr : FSMC (Flexible Static Memory Controller) NOR interface driver
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
SPEAr1300 SoC supports FSMC to interface with various memories (NOR/NAND/SRAM). This patch adds the support for FSMC over NOR interface.
The driver being used is driver/mtd/maps/physmap.c
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/Makefile | 2 +- arch/arm/mach-spear13xx/clock.c | 2 +- arch/arm/mach-spear13xx/fsmc-nor.c | 81 ++++++++++++++++++++++++ arch/arm/mach-spear13xx/include/mach/generic.h | 1 + arch/arm/mach-spear13xx/spear1300_evb.c | 17 +++++ arch/arm/mach-spear13xx/spear13xx.c | 20 ++++++ arch/arm/plat-spear/include/plat/fsmc.h | 51 +++++++++++++++- 7 files changed, 171 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-spear13xx/fsmc-nor.c
arch/arm/mach-spear13xx/Makefile +1 -1
@@ -3,7 +3,7 @@ # # common files -obj-y += spear13xx.o clock.o +obj-y += spear13xx.o clock.o fsmc-nor.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
arch/arm/mach-spear13xx/clock.c +1 -1
@@ -920,7 +920,7 @@ static struct clk_lookup spear_clk_lookups[] = { {.dev_id = "pcie2", .clk = &pcie2_clk}, {.dev_id = "cfxd", .clk = &cfxd_clk}, {.dev_id = "sdhci", .clk = &sdhci_clk}, - {.con_id = "fsmc", .clk = &fsmc_clk}, + {.dev_id = "fsmc", .clk = &fsmc_clk}, {.dev_id = "sysram0", .clk = &sysram0_clk}, {.dev_id = "sysram1", .clk = &sysram1_clk},
arch/arm/mach-spear13xx/fsmc-nor.c new file +81 -0
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arch/arm/mach-spear13xx/include/mach/generic.h +1 -0
@@ -38,6 +38,7 @@ extern struct platform_device ehci1_device;extern struct platform_device i2c_device;extern struct platform_device kbd_device;extern struct platform_device nand_device; +extern struct platform_device fsmc_nor_device;extern struct platform_device ohci0_device;extern struct platform_device ohci1_device;extern struct platform_device rtc_device;
arch/arm/mach-spear13xx/spear1300_evb.c +17 -0
@@ -21,11 +21,21 @@#include <mach/generic.h> #include <mach/spear.h> #include <mach/pcie.h> +#include <plat/fsmc.h> #include <plat/keyboard.h> #include <plat/nand.h> #include <plat/smi.h> #include <plat/spi.h> +#define PARTITION (n, off, sz) {.name = n, .offset = off, .size = sz} + +static struct mtd_partition partition_info[] = { +PARTITION ("X-loader" ,0 ,1 *0x20000 ), +PARTITION ("U-Boot" ,0x20000 ,3 *0x20000 ), +PARTITION ("Kernel" ,0x80000 ,24 *0x20000 ), +PARTITION ("Root File System" ,0x380000 ,84 *0x20000 ), +}; +static struct amba_device *amba_devs[]__initdata = { &gpio_device[0 ], &gpio_device[1 ],
@@ -143,6 +153,9 @@ static void __init spear1300_evb_init(void)enable_pcie0_clk ();pcie_init (&spear1300_pcie_port_is_host);#endif +/* initialize fsmc related data in fsmc plat data */ +fsmc_init_board_info (&fsmc_nor_device, partition_info, +ARRAY_SIZE (partition_info),FSMC_FLASH_WIDTH8 );/* Add Platform Devices */ platform_add_devices (plat_devs,ARRAY_SIZE (plat_devs));
@@ -150,6 +163,10 @@ static void __init spear1300_evb_init(void)/* Add Amba Devices */ spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs)); +/* Initialize fsmc regiters */ +fsmc_nor_init (&fsmc_nor_device,SPEAR13XX_FSMC_BASE ,0 , +FSMC_FLASH_WIDTH8 ); +spi_init (); }
arch/arm/mach-spear13xx/spear13xx.c +20 -0
@@ -14,6 +14,7 @@#include <linux/types.h> #include <linux/amba/pl022.h> #include <linux/amba/pl061.h> +#include <linux/mtd/physmap.h> #include <linux/ptrace.h> #include <linux/io.h> #include <asm/hardware/gic.h>
@@ -130,6 +131,25 @@ struct platform_device i2c_device = { .resource = i2c_resources, }; +/* fsmc nor flash device registeration */ +static struct physmap_flash_data fsmc_norflash_data; + +static struct resource fsmc_nor_resources[] = { + { + .start =SPEAR13XX_FSMC_MEM_BASE , + .end =SPEAR13XX_FSMC_MEM_BASE +SZ_16M -1 , + .flags =IORESOURCE_MEM , + }, +}; + +struct platform_device fsmc_nor_device = { + .name ="physmap-flash" , + .id =-1 , + .resource = fsmc_nor_resources, + .num_resources =ARRAY_SIZE (fsmc_nor_resources), + .dev.platform_data = &fsmc_norflash_data, +}; +/* nand device registeration */ void __init nand_mach_init (u32 busw) {
arch/arm/plat-spear/include/plat/fsmc.h +50 -1
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1.7.2.2
PATCH 44/74 ST SPEAr : FSMC (Flexible Static Memory Controller) NOR interface driver
2010/8/30 Viresh KUMAR <[email protected]>:
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(...)
?arch/arm/mach-spear13xx/fsmc-nor.c ? ? ? ? ? ? | ? 81 ++++++++++++++++++++++++ (...)arch/arm/plat-spear/include/plat/fsmc.h | 51 +++++++++++++++-
Hmmm... again we have this block also in U300 and NHK8815.
arch/arm/mach-spear13xx/fsmc-nor.c line 4
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(...)
+++b/arch/arm/mach-spear13xx/fsmc-nor.carch/arm/mach-spear13xx/fsmc-nor.c new file +4
-0@@ -0,0 +1,81 @@ +/* +* arch/arm/mach-spear13xx/fsmc-nor.c +* +* FSMC (Flexible Static Memory Controller) interface for NOR
It even says its generic and should live indrivers/mtd/maps I think for NOR controllers.
Quoted 67 lines
(quoted diff) +67
-0+ * + * Copyright (C) 2010 ST Microelectronics + * Vipin Kumar<[email protected]> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/io.h> +#include <plat/fsmc.h> + +int __init fsmc_nor_init(struct platform_device *pdev, unsigned long base, + ? ? ? ? ? ? ? u32 bank, u32 width) +{ + ? ? ? void __iomem *fsmc_nor_base; + ? ? ? struct fsmc_regs *regs; + ? ? ? struct clk *clk; + ? ? ? int ret; + ? ? ? u32 ctrl; + + ? ? ? if (bank > (FSMC_MAX_NOR_BANKS - 1)) + ? ? ? ? ? ? ? return -EINVAL; + + ? ? ? fsmc_nor_base = ioremap(base, FSMC_NOR_REG_SIZE); + ? ? ? if (!fsmc_nor_base) + ? ? ? ? ? ? ? return -ENOMEM; + + ? ? ? clk = clk_get(NULL, "fsmc"); + ? ? ? if (IS_ERR(clk)) { + ? ? ? ? ? ? ? iounmap(fsmc_nor_base); + ? ? ? ? ? ? ? return PTR_ERR(clk); + ? ? ? } + + ? ? ? ret = clk_enable(clk); + ? ? ? if (ret) { + ? ? ? ? ? ? ? iounmap(fsmc_nor_base); + ? ? ? ? ? ? ? return ret; + ? ? ? } + + ? ? ? regs = (struct fsmc_regs *)fsmc_nor_base; + + ? ? ? ctrl = WAIT_ENB | WRT_ENABLE | WPROT | NOR_DEV | BANK_ENABLE; + + ? ? ? switch (width) { + ? ? ? case FSMC_FLASH_WIDTH8: + ? ? ? ? ? ? ? ctrl |= WIDTH_8; + ? ? ? ? ? ? ? break; + + ? ? ? case FSMC_FLASH_WIDTH16: + ? ? ? ? ? ? ? ctrl |= WIDTH_16; + ? ? ? ? ? ? ? break; + + ? ? ? default: + ? ? ? ? ? ? ? ctrl |= WIDTH_8; + ? ? ? ? ? ? ? break; + ? ? ? } + + ? ? ? writel(ctrl, ®s->nor_bank_regs[bank].ctrl); + ? ? ? writel(0x0FFFFFFF, ®s->nor_bank_regs[bank].ctrl_tim); + ? ? ? writel(ctrl | RSTPWRDWN, ®s->nor_bank_regs[bank].ctrl); + + ? ? ? iounmap(fsmc_nor_base);
Review line 81
Quoted 10 lines
(quoted diff) +10
-0+ + ? ? ? return 0; +} + +void __init fsmc_init_board_info(struct platform_device *pdev, + ? ? ? ? ? ? ? struct mtd_partition *partitions, unsigned int nr_partitions, + ? ? ? ? ? ? ? unsigned int width) +{ + ? ? ? fsmc_init_plat_data(pdev, partitions, nr_partitions, width); +}
All this should be in drivers/mtd/maps/fsmc-nor.c or so am I right?
arch/arm/mach-spear13xx/spear13xx.c
Quoted 2 lines
arch/arm/mach-spear13xx/include/mach/generic.h +0
-0arch/arm/mach-spear13xx/spear13xx.c +0
-0
That kind of stuff you can keep :-)
arch/arm/plat-spear/include/plat/fsmc.h
Quoted 1 line
arch/arm/plat-spear/include/plat/fsmc.h +0
-0
Noooo combine this with the NAND stuff into include/linux/mtd/fsmc.h!
Quoted 5 lines
index c0fdcd3..5909afd 100644
arch/arm/plat-spear/include/plat/fsmc.h +0
-0@@ -15,11 +15,36 @@?#define
__PLAT_FSMC_H
Change #define to reflect new suggested placement.
Quoted 73 lines
?#include <
linux/delay.h>arch/arm/plat-spear/include/plat/fsmc.h +3
-0+#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/mtd/physmap.h> ?#include <
linux/types.h>
?#include <asm/param.h>+#define
FSMC_MAX_NOR_BANKS? ? 4
?#defineFSMC_MAX_NAND_BANKS? ?4arch/arm/plat-spear/include/plat/fsmc.h +21
-0+#define FSMC_FLASH_WIDTH8 ? ? ?1 +#define FSMC_FLASH_WIDTH16 ? ? 2 + +struct nor_bank_regs { + ? ? ? u32 ctrl; + ? ? ? u32 ctrl_tim; +}; + +/* ctrl register definitions */ +#define BANK_ENABLE ? ? ? ? ? ?(1 << 0) +#define MUXED ? ? ? ? ? ? ? ? ?(1 << 1) +#define NOR_DEV ? ? ? ? ? ? ? ? ? ? ? ?(2 << 2) +#define WIDTH_8 ? ? ? ? ? ? ? ? ? ? ? ?(0 << 4) +#define WIDTH_16 ? ? ? ? ? ? ? (1 << 4) +#define RSTPWRDWN ? ? ? ? ? ? ?(1 << 6) +#define WPROT ? ? ? ? ? ? ? ? ?(1 << 7) +#define WRT_ENABLE ? ? ? ? ? ? (1 << 12) +#define WAIT_ENB ? ? ? ? ? ? ? (1 << 13) + +/* ctrl_tim register definitions */ +?struct
nand_bank_regs{
? ? ? ?u32 pc;
? ? ? ?u32 sts;arch/arm/plat-spear/include/plat/fsmc.h +4
-1@@ -31,8 +56,11 @@ struct nand_bank_regs { ? ? ? ?u32 ecc3; ?}; +#define FSMC_NOR_REG_SIZE ? ? ?0x40 + ?struct fsmc_regs { - ? ? ? u8 reserved_1[0x40]; + ? ? ? struct nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS]; + ? ? ? u8 reserved_1[0x40 - 0x20]; ? ? ? ?struct nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS]; ? ? ? ?u8 reserved_2[0xfe0 - 0xc0];? ? ? ?u32 peripid0; ? ? ? ? ? ? ? ? ? /*
0xfe0*/arch/arm/plat-spear/include/plat/fsmc.h +21
-0@@ -106,4 +134,25 @@ struct fsmc_eccplace { ? ? ? ?struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES]; ?}; +static inline void fsmc_init_plat_data (struct platform_device *pdev, + ? ? ? ? ? ? ? struct mtd_partition *partitions, unsigned int nr_partitions, + ? ? ? ? ? ? ? unsigned int width) +{ + ? ? ? struct physmap_flash_data *fsmc_plat_data; + ? ? ? fsmc_plat_data = dev_get_platdata(&pdev->dev); + + ? ? ? if (partitions) { + ? ? ? ? ? ? ? fsmc_plat_data->parts = partitions; + ? ? ? ? ? ? ? fsmc_plat_data->nr_parts = nr_partitions; + ? ? ? } + + ? ? ? fsmc_plat_data->width = width; +} + +extern int __init fsmc_nor_init (struct platform_device *pdev, + ? ? ? ? ? ? ? unsigned long base, u32 bank, u32 width); +extern void __init fsmc_init_board_info (struct platform_device *pdev, + ? ? ? ? ? ? ? struct mtd_partition *partitions, unsigned int nr_partitions, + ? ? ? ? ? ? ? unsigned int width); +
Quoted 1 line
?#endif /*
__PLAT_FSMC_H*/
Thanks!
Yours,
Linus Walleij
PATCH 45/74 SPEAr : SEV Send event to secondary CPUs
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
The secondary CPUs have been put in a WFE(Wait for Event) state. Using SEV instruction sends an event to all CPUs.
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/smp.h | 6 ++++++ arch/arm/mach-spear13xx/platsmp.c | 5 +++++ 2 files changed, 11 insertions(+), 0 deletions(-)
arch/arm/mach-spear13xx/include/mach/smp.h +6 -0
@@ -24,6 +24,12 @@ cpunum &=0x0F ; \ }) +/* +* set_event() is used to wake up secondary core from wfe using sev. Booting +* code puts the second core into wfe(standby). +*/ +#define set_event () __asm__ __volatile__ ("sev" : : : "memory") +/* We use IRQ1 as the IPI */ static inline void smp_cross_call (const struct cpumask *mask) {
arch/arm/mach-spear13xx/platsmp.c +5 -0
@@ -133,6 +133,11 @@ static void __init poke_milo(void) __io_address(SPEAR13XX_SYS_LOCATION));mb (); + +/* +* Send a 'sev' to wake the secondary core from WFE. +*/ +set_event (); }/*
Signature · 1 line
1.7.2.2
PATCH 45/74 SPEAr : SEV Send event to secondary CPUs
arch/arm/mach-spear13xx/include/mach/smp.h line 31
Quoted 13 lines · Viresh KUMAR
arch/arm/mach-spear13xx/include/mach/smp.h +5
-0@@ -24,6 +24,12 @@ cpunum &=0x0F ; \ }) +/* +* set_event() is used to wake up secondary core from wfe using sev. Booting +* code puts the second core into wfe(standby). +*/ +#define set_event () __asm__ __volatile__ ("sev" : : : "memory")
This shouldn't be something that platforms define on their own. Please add a sev() macro to arch/arm/include/asm/system.h instead. Also take a look at arch/arm/mach-omap2/omap-smp.c for an alternative idea about how to handle this.
Lastly, consider rolling the OMAP solution into the patch which adds SMP support for spear13xx.
PATCH 45/74 SPEAr : SEV Send event to secondary CPUs
Hi Russell,
[added Jeff Ohlstein]
Quoted 9 lines · Viresh KUMAR
Quoted 8 lines
arch/arm/mach-spear13xx/include/mach/smp.h +0
-0@@ -24,6 +24,12 @@ cpunum &=0x0F ; \ })
Quoted 10 lines
arch/arm/mach-spear13xx/include/mach/smp.h line 31
Quoted 5 lines
arch/arm/mach-spear13xx/include/mach/smp.h +5
-0+/* +* set_event() is used to wake up secondary core from wfe using sev. Booting +* code puts the second core into wfe(standby). +*/ +#define set_event () __asm__ __volatile__ ("sev" : : : "memory")This shouldn't be something that platforms define on their own. Please add a
sev()macro toarch/arm/include/asm/system.hinstead. Also take a look atarch/arm/mach-omap2/omap-smp.cfor an alternative idea about how to handle this.
There was patch posted last month from Code Aurora:
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-July/021401.html
which proposed adding a sev() macro to processor.h. They also added a wfe() macro, so maybe all of this should go in system.h instead.
Will
PATCH 45/74 SPEAr : SEV Send event to secondary CPUs
Quoted 37 lines
-----Original Message-----
From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm- kernel-bounces at lists.infradead.org] On Behalf Of Will Deacon
Sent: Thursday, September 02, 2010 4:10 PM
To: 'Russell King - ARM Linux'; Viresh KUMAR
Cc: pratyush.anand at st.com; vipulkumar.samar at st.com; bhupesh.sharma at st.com; armando.visconti at st.com; Vipin Kumar; shiraz.hashim at st.com; rajeev- dlh.kumar at st.com; johlstei at codeaurora.org; deepak.sikri at st.com; linux-arm- kernel at lists.infradead.org
Subject: RE: [PATCH 45/74] SPEAr : SEV Send event to secondary CPUsHi Russell,
[added Jeff Ohlstein]
Quoted 2 lines · Viresh KUMAR
Review
Quoted 1 line
(quoted diff) +0
-0
b/arch/arm/mach-spear13xx/include/mach/smp.hQuoted 9 lines
arch/arm/mach-spear13xx/include/mach/smp.h line 28
Quoted 9 lines
index 6e028a1..e2e55fc 100644
arch/arm/mach-spear13xx/include/mach/smp.h +2
-0@@ -24,6 +24,12 @@ cpunum &=0x0F ; \ }) +/* +* set_event() is used to wake up secondary core from wfe using sev. Booting
Quoted 8 lines
arch/arm/mach-spear13xx/include/mach/smp.h line 31
Quoted 3 lines
arch/arm/mach-spear13xx/include/mach/smp.h +3
-0+* code puts the second core into wfe(standby). +*/ +#define set_event () __asm__ __volatile__ ("sev" : : : "memory")This shouldn't be something that platforms define on their own. Please add a
sev()macro toarch/arm/include/asm/system.hinstead. Also take a look atarch/arm/mach-omap2/omap-smp.cfor an alternative idea about how to handle this.
Quoted 8 lines
There was patch posted last month from Code Aurora:
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-
July/021401.htmlwhich proposed adding a
sev()macro toprocessor.h. They also added awfe()macro, so maybe all of this should go insystem.hinstead.
May be we should have barrier version of these
There is one already exist in mainline already in spin lock code "dsb_sev(void)"
PATCH 45/74 SPEAr : SEV Send event to secondary CPUs
Quoted 3 lines · Santosh
May be we should have barrier version of these
There is one already exist in mainline already in spin lock code "dsb_sev(void)"
I don't think so - they're not a general purpose event passing mechanism. Their use is fairly well limited to two situations:
1. spin locks, where we already have dsb_sev as we care about ordering.
2. smp secondary cpu bring-up code, where we care a little less about the ordering.
I think coupling a barrier with these will just make people want to have a version without the barrier. At least if we don't provide the barrier, people have the option of using mb() before sev() if they desire ordering.
PATCH 45/74 SPEAr : SEV Send event to secondary CPUs
In reply to Will DeaconQuoted 6 lines · Will Deacon
There was patch posted last month from Code Aurora:
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-July/021401.html
which proposed adding a
sev()macro toprocessor.h. They also added awfe()macro, so maybe all of this should go insystem.hinstead.
I think so, and system.h seems to be a better place for it.
PATCH 45/74 SPEAr : SEV Send event to secondary CPUs
In reply to Russell King - ARM LinuxHello Russell,
Quoted 9 lines · Russell King - ARM Linux
Quoted 8 lines · Viresh KUMAR
arch/arm/mach-spear13xx/include/mach/smp.h +0
-0@@ -24,6 +24,12 @@ cpunum &=0x0F ; \ })
Quoted 10 lines
arch/arm/mach-spear13xx/include/mach/smp.h line 31
Quoted 5 lines
arch/arm/mach-spear13xx/include/mach/smp.h +5
-0+/* +* set_event() is used to wake up secondary core from wfe using sev. Booting +* code puts the second core into wfe(standby). +*/ +#define set_event () __asm__ __volatile__ ("sev" : : : "memory")This shouldn't be something that platforms define on their own. Please add a
sev()macro toarch/arm/include/asm/system.hinstead. Also take a look atarch/arm/mach-omap2/omap-smp.cfor an alternative idea about how to handle this.
OK.
Quoted 2 lines
Lastly, consider rolling the OMAP solution into the patch which adds SMP support for spear13xx.
OK. I would merge it.
regards
Shiraz
PATCH 46/74 SPEAr Clock Framework: Adding support for PLL frequency change
In reply to Viresh KUMARFrom: Deepak Sikri <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/spear3xx.c | 5 + arch/arm/mach-spear6xx/spear6xx.c | 5 + arch/arm/plat-spear/Makefile | 2 +- arch/arm/plat-spear/clock.c | 6 +- arch/arm/plat-spear/include/plat/clock.h | 1 + arch/arm/plat-spear/pll_clk.S | 187 ++++++++++++++++++++++++++++++ 6 files changed, 201 insertions(+), 5 deletions(-) create mode 100644 arch/arm/plat-spear/pll_clk.S
arch/arm/mach-spear3xx/spear3xx.c +5 -0
@@ -271,6 +271,11 @@ struct map_desc spear3xx_io_desc[] __initdata = { .pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE), .length = SZ_4K, .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(SPEAR3XX_ICM3_SDRAM_CTRL_BASE), + .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SDRAM_CTRL_BASE), + .length = SZ_4K, + .type = MT_DEVICE }, };
arch/arm/mach-spear6xx/spear6xx.c +5 -0
@@ -430,6 +430,11 @@ static struct map_desc spear6xx_io_desc[] __initdata = { .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE), .length = SZ_4K, .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(SPEAR6XX_ICM3_SDRAM_CTRL_BASE), + .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SDRAM_CTRL_BASE), + .length = SZ_4K, + .type = MT_DEVICE }, };
arch/arm/plat-spear/Makefile +1 -1
@@ -3,7 +3,7 @@ # # Common support -obj-y := clcd.o clock.o time.o smi.o +obj-y := clcd.o clock.o pll_clk.o smi.o time.o obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o obj-$(CONFIG_MACH_SPEAR310) += plgpio.o
arch/arm/plat-spear/clock.c +2 -4
@@ -586,11 +586,10 @@ int pll_clk_set_rate(struct clk *clk, unsigned long desired_rate)* call routine to put ddr in refresh mode, and * configure pll. */ -/* TBD */ +pll_set_rate (tbls[i].m, tbls[i].p, tbls[i].n); clk->rate = rate; } - -return ret; +return 0 ; } val = readl(config->mode_reg) &
@@ -616,7 +615,6 @@ int pll_clk_set_rate(struct clk *clk, unsigned long desired_rate) config->masks->norm_fdbk_m_shift;writel (val, config->cfg_reg); - clk->rate = rate;return 0 ;
arch/arm/plat-spear/include/plat/clock.h +1 -0
@@ -264,5 +264,6 @@ int aux_clk_set_rate(struct clk *clk, unsigned long desired_rate);unsigned long clcd_calc_rate (struct clk *clk,int index);int clcd_clk_recalc (struct clk *clk,unsigned long *rate,unsigned long prate);int clcd_clk_set_rate (struct clk *clk,unsigned long desired_rate); +void pll_set_rate (u16 pdiv,u8 nmul,u8 hclkdiv);#endif /* __PLAT_CLOCK_H */
arch/arm/plat-spear/pll_clk.S new file +187 -0
187 lines not on this page · raw message
Signature · 1 line
1.7.2.2
PATCH 47/74 SPEAr Power Management: Added the support for Standby mode.
In reply to Viresh KUMARFrom: Deepak Sikri <[email protected]>
OPEN POINTS: 1. Suspend to RAM support needs to be added.
2. The basic framework added for S2R.
3. SPEAr13xx: The power domains need to be added.
4. Extensive testing needs to be done.
5. For SPEAr13xx: PLL-4 has not been switch off while moving into sleep. There is some problem in getting the pll back to on.
6. Not functional on SPEAr6XX
Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/Makefile | 1 + arch/arm/mach-spear13xx/include/mach/suspend.h | 47 +++ arch/arm/mach-spear13xx/pm.c | 107 ++++++ arch/arm/mach-spear13xx/sleep.S | 435 ++++++++++++++++++++++++ arch/arm/mach-spear13xx/spear13xx.c | 5 + arch/arm/mach-spear3xx/include/mach/suspend.h | 44 +++ arch/arm/mach-spear3xx/spear3xx.c | 5 +- arch/arm/mach-spear6xx/include/mach/suspend.h | 44 +++ arch/arm/mach-spear6xx/spear6xx.c | 9 +- arch/arm/plat-spear/Makefile | 6 + arch/arm/plat-spear/pm.c | 104 ++++++ arch/arm/plat-spear/sleep.S | 288 ++++++++++++++++ 12 files changed, 1093 insertions(+), 2 deletions(-) create mode 100644 arch/arm/mach-spear13xx/include/mach/suspend.h create mode 100644 arch/arm/mach-spear13xx/pm.c create mode 100644 arch/arm/mach-spear13xx/sleep.S create mode 100644 arch/arm/mach-spear3xx/include/mach/suspend.h create mode 100644 arch/arm/mach-spear6xx/include/mach/suspend.h create mode 100644 arch/arm/plat-spear/pm.c create mode 100644 arch/arm/plat-spear/sleep.S
arch/arm/mach-spear13xx/Makefile +1 -0
@@ -17,3 +17,4 @@ obj-$(CONFIG_BOARD_SPEAR1300_EVB) += spear1300_evb.o obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o # spear1310 boards files obj-$(CONFIG_BOARD_SPEAR1310_EVB) += spear1310_evb.o +obj-$(CONFIG_PM) += pm.o sleep.o
arch/arm/mach-spear13xx/include/mach/suspend.h new file +47 -0
47 lines not on this page · raw message
arch/arm/mach-spear13xx/pm.c new file +107 -0
107 lines not on this page · raw message
arch/arm/mach-spear13xx/sleep.S new file +435 -0
435 lines not on this page · raw message
arch/arm/mach-spear13xx/spear13xx.c +5 -0
@@ -454,6 +454,11 @@ struct map_desc spear13xx_io_desc[] __initdata = { .pfn = __phys_to_pfn(SPEAR13XX_SYSRAM0_BASE), .length = SZ_32K, .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(SPEAR13XX_SYSRAM1_BASE), + .pfn = __phys_to_pfn(SPEAR13XX_SYSRAM1_BASE), + .length = SZ_1M, + .type = MT_MEMORY_NONCACHED }, };
arch/arm/mach-spear3xx/include/mach/suspend.h new file +44 -0
44 lines not on this page · raw message
arch/arm/mach-spear3xx/spear3xx.c +4 -1
@@ -22,6 +22,8 @@#include <mach/generic.h> #include <mach/spear.h> +#define SPEAR3XX_WKUP_SRCS (1 << IRQ_MAC_1 | 1 << IRQ_USB_DEV | \ + 1 << IRQ_BASIC_RTC | 1 << IRQ_BASIC_GPIO)/* Add spear3xx machines common devices here */ /* gpio device registeration */ static struct pl061_platform_data gpio_plat_data = {
@@ -246,7 +248,8 @@ void __init spear3xx_init(void)/* This will initialize vic */ void __init spear3xx_init_irq (void ) { -vic_init ((void __iomem *)VA_SPEAR3XX_ML1_VIC_BASE ,0 , ~0 ,0 ); +vic_init ((void __iomem *)VA_SPEAR3XX_ML1_VIC_BASE ,0 , ~0 , +SPEAR3XX_WKUP_SRCS ); }/* Following will create static virtual/physical mappings */
arch/arm/mach-spear6xx/include/mach/suspend.h new file +44 -0
44 lines not on this page · raw message
arch/arm/mach-spear6xx/spear6xx.c +8 -1
@@ -24,6 +24,12 @@#include <mach/spear.h> #include <plat/nand.h> +/* The wake sources are routed through vic-2 */ +#define SPEAR6XX_WKUP_SRCS_VIC2 (1 << (IRQ_GMAC_1 - 32) | \ + 1 << (IRQ_USB_DEV - 32) | \ + 1 << (IRQ_BASIC_RTC - 32) |\ + 1 << (IRQ_BASIC_GPIO - 32)) +/* Add spear6xx machines common devices here */ /* CLCD device registration */
@@ -400,7 +406,8 @@ void __init spear6xx_init(void)void __init spear6xx_init_irq (void ) {vic_init ((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE ,0 , ~0 ,0 ); -vic_init ((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE ,32 , ~0 ,0 ); +vic_init ((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE ,32 , ~0 , +SPEAR6XX_WKUP_SRCS_VIC2 ); }/* Following will create static virtual/physical mappings */
arch/arm/plat-spear/Makefile +6 -0
@@ -6,6 +6,7 @@ obj-y := clcd.o clock.o pll_clk.o smi.o time.o obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o + obj-$(CONFIG_MACH_SPEAR310) += plgpio.o obj-$(CONFIG_MACH_SPEAR320) += plgpio.o obj-$(CONFIG_SPEAR_PWM) += pwm.o
@@ -16,3 +17,8 @@ obj-$(CONFIG_BOARD_SPEAR300_EVB) += i2c_eval_board.o obj-$(CONFIG_BOARD_SPEAR310_EVB) += i2c_eval_board.o obj-$(CONFIG_BOARD_SPEAR320_EVB) += i2c_eval_board.o obj-$(CONFIG_BOARD_SPEAR600_EVB) += i2c_eval_board.o + +ifeq ($(CONFIG_PM),y) +obj-$(CONFIG_ARCH_SPEAR3XX) += pm.o sleep.o +obj-$(CONFIG_ARCH_SPEAR6XX) += pm.o sleep.o +endif
arch/arm/plat-spear/pm.c new file +104 -0
104 lines not on this page · raw message
arch/arm/plat-spear/sleep.S new file +288 -0
288 lines not on this page · raw message
Signature · 1 line
1.7.2.2
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
In reply to Viresh KUMARFrom: Deepak Sikri <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/common/gic.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-)
arch/arm/common/gic.c +13 -0
@@ -201,6 +201,18 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) chip->unmask (irq); } +#ifdef CONFIG_PM + +static int gic_set_wake (unsigned int irq,unsigned int on) +{ +return 0 ; +} + +#else + +#define gic_set_wake NULL +#endif +static struct irq_chip gic_chip = { .name ="GIC" , .ack = gic_ack_irq,
@@ -210,6 +222,7 @@ static struct irq_chip gic_chip = {#ifdef CONFIG_SMP .set_affinity = gic_set_cpu, #endif + .set_wake = gic_set_wake, };void __init gic_cascade_irq (unsigned int gic_nr,unsigned int irq)
Signature · 1 line
1.7.2.2
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 2 lines · Viresh KUMAR
From: Deepak Sikri <[email protected]>
The reason being?
Quoted 45 lines
Signed-off-by Deepak Sikri <[email protected]>Signed-off-by Viresh Kumar <[email protected]>--- arch/arm/common/gic.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-)arch/arm/common/gic.c +13
-0@@ -201,6 +201,18 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) chip->unmask (irq); } +#ifdef CONFIG_PM + +static int gic_set_wake (unsigned int irq,unsigned int on) +{ +return 0 ; +} + +#else + +#define gic_set_wake NULL +#endif +static struct irq_chip gic_chip = { .name ="GIC" , .ack = gic_ack_irq,@@ -210,6 +222,7 @@ static struct irq_chip gic_chip = {#ifdef CONFIG_SMP .set_affinity = gic_set_cpu, #endif + .set_wake = gic_set_wake, };void __init gic_cascade_irq (unsigned int gic_nr,unsigned int irq)Signature · 7 lines
1.7.2.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 8 lines · Russell King - ARM Linux
Quoted 3 lines · Viresh KUMAR
From: Deepak Sikri <[email protected]>
The reason being?
For configuring the wake up sources ( normally in the PM framework for suspend resume operations), you need to use the following set of api enable_irq_wake(). This handler has a appropriate callback for the vic, similar to the plugin that we have added in for gic which does enable the wake interrupt sources only. But since gic handler did not had this call back associated was always returning -ENXIO, which was breaking the existing drivers. In case no checks are provided for the return value of enable_irq_wake(), the things were fine.
Quoted 49 lines
Quoted 46 lines
Signed-off-by Deepak Sikri <[email protected]>Signed-off-by Viresh Kumar <[email protected]>--- arch/arm/common/gic.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-)arch/arm/common/gic.c +13
-0@@ -201,6 +201,18 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) chip->unmask (irq); } +#ifdef CONFIG_PM + +static int gic_set_wake (unsigned int irq,unsigned int on) +{ +return 0 ; +} + +#else + +#define gic_set_wake NULL +#endif +static struct irq_chip gic_chip = { .name ="GIC" , .ack = gic_ack_irq,@@ -210,6 +222,7 @@ static struct irq_chip gic_chip = {#ifdef CONFIG_SMP .set_affinity = gic_set_cpu, #endif + .set_wake = gic_set_wake, };void __init gic_cascade_irq (unsigned int gic_nr,unsigned int irq)Signature · 7 lines
1.7.2.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel.
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 10 lines · deepaksi
Quoted 8 lines · Russell King - ARM Linux
Quoted 3 lines · Viresh KUMAR
From: Deepak Sikri <[email protected]>
The reason being?
Quoted 8 lines
For configuring the wake up sources ( normally in the PM framework for suspend resume operations), you need to use the following set of api
enable_irq_wake(). This handler has a appropriate callback for the vic, similar to the plugin that we have added in for gic which does enable the wake interrupt sources only. But since gic handler did not had this call back associated was always returning-ENXIO, which was breaking the existing drivers. In case no checks are provided for the return value ofenable_irq_wake(), the things were fine.
So how are wakeup sources configured if this callback does nothing?
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 24 lines · Russell King - ARM Linux
Quoted 13 lines · deepaksi
Quoted 11 lines · Russell King - ARM Linux
Quoted 4 lines · Viresh KUMAR
From: Deepak Sikri <[email protected]>
The reason being?
Quoted 9 lines
For configuring the wake up sources ( normally in the PM framework for suspend resume operations), you need to use the following set of api
enable_irq_wake(). This handler has a appropriate callback for the vic, similar to the plugin that we have added in for gic which does enable the wake interrupt sources only. But since gic handler did not had this call back associated was always returning-ENXIO, which was breaking the existing drivers. In case no checks are provided for the return value ofenable_irq_wake(), the things were fine.
Quoted 4 lines
So how are wakeup sources configured if this callback does nothing? .
In most of the architectures that I could refer across(including SPEAr family -SPEAr13xx),
have a separate power management unit(PMU) which is required to be configured to define the wake
up sources. The PMU takes care of waking up the system from sleep, as and when the wake up
interrupts are triggered. This routing is independent of GIC, and hence the handling was not added.
Contrary to that, in some of our hardware architecture using VIC (including SPEAr 3xx/6xx), there
was no explicit PMU, and the wake up trigger was exclusively done through VIC, and hence the VIC
call backs had the necessary implementation.
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 13 lines · deepaksi
Quoted 2 lines · Russell King - ARM Linux
So how are wakeup sources configured if this callback does nothing? .
In most of the architectures that I could refer across(including SPEAr family -SPEAr13xx),
have a separate power management unit(PMU) which is required to be configured to define the wake
up sources. The PMU takes care of waking up the system from sleep, as and when the wake up
interrupts are triggered. This routing is independent of GIC, and hence the handling was not added.
Quoted 5 lines
Contrary to that, in some of our hardware architecture using VIC (including SPEAr 3xx/6xx), there
was no explicit PMU, and the wake up trigger was exclusively done through VIC, and hence the VIC
call backs had the necessary implementation.
What I read into this is that you're using enable_irq_wake() in your drivers _and_ another mechanism to configure what wakes up the system via the PMU - maybe with drivers explicitly calling out to the PMU to achieve this?
This sounds a little haphazard, especially from the drivers point of view. Surely there's a more sensible solution to this rather than adding do-nothing irq_wake support?
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 22 lines · Russell King - ARM Linux
Quoted 14 lines · deepaksi
Quoted 3 lines · Russell King - ARM Linux
So how are wakeup sources configured if this callback does nothing? .
In most of the architectures that I could refer across(including SPEAr family -SPEAr13xx),
have a separate power management unit(PMU) which is required to be configured to define the wake
up sources. The PMU takes care of waking up the system from sleep, as and when the wake up
interrupts are triggered. This routing is independent of GIC, and hence the handling was not added.Quoted 6 lines
Contrary to that, in some of our hardware architecture using VIC (including SPEAr 3xx/6xx), there
was no explicit PMU, and the wake up trigger was exclusively done through VIC, and hence the VIC
call backs had the necessary implementation.
Quoted 5 lines
What I read into this is that you're using
enable_irq_wake()in your drivers _and_ another mechanism to configure what wakes up the system via the PMU - maybe with drivers explicitly calling out to the PMU to achieve this?
This is even true for the drivers already in the kernel for example stmmac driver ( using synopsis GMAC core): drivers/net/stmmac/ if we don not check for the return type, then probably it makes sense to remove the dunny handlers, else another alternative could be to modify the enable_irq_wake() call, to return the proper values.
Changing the driver specific to SPEAr is fine, but SPEAr platform does uses the existing drivers in the kernel.
Quoted 6 lines
This sounds a little haphazard, especially from the drivers point of view. Surely there's a more sensible solution to this rather than adding do-nothing
irq_wakesupport?
.
How do you recommend to go about this ?
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Hi Russell,
Quoted 45 lines · deepaksi
Quoted 26 lines · Russell King - ARM Linux
Quoted 16 lines · deepaksi
Quoted 4 lines · Russell King - ARM Linux
So how are wakeup sources configured if this callback does nothing? .
In most of the architectures that I could refer across(including SPEAr family -SPEAr13xx),
have a separate power management unit(PMU) which is required to be configured to define the wake
up sources. The PMU takes care of waking up the system from sleep, as and when the wake up
interrupts are triggered. This routing is independent of GIC, and hence the handling was not added.Quoted 7 lines
Contrary to that, in some of our hardware architecture using VIC (including SPEAr 3xx/6xx), there
was no explicit PMU, and the wake up trigger was exclusively done through VIC, and hence the VIC
call backs had the necessary implementation.Quoted 6 lines
What I read into this is that you're using
enable_irq_wake()in your drivers _and_ another mechanism to configure what wakes up the system via the PMU - maybe with drivers explicitly calling out to the PMU to achieve this?This is even true for the drivers already in the kernel for example stmmac driver ( using synopsis GMAC core):
drivers/net/stmmac/if we don not check for the return type, then probably it makes sense to remove the dunny handlers, else another alternative could be to modify theenable_irq_wake()call, to return the proper values.Changing the driver specific to SPEAr is fine, but SPEAr platform does uses the existing drivers in the kernel.
Quoted 10 lines
Quoted 7 lines
This sounds a little haphazard, especially from the drivers point of view. Surely there's a more sensible solution to this rather than adding do-nothing
irq_wakesupport?
.How do you recommend to go about this ?
I request you to provide some more inputs on this, so that we can close the issue.
Rgds
Deepak
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 2 lines · deepaksi
I request you to provide some more inputs on this, so that we can close the issue.
I don't know, especially so without seeing the drivers.
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 5 lines · Russell King - ARM Linux
Quoted 2 lines · deepaksi
I request you to provide some more inputs on this, so that we can close the issue.
I don't know, especially so without seeing the drivers.
Assuming there is no powergating of the GIC, then this patch should be sufficient depending on one question. Whose responsibility is it to disable non-wakeup irqs: the interrupt controller code or each driver? If drivers are not trusted to disable their interrupt, then GIC suspend/resume functions are needed to disable/re-enable non-wakeup irqs.
With powergating of the GIC, saving and restoring of the GIC state in addition to external handling of wake-up would be needed.
Rob
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 9 lines · Rob Herring
Quoted 5 lines · Russell King - ARM Linux
Quoted 2 lines · deepaksi
I request you to provide some more inputs on this, so that we can close the issue.
I don't know, especially so without seeing the drivers.
Assuming there is no powergating of the GIC, then this patch should be sufficient depending on one question.
The GIC provides no wakeup capabilities. Providing a dummy 'set_wake' function means that driver authors will expect a successful enable_irq_wake() to work - when it results in precisely nothing being done.
With the situation described, what I envisage is drivers doing something like:
err = enable_irq_wake(irq);
if (err == 0) {
/* everything is fine, don't need to do anything else */
} else if (err == -ENXIO) {
/* IRQ controller doesn't support wakeups, try something else */
} else {
/* an error occurred trying to enable wakeups */
}If we go around adding dummy set_irq_wake functions to IRQ controllers which don't support wakeup, then there's no way for drivers to know this, and there is no method (other than by #ifdeffery) for them to sort out this mess.
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Russell,
Quoted 8 lines · Russell King - ARM Linux
Quoted 7 lines · Rob Herring
Quoted 5 lines · Russell King - ARM Linux
Quoted 2 lines · deepaksi
I request you to provide some more inputs on this, so that we can close the issue.
I don't know, especially so without seeing the drivers.
Quoted 7 lines
Quoted 2 lines
Assuming there is no powergating of the GIC, then this patch should be sufficient depending on one question.
The GIC provides no wakeup capabilities. Providing a dummy '
set_wake' function means that driver authors will expect a successfulenable_irq_wake()to work - when it results in precisely nothing being done.
There is no programming distinction between an irq and an wakeup if the GIC is powered on in suspend which is platform dependent. It is only a s/w distinction of what interrupts you allow to wake you up. If GIC remains powered, then it can assert nirq to the core and wake-up. If the core is powered down, the external power controller can monitor the NIRQ line to wake-up the core. So the powergating of the core has no impact on the prvgramming of the GIC for wake-up.
Quoted 13 lines
With the situation described, what I envisage is drivers doing something like:
err = enable_irq_wake(irq); if (err == 0) { /* everything is fine, don't need to do anything else */ } else if (err == -ENXIO) { /* IRQ controller doesn't support wakeups, try something else */ } else { /* an error occurred trying to enable wakeups */ }
Quoted 4 lines
If we go around adding dummy
set_irq_wakefunctions to IRQ controllers which don't support wakeup, then there's no way for drivers to know this, and there is no method (other than by #ifdeffery) for them to sort out this mess.
How about adding a set_wake function ptr as a parameter to gic_dist_init? If a platform needs more than the basic operation, they can override it.
It doesn't make sense to push the platform dependent behavior of an interrupt controller into the drivers. enable_irq_wake is the defined way to enable wakeup. Why suggest drivers implement a custom interface for that? That will introduce ifdeffery in common drivers like ARM Primecell blocks.
Rob
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 7 lines · Rob Herring
There is no programming distinction between an irq and an wakeup if the GIC is powered on in suspend which is platform dependent. It is only a s/w distinction of what interrupts you allow to wake you up. If GIC remains powered, then it can assert nirq to the core and wake-up. If the core is powered down, the external power controller can monitor the NIRQ line to wake-up the core. So the powergating of the core has no impact on the prvgramming of the GIC for wake-up.
Well, not everyone does this - and I know of no platforms where it has been reported for the GIC to be able to wake the system up. TI OMAP doesn't allow it, neither does the one being discussed in this thread.
The system being discussed here has an external power controller which needs to be appropriately programmed.
You can see this because the proposed patch doesn't add code like that in vic.c, but adds a no-operation function so that set_wake() becomes a no-op returning zero.
Quoted 3 lines
How about adding a
set_wakefunction ptr as a parameter togic_dist_init? If a platform needs more than the basic operation, they can override it.
As I can see, we're not talking about wake-up being able to be done from the IRQ controller here, but something entirely external and unrelated to it.
PATCH 48/74 GIC: Added dummy handlers for Power Management Suspend Resume
Quoted 20 lines · Russell King - ARM Linux
Quoted 7 lines · Rob Herring
There is no programming distinction between an irq and an wakeup if the GIC is powered on in suspend which is platform dependent. It is only a s/w distinction of what interrupts you allow to wake you up. If GIC remains powered, then it can assert nirq to the core and wake-up. If the core is powered down, the external power controller can monitor the NIRQ line to wake-up the core. So the powergating of the core has no impact on the prvgramming of the GIC for wake-up.
Well, not everyone does this - and I know of no platforms where it has been reported for the GIC to be able to wake the system up. TI OMAP doesn't allow it, neither does the one being discussed in this thread.
The system being discussed here has an external power controller which needs to be appropriately programmed.
You can see this because the proposed patch doesn't add code like that in
vic.c, but adds a no-operation function so thatset_wake()becomes a no-op returning zero.
Quoted 9 lines
Quoted 3 lines
How about adding a
set_wakefunction ptr as a parameter togic_dist_init? If a platform needs more than the basic operation, they can override it.As I can see, we're not talking about wake-up being able to be done from the IRQ controller here, but something entirely external and unrelated to it.
.
Russell,
Should i keep this patch in "SPEAr Support patch series version 2"?
viresh.
PATCH 49/74 SPEAr CPU freq: Adding support for CPU Freq framework
In reply to Viresh KUMARFrom: Deepak Sikri <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/Kconfig | 2 + arch/arm/mach-spear13xx/clock.c | 1 + arch/arm/mach-spear3xx/clock.c | 1 + arch/arm/mach-spear6xx/clock.c | 1 + arch/arm/plat-spear/Makefile | 2 +- arch/arm/plat-spear/cpufreq.c | 160 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 166 insertions(+), 1 deletions(-) create mode 100644 arch/arm/plat-spear/cpufreq.c
arch/arm/Kconfig +2 -0
@@ -822,6 +822,8 @@ config PLAT_SPEAR select COMMON_CLKDEV select GENERIC_CLOCKEVENTS select HAVE_CLK + select ARCH_HAS_CPUFREQ + help Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
arch/arm/mach-spear13xx/clock.c +1 -0
@@ -90,6 +90,7 @@ static struct pll_clk_config pll1_config = {/* pll rate configuration table, in ascending order of rates */ struct pll_rate_tbl pll_rtbl[] = {/* PCLK 24MHz */ + {.mode =0 , .m =0x64 , .n =0x03 , .p =0x2 },/* 400 MHz */ {.mode =0 , .m =0x7D , .n =0x03 , .p =0x2 },/* 500 MHz */ {.mode =0 , .m =0xA6 , .n =0x03 , .p =0x2 },/* 664 MHz */ {.mode =0 , .m =0xC8 , .n =0x03 , .p =0x2 },/* 800 MHz */
arch/arm/mach-spear3xx/clock.c +1 -0
@@ -55,6 +55,7 @@ static struct pll_clk_masks pll_masks = {/* pll rate configuration table, in ascending order of rates */ struct pll_rate_tbl pll_rtbl[] = { + {.mode =0 , .m =0x53 , .n =0x0C , .p =0x1 },/* 166 MHz */ {.mode =0 , .m =0x85 , .n =0x0C , .p =0x1 },/* 266 MHz */ {.mode =0 , .m =0xA6 , .n =0x0C , .p =0x1 },/* 332 MHz */ };
arch/arm/mach-spear6xx/clock.c +1 -0
@@ -55,6 +55,7 @@ static struct pll_clk_masks pll_masks = {/* pll rate configuration table, in ascending order of rates */ struct pll_rate_tbl pll_rtbl[] = { + {.mode =0 , .m =0x53 , .n =0x0C , .p =0x1 },/* 166 MHz */ {.mode =0 , .m =0x85 , .n =0x0C , .p =0x1 },/* 266 MHz */ {.mode =0 , .m =0xA6 , .n =0x0C , .p =0x1 },/* 332 MHz */ };
arch/arm/plat-spear/Makefile +1 -1
@@ -6,7 +6,7 @@ obj-y := clcd.o clock.o pll_clk.o smi.o time.o obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o - +obj-$(CONFIG_CPU_FREQ) += cpufreq.o obj-$(CONFIG_MACH_SPEAR310) += plgpio.o obj-$(CONFIG_MACH_SPEAR320) += plgpio.o obj-$(CONFIG_SPEAR_PWM) += pwm.o
arch/arm/plat-spear/cpufreq.c new file +160 -0
160 lines not on this page · raw message
Signature · 1 line
1.7.2.2
PATCH 49/74 SPEAr CPU freq: Adding support for CPU Freq framework
arch/arm/Kconfig config PLAT_SPEAR · line 826
Quoted 10 lines · Viresh KUMAR
arch/arm/Kconfig +2
-0@@ -822,6 +822,8 @@ config PLAT_SPEAR select COMMON_CLKDEV select GENERIC_CLOCKEVENTS select HAVE_CLK + select ARCH_HAS_CPUFREQ +
You should avoid this blank line.
Quoted 2 lines
arch/arm/Kconfig +0
-0help Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
PATCH 49/74 SPEAr CPU freq: Adding support for CPU Freq framework
Quoted 15 lines · Russell King - ARM Linux
arch/arm/Kconfig config PLAT_SPEAR · line 827
Quoted 11 lines · Viresh KUMAR
arch/arm/Kconfig +2
-0@@ -822,6 +822,8 @@ config PLAT_SPEAR select COMMON_CLKDEV select GENERIC_CLOCKEVENTS select HAVE_CLK + select ARCH_HAS_CPUFREQ +You should avoid this blank line.
Ok..
Quoted 6 lines
arch/arm/Kconfig config PLAT_SPEAR · line 828
Quoted 3 lines
arch/arm/Kconfig +0
-0help Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx)..
PATCH 50/74 ST SPEAr: PCIE gadget suppport
In reply to Viresh KUMARFrom: Pratyush Anand <[email protected]>
This is a configurable gadget. can be configured by sysfs interface. Any IP available at PCIE bus can be programmed to be used by host controller.It supoorts both INTX and MSI.
By default, gadget is configured for INTX and SYSRAM1 is mapped to BAR0 with size 0x1000
Signed-off-by Pratyush Anand <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/generic.h | 3 + arch/arm/mach-spear13xx/include/mach/spear.h | 2 +- arch/arm/mach-spear13xx/spear1300_evb.c | 1 + arch/arm/mach-spear13xx/spear13xx.c | 94 +++ drivers/misc/Kconfig | 10 + drivers/misc/Makefile | 1 + drivers/misc/spear13xx_pcie_gadget.c | 888 ++++++++++++++++++++++++ 7 files changed, 998 insertions(+), 1 deletions(-) create mode 100644 drivers/misc/spear13xx_pcie_gadget.c
arch/arm/mach-spear13xx/include/mach/generic.h +3 -0
@@ -44,6 +44,9 @@ extern struct platform_device ohci1_device;extern struct platform_device rtc_device;extern struct platform_device sdhci_device;extern struct platform_device smi_device; +extern struct platform_device pcie_gadget0_device; +extern struct platform_device pcie_gadget1_device; +extern struct platform_device pcie_gadget2_device;extern struct sys_timer spear13xx_timer;/* Add spear13xx family function declarations here */
arch/arm/mach-spear13xx/include/mach/spear.h +1 -1
@@ -60,7 +60,7 @@#define SPEAR13XX_SYS_LOCATION (SPEAR13XX_SYSRAM0_BASE + 0x600)#define SPEAR13XX_SYSRAM1_BASE UL(0xE0800000) -#define SPEAR13XX_SYSRAM1_SIZE 0x00800000 +#define SPEAR13XX_SYSRAM1_SIZE 0x00001000#define SPEAR13XX_CLCD_BASE UL(0xE1000000)#define SPEAR13XX_C3_BASE UL(0xE1800000)#define SPEAR13XX_GETH_BASE UL(0xE2000000)
arch/arm/mach-spear13xx/spear1300_evb.c +1 -0
@@ -54,6 +54,7 @@ static struct platform_device *plat_devs[] __initdata = { &rtc_device, &sdhci_device, &smi_device, + &pcie_gadget0_device, };/* keyboard specific platform data */
arch/arm/mach-spear13xx/spear13xx.c +94 -0
100 lines not on this page · raw message
drivers/misc/Kconfig +10 -0
@@ -344,6 +344,16 @@ config DS1682 This driver can also be built as a module. If so, the module will be called ds1682. +config SPEAR13XX_PCIE_GADGET + bool "PCIE gadget support for SPEAr13XX platform" + depends on ARCH_SPEAR13XX + default n + help + This option enables gadget support for PCIE controller. If + board file defines any controller as PCIE endpoint then a sysfs + entry will be created for that controller. User can use these + sysfs node to configure PCIE EP as per his requirements. + config TI_DAC7512 tristate "Texas Instruments DAC7512" depends on SPI && SYSFS
drivers/misc/Makefile +1 -0
@@ -33,5 +33,6 @@ obj-$(CONFIG_IWMC3200TOP) += iwmc3200top/ obj-$(CONFIG_HMC6352) += hmc6352.o obj-y += eeprom/ obj-y += cb710/ +obj-$(CONFIG_SPEAR13XX_PCIE_GADGET) += spear13xx_pcie_gadget.o obj-$(CONFIG_VMWARE_BALLOON) += vmware_balloon.o obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o
drivers/misc/spear13xx_pcie_gadget.c new file +888 -0
888 lines not on this page · raw message
Signature · 1 line
1.7.2.2
PATCH 51/74 ST SPEAr1310: Adding fsmc nor support
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/spear1310_evb.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-)
arch/arm/mach-spear13xx/spear1310_evb.c +18 -0
@@ -23,9 +23,19 @@#include <mach/pcie.h> #include <plat/keyboard.h> #include <plat/nand.h> +#include <plat/fsmc.h> #include <plat/smi.h> #include <plat/spi.h> +#define PARTITION (n, off, sz) {.name = n, .offset = off, .size = sz} + +static struct mtd_partition partition_info[] = { +PARTITION ("X-loader" ,0 ,1 *0x20000 ), +PARTITION ("U-Boot" ,0x20000 ,3 *0x20000 ), +PARTITION ("Kernel" ,0x80000 ,24 *0x20000 ), +PARTITION ("Root File System" ,0x380000 ,84 *0x20000 ), +}; +static struct amba_device *amba_devs[]__initdata = {/* spear13xx specific devices */ &gpio_device[0 ],
@@ -143,6 +153,10 @@ static void __init spear1310_evb_init(void)/* initialize serial nor related data in smi plat data */ smi_init_board_info (&smi_device); +/* initialize fsmc related data in fsmc plat data */ +fsmc_init_board_info (&fsmc_nor_device, partition_info, +ARRAY_SIZE (partition_info),FSMC_FLASH_WIDTH8 ); +#ifdef CONFIG_PCIEPORTBUS /* Enable PCIE0 clk */ enable_pcie0_clk ();
@@ -155,6 +169,10 @@ static void __init spear1310_evb_init(void)/* Add Amba Devices */ spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs)); +/* Initialize fsmc regiters */ +fsmc_nor_init (&fsmc_nor_device,SPEAR13XX_FSMC_BASE ,0 , +FSMC_FLASH_WIDTH8 ); +spi_init (); }
Signature · 1 line
1.7.2.2
PATCH 52/74 ST SPEAr13xx: Adding CPU hotplug support added for SMP platforms
In reply to Viresh KUMARFrom: Deepak Sikri <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/Makefile | 1 + arch/arm/mach-spear13xx/hotplug.c | 146 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-spear13xx/platsmp.c | 12 +++ 3 files changed, 159 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-spear13xx/hotplug.c
arch/arm/mach-spear13xx/Makefile +1 -0
@@ -18,3 +18,4 @@ obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o # spear1310 boards files obj-$(CONFIG_BOARD_SPEAR1310_EVB) += spear1310_evb.o obj-$(CONFIG_PM) += pm.o sleep.o +obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
arch/arm/mach-spear13xx/hotplug.c new file +146 -0
146 lines not on this page · raw message
arch/arm/mach-spear13xx/platsmp.c +12 -0
@@ -101,6 +101,18 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) pen_release = cpu;flush_cache_all (); +/* +* XXX +* +* This is a later addition to the booting protocol: the +* bootMonitor now puts secondary cores into WFI, so +* poke_milo() no longer gets the cores moving; we need +* to send a soft interrupt to wake the secondary core. +* Use smp_cross_call() for this, since there's little +* point duplicating the code here +*/ +smp_cross_call (cpumask_of (cpu)); + timeout = jiffies + (1 *HZ );while (time_before (jiffies, timeout)) {smp_rmb ();
Signature · 1 line
1.7.2.2
PATCH 52/74 ST SPEAr13xx: Adding CPU hotplug support added for SMP platforms
Hi,
arch/arm/mach-spear13xx/hotplug.c line 34
Quoted 11 lines · Viresh KUMAR
From: Deepak Sikri <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>Signed-off-by shiraz hashim <[email protected]>Signed-off-by Viresh Kumar <[email protected]>---
arch/arm/mach-spear13xx/hotplug.c new file +4
-0+flush_cache_all (); + asmvolatile ( +" mcr p15, 0, %1, c7, c5, 0\n" + " mcr p15, 0, %1, c7, c10, 4\n"
Isnt this a Cortex-A9 platform? If yes, then this is not implemented on the Cortex-A9 if I am right.
You should use a dsb() here.
arch/arm/mach-spear13xx/hotplug.c line 76
Quoted 5 lines
arch/arm/mach-spear13xx/hotplug.c new file +5
-0+/* +* here's the WFI +*/ + asm(".word 0xe320f003\n" + :
Also, why not a simple asm volatile("wfi" : : : "memory"); instead of hard coded values.
Regards,
Sundar
PATCH 52/74 ST SPEAr13xx: Adding CPU hotplug support added for SMP platforms
Hello Sundar,
Sorry for replying so late :).
Quoted 10 lines · Sundar
Hi,
Quoted 6 lines · Viresh KUMAR
From: Deepak Sikri <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>Signed-off-by shiraz hashim <[email protected]>Signed-off-by Viresh Kumar <[email protected]>---
Quoted 8 lines
arch/arm/mach-spear13xx/hotplug.c line 34
Quoted 4 lines
arch/arm/mach-spear13xx/hotplug.c new file +4
-0+flush_cache_all (); + asmvolatile ( +" mcr p15, 0, %1, c7, c5, 0\n" + " mcr p15, 0, %1, c7, c10, 4\n"Isnt this a Cortex-A9 platform? If yes, then this is not implemented on the Cortex-A9 if I am right.
You should use adsb()here.
yes, I would place dsb here.
Quoted 8 lines
arch/arm/mach-spear13xx/hotplug.c line 76
Quoted 5 lines
arch/arm/mach-spear13xx/hotplug.c new file +5
-0+/* +* here's the WFI +*/ + asm(".word 0xe320f003\n" + :Also, why not a simple asm
volatile("wfi" : : : "memory"); instead of hard coded values.
Would add a wfi() macro in asm/system.h including sev() as suggested by Russell. This statement would be replaced by a simple wfi().
regards
Shiraz
PATCH 53/74 ST SPEAr13xx: add l2 cache support
In reply to Viresh KUMARFrom: Shiraz Hashim <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/spear1300_evb.c | 13 +++++++++++++ arch/arm/mach-spear13xx/spear13xx.c | 7 +++++++ arch/arm/mm/Kconfig | 2 +- 3 files changed, 21 insertions(+), 1 deletions(-)
arch/arm/mach-spear13xx/spear1300_evb.c +13 -0
@@ -26,6 +26,8 @@#include <plat/nand.h> #include <plat/smi.h> #include <plat/spi.h> +#include <mach/hardware.h> +#include <asm/hardware/cache-l2x0.h> #define PARTITION (n, off, sz) {.name = n, .offset = off, .size = sz}
@@ -132,6 +134,17 @@ static int spear1300_pcie_port_is_host(int port)static void __init spear1300_evb_init (void ) { +#ifdef CONFIG_CACHE_L2X0 +/* +* 256KB (16KB/way), 16-way associativity, parity not +* supported +* TODO: 0x249, picked from nomadik, to be analyzed +* Comment from nomadik: +* At full speed latency must be >=2, so 0x249 in low bits +*/ +l2x0_init (__io_address (SPEAR13XX_L2CC_BASE ),0x00260249 ,0xfe00ffff ); +#endif +/* set keyboard plat data */ kbd_set_plat_data (&kbd_device, &kbd_data);
arch/arm/mach-spear13xx/spear13xx.c +7 -0
@@ -538,6 +538,13 @@ struct map_desc spear13xx_io_desc[] __initdata = { .pfn = __phys_to_pfn(SPEAR13XX_A9SM_PERIP_BASE), .length = SZ_8K, .type = MT_DEVICE +#ifdef CONFIG_CACHE_L2X0 + }, { + .virtual = IO_ADDRESS(SPEAR13XX_L2CC_BASE), + .pfn = __phys_to_pfn(SPEAR13XX_L2CC_BASE), + .length = SZ_4K, + .type = MT_DEVICE +#endif }, { .virtual = IO_ADDRESS(SPEAR13XX_MISC_BASE), .pfn = __phys_to_pfn(SPEAR13XX_MISC_BASE),
arch/arm/mm/Kconfig +1 -1
@@ -772,7 +772,7 @@ config CACHE_L2X0 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \ ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4 + ARCH_SPEAR13XX || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 default y select OUTER_CACHE select OUTER_CACHE_SYNC
Signature · 1 line
1.7.2.2
PATCH 54/74 ST SPEAr: SDHCI- selecting SD_MMC from misc and fixing sdhci_synth rate to 48 MHz
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 9 +++++---- arch/arm/mach-spear13xx/include/mach/misc_regs.h | 5 +++++ arch/arm/mach-spear13xx/spear13xx.c | 12 +++++++++++- 3 files changed, 21 insertions(+), 5 deletions(-)
arch/arm/mach-spear13xx/clock.c +5 -4
@@ -354,6 +354,7 @@ static struct aux_clk_config uart_synth_config = {/* aux rate configuration table, in ascending order of rates */ struct aux_rate_tbl aux_rtbl[] = {/* For PLL1div2 = 500 MHz */ + {.xscale =2 , .yscale =21 , .eq =1 },/* 48 MHz */ {.xscale =1 , .yscale =6 , .eq =1 },/* 83 MHz */ {.xscale =1 , .yscale =4 , .eq =1 },/* 125 MHz */ {.xscale =1 , .yscale =3 , .eq =1 },/* 166 MHz */
@@ -368,7 +369,7 @@ static struct clk uart_synth_clk = { .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, .set_rate = &aux_clk_set_rate, - .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 0}, + .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 1}, .private_data = &uart_synth_config, };
@@ -414,7 +415,7 @@ static struct clk sdhci_synth_clk = { .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, .set_rate = &aux_clk_set_rate, - .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2}, + .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 0}, .private_data = &sdhci_synth_config, };
@@ -440,7 +441,7 @@ static struct clk cfxd_synth_clk = { .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, .set_rate = &aux_clk_set_rate, - .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2}, + .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 0}, .private_data = &cfxd_synth_config, };
@@ -466,7 +467,7 @@ static struct clk c3_synth_clk = { .calc_rate = &aux_calc_rate, .recalc = &aux_clk_recalc, .set_rate = &aux_clk_set_rate, - .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 0}, + .rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 1}, .private_data = &c3_synth_config, };
arch/arm/mach-spear13xx/include/mach/misc_regs.h +5 -0
@@ -228,6 +228,11 @@#define PCIE_MIPHY_CFG ((unsigned int *)(MISC_BASE + 0x328))#define PERIP_CFG ((unsigned int *)(MISC_BASE + 0x32c)) +#define MCIF_SEL_SHIFT 3 +#define MCIF_SEL_MASK 0x3 +#define SD_MMC_ACTIVE 0x1 +#define CF_MMC_ACTIVE 0x2 +#define XD_MMC_ACTIVE 0x3#define FSMC_CFG ((unsigned int *)(MISC_BASE + 0x330))/* FSMC_CFG register masks */ #define FSMC_MEMSEL_MASK 0x3
arch/arm/mach-spear13xx/spear13xx.c +11 -1
@@ -369,6 +369,16 @@ struct platform_device smi_device = { .resource = smi_resources, }; +static void sdhci_enable (void ) +{ +unsigned val =readl (PERIP_CFG ); + +/* This function enables SD/MMC interface out of SD/MMC, CF, XD */ + val &= ~(MCIF_SEL_MASK <<MCIF_SEL_SHIFT ); + val |=SD_MMC_ACTIVE <<MCIF_SEL_SHIFT ; +writel (val,PERIP_CFG ); +} +#ifdef CONFIG_PCIEPORTBUS /* PCIE0 clock always needs to be enabled if any of the three PCIE port * have to be used. So call this function from the board initilization
@@ -516,7 +526,7 @@ struct platform_device pcie_gadget2_device = {/* Do spear13xx familiy common initialization part here */ void __init spear13xx_init (void ) { -/* nothing to do for now */ +sdhci_enable (); }/* This will initialize vic */
Signature · 1 line
1.7.2.2
PATCH 55/74 ST SPEAr13xx: Modified static mappings
In reply to Viresh KUMARFrom: Shiraz Hashim <[email protected]>
The new static io mappings map regions in 0xE...,.... space to 0xF...,.... and those in space 0x6...,.... to 0xE...,.... range. This is done to accomodate regions of RAS configuration registers to be used by clock frameowrk and possibly others.
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/hardware.h | 7 ++++++- arch/arm/mach-spear13xx/include/mach/spear1310.h | 1 + arch/arm/mach-spear13xx/include/mach/vmalloc.h | 2 +- arch/arm/mach-spear13xx/spear13xx.c | 8 ++++++++ 4 files changed, 16 insertions(+), 2 deletions(-)
arch/arm/mach-spear13xx/include/mach/hardware.h +6 -1
@@ -17,7 +17,12 @@#include <mach/spear.h> /* Vitual to physical translation of statically mapped space */ -#define IO_ADDRESS (x) (x | 0xF0000000) +/* +* if phy_addr is 0x8...,.... and above then map it to 0xF...,.... +* else map it to 0xE...,.... +*/ + +#define IO_ADDRESS (x) ((x) | ((((x) >> 31) << 28) | 0xE0000000))/* typesafe io address */ #define __io_address (n) __io(IO_ADDRESS(n))
arch/arm/mach-spear13xx/include/mach/spear1310.h +1 -0
@@ -18,6 +18,7 @@#define SPEAR1310_CAN0_BASE UL(0x6DA00000)#define SPEAR1310_CAN1_BASE UL(0x6DB00000) +#define SPEAR1310_RAS_BASE UL(0x6C800000)#endif /* __MACH_SPEAR1310_H */
arch/arm/mach-spear13xx/include/mach/vmalloc.h +1 -1
@@ -13,6 +13,6 @@#ifndef __MACH_VMALLOC_H#define __MACH_VMALLOC_H -#include <plat/vmalloc.h> +#define VMALLOC_END 0xEC800000#endif /* __MACH_VMALLOC_H */
arch/arm/mach-spear13xx/spear13xx.c +8 -0
@@ -570,6 +570,14 @@ struct map_desc spear13xx_io_desc[] __initdata = { .pfn = __phys_to_pfn(SPEAR13XX_SYSRAM1_BASE), .length = SZ_1M, .type = MT_MEMORY_NONCACHED +#ifdef CONFIG_MACH_SPEAR1310 + }, { + .virtual = IO_ADDRESS(SPEAR1310_RAS_BASE), + .pfn = __phys_to_pfn(SPEAR1310_RAS_BASE), + .length = SZ_4K, + .type = MT_DEVICE + +#endif }, };
Signature · 1 line
1.7.2.2
PATCH 56/74 SPEAr13xx: Adding and Updating Clock definitions
In reply to Viresh KUMARFrom: Deepak Sikri <[email protected]>
Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 196 +++++++++++++++++++++- arch/arm/mach-spear13xx/include/mach/misc_regs.h | 19 ++ arch/arm/mach-spear13xx/include/mach/spear1310.h | 5 + 3 files changed, 215 insertions(+), 5 deletions(-)
arch/arm/mach-spear13xx/clock.c +191 -5
@@ -579,7 +579,7 @@ static struct pclk_sel gmac_phy_pclk_sel = { };/* gmac phy clock */ -static struct clk gmac_phy_clk = { +static struct clk gmac_phy0_clk = { .flags =ALWAYS_ENABLED , .pclk_sel = &gmac_phy_pclk_sel, .pclk_sel_shift =GMAC_PHY_CLK_SHIFT ,
@@ -697,8 +697,8 @@ static struct clk jpeg_clk = { .recalc = &follow_parent, }; -/* gmac clock */ -static struct clk gmac_clk = { +/* gmac clock :Fixed Part*/ +static struct clk gmac0_clk = { .pclk = &ahb_clk, .en_reg =PERIP1_CLK_ENB , .en_reg_bit =GMAC_CLK_ENB ,
@@ -839,6 +839,92 @@ static struct clk kbd_clk = { .recalc = &follow_parent, }; +/* RAS CLOCKS */ +/* pll3 generated clock */ +static struct clk ras_pll3_clk = { + .pclk = &pll3_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =PLL3_CLK_ENB , + .recalc = &follow_parent, +}; + +/* pll2 generated clock */ +static struct clk ras_pll2_clk = { + .pclk = &pll2_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =PLL2_CLK_ENB , + .recalc = &follow_parent, +}; + +/* 125MHz clock generated on Tx pad */ +static struct clk ras_tx125_clk = { + .pclk = &gmii_txclk125_pad, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =C125_CLK_ENB , + .recalc = &follow_parent, +}; + +/* 30 MHz clock generated by USB PHy Pll */ +static struct clk ras_30Mhz_clk = { + .rate =30000000 , + .en_reg =RAS_CLK_ENB , + .en_reg_bit =C30_CLK_ENB , +}; + +/* 48 MHz clock generated by USB PHy Pll */ +static struct clk ras_48Mhz_clk = { + .pclk = &pll5_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =C48_CLK_ENB , + .recalc = &follow_parent, +}; + +/* osc3 generated clock */ +static struct clk ras_osc3_clk = { + .pclk = &ahb_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =OSC3_CLK_ENB , + .recalc = &follow_parent, +}; + +/* osc2 generated clock */ +static struct clk ras_osc2_clk = { + .pclk = &osc2_32k_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =OSC2_CLK_ENB , + .recalc = &follow_parent, +}; + +/* osc1 generated clock */ +static struct clk ras_osc1_clk = { + .pclk = &osc1_24m_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =OSC1_CLK_ENB , + .recalc = &follow_parent, +}; + +/* apb generated clock */ +static struct clk ras_pclk_clk = { + .pclk = &apb_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =PCLK_CLK_ENB , + .recalc = &follow_parent, +}; + +/* ahb generated clock */ +static struct clk ras_aclk_clk = { + .pclk = &ahb_clk, + .en_reg =RAS_CLK_ENB , + .en_reg_bit =ACLK_CLK_ENB , + .recalc = &follow_parent, +}; + +/* External pad 50 MHz clock for phy operation */ +static struct clk ras_tx50_clk = { + .flags =ALWAYS_ENABLED , + .rate =50000000 , +}; +/* spear1300 machine specific clock structures */ #ifdef CONFIG_MACH_SPEAR1300
@@ -859,6 +945,85 @@ static struct clk can1_clk = { .pclk = &apb_clk, .recalc = &follow_parent, }; + +/* gmac clocks :RAS part*/ +static struct clk gmac_ras1_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ras_aclk_clk, + .recalc = &follow_parent, +}; + +static struct clk gmac_ras2_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ras_aclk_clk, + .recalc = &follow_parent, +}; + +static struct clk gmac_ras3_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ras_aclk_clk, + .recalc = &follow_parent, +}; + +static struct clk gmac_ras4_clk = { + .flags =ALWAYS_ENABLED , + .pclk = &ras_aclk_clk, + .recalc = &follow_parent, +}; + +/* phy clock parent select */ +static struct pclk_info phy_pclk_info[] = { + { + .pclk = &ras_pll2_clk, + .pclk_val =0x8 , + }, { + .pclk = &ras_tx125_clk, + .pclk_val =0x4 , + }, { + .pclk = &ras_tx50_clk, + .pclk_val =0x0 , + }, +}; + +static struct pclk_sel phy_pclk_sel = { + .pclk_info = phy_pclk_info, + .pclk_count =ARRAY_SIZE (phy_pclk_info), + .pclk_sel_reg = (unsigned int *)(IO_ADDRESS (RAS_CTRL_REG1 )), + .pclk_sel_mask =PHY_CLK_MASK , +}; + +/* Phy 1 Clock */ +struct clk gmac_phy1_clk = { + .flags =ALWAYS_ENABLED , + .pclk_sel = &phy_pclk_sel, + .pclk_sel_shift =PHY_CLK_SHIFT , + .recalc = &follow_parent, +}; + +/* Phy 2 Clock */ +static struct clk gmac_phy2_clk = { + .flags =ALWAYS_ENABLED , + .pclk_sel = &phy_pclk_sel, + .pclk_sel_shift =PHY_CLK_SHIFT , + .recalc = &follow_parent, +}; + +/* Phy 3 Clock */ +static struct clk gmac_phy3_clk = { + .flags =ALWAYS_ENABLED , + .pclk_sel = &phy_pclk_sel, + .pclk_sel_shift =PHY_CLK_SHIFT , + .recalc = &follow_parent, +}; + +/* Phy 4 Clock */ +static struct clk gmac_phy4_clk = { + .flags =ALWAYS_ENABLED , + .pclk_sel = &phy_pclk_sel, + .pclk_sel_shift =PHY_CLK_SHIFT , + .recalc = &follow_parent, +}; +#endif /* array of all spear 13xx clock lookups */
@@ -896,7 +1061,20 @@ static struct clk_lookup spear_clk_lookups[] = { {.con_id = "cfxd_synth_clk", .clk = &cfxd_synth_clk}, {.con_id = "gmac_phy_input_clk", .clk = &gmac_phy_input_clk}, {.con_id = "gmac_phy_synth_clk", .clk = &gmac_phy_synth_clk}, - {.con_id = "gmac_phy_clk", .clk = &gmac_phy_clk}, + {.dev_id = "stmmacphy.0", .clk = &gmac_phy0_clk}, + + /* RAS clocks */ + {.con_id = "ras_pll3_clk", .clk = &ras_pll3_clk}, + {.con_id = "ras_pll2_clk", .clk = &ras_pll2_clk}, + {.con_id = "ras_tx125_clk", .clk = &ras_tx125_clk}, + {.con_id = "ras_30Mhz_clk", .clk = &ras_30Mhz_clk}, + {.con_id = "ras_48Mhz_clk", .clk = &ras_48Mhz_clk}, + {.con_id = "ras_osc3_clk", .clk = &ras_osc3_clk}, + {.con_id = "ras_osc2_clk", .clk = &ras_osc2_clk}, + {.con_id = "ras_osc1_clk", .clk = &ras_osc1_clk}, + {.con_id = "ras_pclk_clk", .clk = &ras_pclk_clk}, + {.con_id = "ras_aclk_clk", .clk = &ras_aclk_clk}, + {.con_id = "ras_tx50_clk", .clk = &ras_tx50_clk}, /* clocks having multiple parent source from above clocks */ {.dev_id = "clcd", .clk = &clcd_clk},
@@ -915,7 +1093,7 @@ static struct clk_lookup spear_clk_lookups[] = { {.dev_id = "dma0", .clk = &dma0_clk}, {.dev_id = "dma1", .clk = &dma1_clk}, {.dev_id = "jpeg", .clk = &jpeg_clk}, - {.dev_id = "gmac", .clk = &gmac_clk}, + {.dev_id = "stmmaceth.0", .clk = &gmac0_clk}, {.dev_id = "c3", .clk = &c3_clk}, {.dev_id = "pcie0", .clk = &pcie0_clk}, {.dev_id = "pcie1", .clk = &pcie1_clk},
@@ -944,6 +1122,14 @@ static struct clk_lookup spear_clk_lookups[] = { #ifdef CONFIG_MACH_SPEAR1310 {.dev_id = "spear_can.0", .clk = &can0_clk}, {.dev_id = "spear_can.1", .clk = &can1_clk}, + {.dev_id = "stmmaceth.1", .clk = &gmac_ras1_clk}, + {.dev_id = "stmmaceth.2", .clk = &gmac_ras2_clk}, + {.dev_id = "stmmaceth.3", .clk = &gmac_ras3_clk}, + {.dev_id = "stmmaceth.4", .clk = &gmac_ras4_clk}, + {.dev_id = "stmmacphy.1", .clk = &gmac_phy1_clk}, + {.dev_id = "stmmacphy.2", .clk = &gmac_phy2_clk}, + {.dev_id = "stmmacphy.3", .clk = &gmac_phy3_clk}, + {.dev_id = "stmmacphy.4", .clk = &gmac_phy4_clk}, #endif };
arch/arm/mach-spear13xx/include/mach/misc_regs.h +19 -0
@@ -191,6 +191,25 @@#define JPEG_SOF_RST 28#define PERIP2_SW_RST ((unsigned int *)(MISC_BASE + 0x280))#define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x284)) +/* RAS_CLK_ENB register masks */ +#define ACLK_CLK_ENB 0 +#define PCLK_CLK_ENB 1 +#define OSC1_CLK_ENB 2 +#define OSC2_CLK_ENB 3 +#define OSC3_CLK_ENB 4 +#define C48_CLK_ENB 5 +#define C30_CLK_ENB 6 +#define C125_CLK_ENB 7 +#define PLL2_CLK_ENB 8 +#define PLL3_CLK_ENB 9 +#define PCLK0_CLK_ENB 10 +#define PCLK1_CLK_ENB 11 +#define PCLK2_CLK_ENB 12 +#define PCLK3_CLK_ENB 13 +#define SYN0_CLK_ENB 14 +#define SYN1_CLK_ENB 15 +#define SYN2_CLK_ENB 16 +#define SYN3_CLK_ENB 17#define RAS_SW_RST ((unsigned int *)(MISC_BASE + 0x288))#define PLL1_SYNT ((unsigned int *)(MISC_BASE + 0x28c))#define I2S_CLK_CFG ((unsigned int *)(MISC_BASE + 0x290))
arch/arm/mach-spear13xx/include/mach/spear1310.h +5 -0
@@ -20,6 +20,11 @@#define SPEAR1310_CAN1_BASE UL(0x6DB00000)#define SPEAR1310_RAS_BASE UL(0x6C800000) +/* RAS Area Control Register */ +#define RAS_CTRL_REG1 (SPEAR1310_RAS_BASE + 0x4) +#define PHY_CLK_MASK 0xF +#define PHY_CLK_SHIFT 0 +#endif /* __MACH_SPEAR1310_H */ #endif /* CONFIG_MACH_SPEAR1310 */
Signature · 1 line
1.7.2.2
PATCH 57/74 SPEAr : Pad multiplexing handling modified
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
Until now, the platform code assumed 1 32 bit register to be used for pad multiplexing. This assumption is not true for SPEAr13xx devices, so the generic implementation of pad multiplexing adopts a new concepts of multiple multiplexing registers.
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/include/mach/generic.h | 3 + arch/arm/mach-spear3xx/spear300.c | 314 ++++++++++++++---- arch/arm/mach-spear3xx/spear310.c | 118 +++++-- arch/arm/mach-spear3xx/spear320.c | 387 +++++++++++++++++----- arch/arm/mach-spear3xx/spear3xx.c | 451 ++++++++++++++++++++----- arch/arm/plat-spear/include/plat/padmux.h | 28 ++- arch/arm/plat-spear/padmux.c | 28 +- 7 files changed, 1040 insertions(+), 289 deletions(-)
arch/arm/mach-spear3xx/include/mach/generic.h +3 -0
@@ -149,6 +149,7 @@ extern struct pmx_dev pmx_telecom_boot_pins;extern struct pmx_dev pmx_telecom_sdhci_4bit;extern struct pmx_dev pmx_telecom_sdhci_8bit;extern struct pmx_dev pmx_gpio1; +#define PAD_MUX_CONFIG_REG 0x00/* Add spear300 machine function declarations here */ void __init spear300_init (void );
@@ -180,6 +181,7 @@ extern struct pmx_dev pmx_uart3_4_5;extern struct pmx_dev pmx_fsmc;extern struct pmx_dev pmx_rs485_0_1;extern struct pmx_dev pmx_tdm0; +#define PAD_MUX_CONFIG_REG 0x08/* Add spear310 machine function declarations here */ void __init spear310_init (void );
@@ -229,6 +231,7 @@ extern struct pmx_dev pmx_mii1;extern struct pmx_dev pmx_smii0;extern struct pmx_dev pmx_smii1;extern struct pmx_dev pmx_i2c1; +#define PAD_MUX_CONFIG_REG 0x0C/* Add spear320 machine function declarations here */ void __init spear320_init (void );
arch/arm/mach-spear3xx/spear300.c +245 -69
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arch/arm/mach-spear3xx/spear310.c +89 -29
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arch/arm/mach-spear3xx/spear320.c +309 -78
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arch/arm/mach-spear3xx/spear3xx.c +361 -90
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arch/arm/plat-spear/include/plat/padmux.h +20 -8
@@ -28,26 +28,42 @@ struct pmx_reg { };/* +* struct pmx_mux_reg: configuration structure every group of modes of a device +* +* offset: multiplexing register offset +* mask: mask for supported mode +* value: value to be written +*/ +struct pmx_mux_reg { +u32 offset; +u32 mask; +u32 value; +}; + +/* * struct pmx_dev_mode: configuration structure every group of modes of a device * * ids: all modes for this configuration -* mask: mask for supported mode +* mux_regs: array of mux registers, masks and values to enable the device in +* this group of modes +* mux_reg_cnt: count of mux_regs elements */ struct pmx_dev_mode {u32 ids; -u32 mask; +struct pmx_mux_reg *mux_regs; +u8 mux_reg_cnt; };/* * struct pmx_mode: mode definition structure * * name: mode name -* mask: mode mask +* value: mode value */ struct pmx_mode {char *name;u32 id; -u32 mask; +u32 value; };/*
@@ -57,14 +73,12 @@ struct pmx_mode {* modes: device configuration array for different modes supported * mode_count: size of modes array * is_active: is peripheral active/enabled -* enb_on_reset: if 1, mask bits to be cleared in reg otherwise to be set in reg */ struct pmx_dev {char *name;struct pmx_dev_mode *modes;u8 mode_count;bool is_active; -bool enb_on_reset; };/*
@@ -75,7 +89,6 @@ struct pmx_dev {* devs_count: ARRAY_SIZE of devs * base: base address of soc config registers * mode_reg: structure of mode config register -* mux_reg: structure of device mux config register */ struct pmx_driver {struct pmx_mode *mode;
@@ -83,7 +96,6 @@ struct pmx_driver {u8 devs_count;u32 *base;struct pmx_reg mode_reg; -struct pmx_reg mux_reg; };/* pmx functions */
arch/arm/plat-spear/padmux.c +13 -15
@@ -21,13 +21,11 @@* * base: base address of configuration registers * mode_reg: mode configurations -* mux_reg: muxing configurations * active_mode: pointer to current active mode */ struct pmx {u32 base;struct pmx_reg mode_reg; -struct pmx_reg mux_reg;struct pmx_mode *active_mode; };
@@ -51,7 +49,7 @@ static int pmx_mode_set(struct pmx_mode *mode) val =readl (pmx->base + pmx->mode_reg.offset); val &= ~pmx->mode_reg.mask; - val |= mode->mask & pmx->mode_reg.mask; + val |= mode->value & pmx->mode_reg.mask;writel (val, pmx->base + pmx->mode_reg.offset);return 0 ;
@@ -66,19 +64,18 @@ static int pmx_mode_set(struct pmx_mode *mode)* If peripheral is not supported by current mode then request is rejected. * Conflicts between peripherals are not handled and peripherals will be * enabled in the order they are present in pmx_dev array. -* In case of conflicts last peripheral enabled will be present. +* In case of conflicts last peripheral enabled will remain present. * Returns -ve on Err otherwise 0 */ static int pmx_devs_enable (struct pmx_dev **devs,u8 count) { -u32 val, i, mask; +u32 val, i;if (!count)return -EINVAL ; - val =readl (pmx->base + pmx->mux_reg.offset);for (i =0 ; i < count; i++) { -u8 j =0 ; +u8 k, j =0 ;if (!devs[i]->name || !devs[i]->modes) {printk (KERN_ERR "padmux: dev name or modes is null\n" );
@@ -103,15 +100,18 @@ static int pmx_devs_enable(struct pmx_dev **devs, u8 count) }/* enable peripheral */ - mask = devs[i]->modes[j].mask & pmx->mux_reg.mask; -if (devs[i]->enb_on_reset) - val &= ~mask; -else - val |= mask; +for (k =0 ; k < devs[i]->modes[j].mux_reg_cnt; k++) { +struct pmx_mux_reg *mux_reg = + &devs[i]->modes[j].mux_regs[k]; + + val =readl (pmx->base + mux_reg->offset); + val &= ~mux_reg->mask; + val |= mux_reg->value & mux_reg->mask; +writel (val, pmx->base + mux_reg->offset); + } devs[i]->is_active = true; } -writel (val, pmx->base + pmx->mux_reg.offset);kfree (pmx);/* this will ensure that multiplexing can't be changed now */
@@ -144,8 +144,6 @@ int pmx_register(struct pmx_driver *driver) pmx->base = (u32 )driver->base; pmx->mode_reg.offset = driver->mode_reg.offset; pmx->mode_reg.mask = driver->mode_reg.mask; - pmx->mux_reg.offset = driver->mux_reg.offset; - pmx->mux_reg.mask = driver->mux_reg.mask;/* choose mode to enable */ if (driver->mode) {
Signature · 1 line
1.7.2.2
PATCH 58/74 SPEAr13xx : Fixed part devices in SPEAr13xx addded to the generic implementation
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/generic.h | 164 ++++++++ arch/arm/mach-spear13xx/include/mach/spear.h | 3 + arch/arm/mach-spear13xx/spear1300.c | 15 + arch/arm/mach-spear13xx/spear1300_evb.c | 25 ++ arch/arm/mach-spear13xx/spear1310.c | 15 + arch/arm/mach-spear13xx/spear1310_evb.c | 25 ++ arch/arm/mach-spear13xx/spear13xx.c | 528 ++++++++++++++++++++++++ arch/arm/plat-spear/Makefile | 1 + 8 files changed, 776 insertions(+), 0 deletions(-)
arch/arm/mach-spear13xx/include/mach/generic.h +164 -0
@@ -20,6 +20,168 @@#include <linux/platform_device.h> #include <linux/amba/bus.h> #include <plat/device.h> +#include <plat/padmux.h> + +/* +* Function enable (Pad multiplexing register) offsets +*/ +#define PAD_MUX_CONFIG_REG_0 0x0 +#define PAD_MUX_CONFIG_REG_1 0x4 +#define PAD_MUX_CONFIG_REG_2 0x8 +#define PAD_MUX_CONFIG_REG_3 0xC + +/* pad mux declarations */ +#define PMX_I2S1_MASK (1 << 3) +#define PMX_I2S2_MASK (1 << 16)/* Offset 4 */ +#define PMX_CLCD1_MASK (1 << 5) +#define PMX_CLCD2_MASK (1 << 3)/* Offset 4 */ +#define PMX_EGPIO00_MASK (1 << 6) +#define PMX_EGPIO01_MASK (1 << 7) +#define PMX_EGPIO02_MASK (1 << 8) +#define PMX_EGPIO03_MASK (1 << 9) +#define PMX_EGPIO04_MASK (1 << 10) +#define PMX_EGPIO05_MASK (1 << 11) +#define PMX_EGPIO06_MASK (1 << 12) +#define PMX_EGPIO07_MASK (1 << 13) +#define PMX_EGPIO08_MASK (1 << 14) +#define PMX_EGPIO09_MASK (1 << 15) +#define PMX_EGPIO10_MASK (1 << 5)/* Offset 4 */ +#define PMX_EGPIO11_MASK (1 << 6)/* Offset 4 */ +#define PMX_EGPIO12_MASK (1 << 7)/* Offset 4 */ +#define PMX_EGPIO13_MASK (1 << 8)/* Offset 4 */ +#define PMX_EGPIO14_MASK (1 << 9)/* Offset 4 */ +#define PMX_EGPIO15_MASK (1 << 10)/* Offset 4 */ +#define PMX_EGPIO_0_GRP_MASK (PMX_EGPIO00_MASK | PMX_EGPIO01_MASK | \ + PMX_EGPIO02_MASK | PMX_EGPIO03_MASK | PMX_EGPIO04_MASK | \ + PMX_EGPIO05_MASK | PMX_EGPIO06_MASK | PMX_EGPIO07_MASK | \ + PMX_EGPIO08_MASK | PMX_EGPIO09_MASK) +#define PMX_EGPIO_1_GRP_MASK (PMX_EGPIO10_MASK | PMX_EGPIO11_MASK | \ + PMX_EGPIO12_MASK | PMX_EGPIO13_MASK | PMX_EGPIO14_MASK | \ + PMX_EGPIO15_MASK) + +#define PMX_SMI_MASK (1 << 16) +#define PMX_SMINCS2_MASK (1 << 1)/* Offset 4 */ +#define PMX_SMINCS3_MASK (1 << 2)/* Offset 4 */ + +#define PMX_GMIICLK_MASK (1 << 18) +#define PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK (1 << 19) +#define PMX_RXCLK_RDV_TXEN_D03_MASK (1 << 20) +#define PMX_GMIID47_MASK (1 << 21) +#define PMX_MDC_MDIO_MASK (1 << 22) + +#define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ + PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ + PMX_RXCLK_RDV_TXEN_D03_MASK | PMX_GMIID47_MASK | \ + PMX_MDC_MDIO_MASK) + +#define PMX_NAND8_MASK (1 << 17) +#define PMX_NFAD023_MASK (1 << 24) +#define PMX_NFAD24_MASK (1 << 25) +#define PMX_NFAD25_MASK (1 << 26) +#define PMX_NFWPRT1_MASK (1 << 24)/* Offset 4 */ +#define PMX_NFWPRT2_MASK (1 << 26)/* Offset 4 */ +#define PMX_NFWPRT3_MASK (1 << 28) +#define PMX_NFRSTPWDWN0_MASK (1 << 29) +#define PMX_NFRSTPWDWN1_MASK (1 << 30) +#define PMX_NFRSTPWDWN2_MASK (1 << 31) +#define PMX_NFRSTPWDWN3_MASK (1 << 0)/* Offset 4 */ +#define PMX_NFCE1_MASK (1 << 20)/* Offset 4 */ +#define PMX_NFCE2_MASK (1 << 22)/* Offset 4 */ +#define PMX_NFCE3_MASK (1 << 27) +#define PMX_NFIO815_MASK (1 << 18)/* Offset 4 */ + +#define PMX_NAND8BIT_0_MASK (PMX_NAND8_MASK | PMX_NFAD023_MASK | \ + PMX_NFAD24_MASK | PMX_NFAD25_MASK | PMX_NFWPRT3_MASK | \ + PMX_NFRSTPWDWN0_MASK | PMX_NFRSTPWDWN1_MASK | \ + PMX_NFRSTPWDWN2_MASK | PMX_NFCE3_MASK) +#define PMX_NAND8BIT_1_MASK (PMX_NFRSTPWDWN3_MASK) + +#define PMX_NAND8BIT4DEV_0_MASK (PMX_NAND8BIT_0_MASK) +#define PMX_NAND8BIT4DEV_1_MASK (PMX_NAND8BIT_1_MASK | PMX_NFCE1_MASK | \ + PMX_NFCE2_MASK | PMX_NFWPRT1_MASK | PMX_NFWPRT2_MASK) + +#define PMX_NAND16BIT_0_MASK (PMX_NAND8BIT_0_MASK) +#define PMX_NAND16BIT_1_MASK (PMX_NAND8BIT_1_MASK | PMX_NFIO815_MASK) +#define PMX_NAND16BIT4DEV_0_MASK (PMX_NAND8BIT4DEV_0_MASK) +#define PMX_NAND16BIT4DEV_1_MASK (PMX_NAND8BIT4DEV_1_MASK | \ + PMX_NFIO815_MASK) + +#define PMX_KBD_ROW0_MASK (1 << 25)/* Offset 4 */ +#define PMX_KBD_ROW1_MASK (1 << 23)/* Offset 4 */ +#define PMX_KBD_ROWCOL25_MASK (1 << 17)/* Offset 4 */ +#define PMX_KBD_ROWCOL68_MASK (1 << 4)/* Offset 4 */ +#define PMX_KBD_COL0_MASK (1 << 21)/* Offset 4 */ +#define PMX_KBD_COL1_MASK (1 << 19)/* Offset 4 */ +#define PMX_KEYBOARD_MASK (PMX_KBD_ROW0_MASK | PMX_KBD_ROW1_MASK | \ + PMX_KBD_ROWCOL25_MASK | PMX_KBD_ROWCOL68_MASK | \ + PMX_KBD_COL0_MASK | PMX_KBD_COL1_MASK) + +#define PMX_UART0_MASK (1 << 1) +#define PMX_I2C_MASK (1 << 2) +#define PMX_SSP_MASK (1 << 4) +#define PMX_UART0_MODEM_MASK (1 << 11)/* Offset 4 */ +#define PMX_GPT0_TMR1_MASK (1 << 12)/* Offset 4 */ +#define PMX_GPT0_TMR2_MASK (1 << 13)/* Offset 4 */ +#define PMX_GPT1_TMR1_MASK (1 << 14)/* Offset 4 */ +#define PMX_GPT1_TMR2_MASK (1 << 15)/* Offset 4 */ + +#define PMX_MCIDATA0_MASK (1 << 27)/* Offset 4 */ +#define PMX_MCIDATA1_MASK (1 << 28)/* Offset 4 */ +#define PMX_MCIDATA2_MASK (1 << 29)/* Offset 4 */ +#define PMX_MCIDATA3_MASK (1 << 30)/* Offset 4 */ +#define PMX_MCIDATA4_MASK (1 << 31)/* Offset 4 */ +#define PMX_MCIDATA5_MASK (1 << 0)/* Offset 8 */ +#define PMX_MCIDATA6_MASK (1 << 1)/* Offset 8 */ +#define PMX_MCIDATA7_MASK (1 << 2)/* Offset 8 */ +#define PMX_MCIDATA1SD_MASK (1 << 3)/* Offset 8 */ +#define PMX_MCIDATA2SD_MASK (1 << 4)/* Offset 8 */ +#define PMX_MCIDATA3SD_MASK (1 << 5)/* Offset 8 */ +#define PMX_MCIADDR0ALE_MASK (1 << 6)/* Offset 8 */ +#define PMX_MCIADDR1CLECLK_MASK (1 << 7)/* Offset 8 */ +#define PMX_MCIADDR2_MASK (1 << 8)/* Offset 8 */ +#define PMX_MCICECF_MASK (1 << 9)/* Offset 8 */ +#define PMX_MCICEXD_MASK (1 << 10)/* Offset 8 */ +#define PMX_MCICESDMMC_MASK (1 << 11)/* Offset 8 */ +#define PMX_MCICDCF1_MASK (1 << 12)/* Offset 8 */ +#define PMX_MCICDCF2_MASK (1 << 13)/* Offset 8 */ +#define PMX_MCICDXD_MASK (1 << 14)/* Offset 8 */ +#define PMX_MCICDSDMMC_MASK (1 << 15)/* Offset 8 */ +#define PMX_MCIDATADIR_MASK (1 << 16)/* Offset 8 */ +#define PMX_MCIDMARQWP_MASK (1 << 17)/* Offset 8 */ +#define PMX_MCIIORDRE_MASK (1 << 18)/* Offset 8 */ +#define PMX_MCIIOWRWE_MASK (1 << 19)/* Offset 8 */ +#define PMX_MCIRESETCF_MASK (1 << 20)/* Offset 8 */ +#define PMX_MCICS0CE_MASK (1 << 21)/* Offset 8 */ +#define PMX_MCICFINTR_MASK (1 << 22)/* Offset 8 */ +#define PMX_MCIIORDY_MASK (1 << 23)/* Offset 8 */ +#define PMX_MCICS1_MASK (1 << 24)/* Offset 8 */ +#define PMX_MCIDMAACK_MASK (1 << 25)/* Offset 8 */ +#define PMX_MCISDCMD_MASK (1 << 26)/* Offset 8 */ +#define PMX_MCILEDS_MASK (1 << 27)/* Offset 8 */ + +#define PMX_MCIFALL_1_MASK (0xF8000000) +#define PMX_MCIFALL_2_MASK (0x0FFFFFFF) + +/* pad mux devices */ +extern struct pmx_dev pmx_i2c; +extern struct pmx_dev pmx_ssp; +extern struct pmx_dev pmx_i2s2; +extern struct pmx_dev pmx_clcd1; +extern struct pmx_dev pmx_clcd2; +extern struct pmx_dev pmx_egpio_grp; +extern struct pmx_dev pmx_smi_2_chips; +extern struct pmx_dev pmx_smi_4_chips; +extern struct pmx_dev pmx_gmii; +extern struct pmx_dev pmx_nand_8bit; +extern struct pmx_dev pmx_nand_16bit; +extern struct pmx_dev pmx_keyboard; +extern struct pmx_dev pmx_uart0; +extern struct pmx_dev pmx_uart0_modem; +extern struct pmx_dev pmx_gpt_0_1; +extern struct pmx_dev pmx_gpt_0_2; +extern struct pmx_dev pmx_gpt_1_1; +extern struct pmx_dev pmx_gpt_1_2; +extern struct pmx_dev pmx_mcif;/* * Each GPT has 2 timer channels
@@ -29,6 +191,8 @@#define SPEAR_GPT0_CHAN0_IRQ IRQ_GPT0_TMR0#define SPEAR_GPT0_CHAN1_IRQ IRQ_GPT0_TMR1 +extern struct pmx_driver pmx_driver; +/* Add spear13xx family device structure declarations here */ extern struct amba_device gpio_device[];extern struct amba_device ssp_device;
arch/arm/mach-spear13xx/include/mach/spear.h +3 -0
@@ -88,6 +88,9 @@#define SPEAR13XX_MCIF_CF_BASE UL(0xB2800000)#define SPEAR13XX_MCIF_SDHCI_BASE UL(0xB3000000) +/* Pad multiplexing base */ +#define SPEAR13XX_FUNC_ENB_BASE UL(0xE0700650) +/* Debug uart for linux, will be used for debug and uncompress messages */ #define SPEAR_DBG_UART_BASE SPEAR13XX_UART_BASE#define VA_SPEAR_DBG_UART_BASE VA_SPEAR13XX_UART_BASE
arch/arm/mach-spear13xx/spear1300.c +15 -0
@@ -14,10 +14,25 @@#include <mach/generic.h> #include <mach/spear.h> +/* pmx driver structure */ +struct pmx_driver pmx_driver; +/* Add spear1300 specific devices here */ void __init spear1300_init (void ) { +int ret; +/* call spear13xx family common init function */ spear13xx_init (); + +/* pmx initialization */ + pmx_driver.base =ioremap (SPEAR13XX_FUNC_ENB_BASE ,SZ_4K ); +if (pmx_driver.base) { + ret =pmx_register (&pmx_driver); +if (ret) +pr_err ("padmux: registeration failed. err no: %d\n" , + ret); +iounmap (pmx_driver.base); + } }
arch/arm/mach-spear13xx/spear1300_evb.c +25 -0
@@ -38,6 +38,26 @@ static struct mtd_partition partition_info[] = { PARTITION("Root File System", 0x380000, 84 * 0x20000), }; +/* padmux devices to enable */ +static struct pmx_dev *pmx_devs[] = { +/* spear13xx specific devices */ + &pmx_i2c, + &pmx_i2s1, + &pmx_i2s2, + &pmx_clcd1, + &pmx_clcd2, + &pmx_egpio_grp, + &pmx_gmii, + &pmx_keyboard, + &pmx_mcif, + &pmx_nand_8bit, + &pmx_smi_4_chips, + &pmx_ssp, + &pmx_uart0, + +/* spear1300 specific devices */ +}; +static struct amba_device *amba_devs[]__initdata = { &gpio_device[0 ], &gpio_device[1 ],
@@ -134,6 +154,11 @@ static int spear1300_pcie_port_is_host(int port)static void __init spear1300_evb_init (void ) { +/* padmux initialization, must be done before spear1300_init */ + pmx_driver.mode =NULL ; + pmx_driver.devs = pmx_devs; + pmx_driver.devs_count =ARRAY_SIZE (pmx_devs); +#ifdef CONFIG_CACHE_L2X0 /* * 256KB (16KB/way), 16-way associativity, parity not
arch/arm/mach-spear13xx/spear1310.c +15 -0
@@ -16,6 +16,9 @@#include <mach/generic.h> #include <mach/hardware.h> +/* pmx driver structure */ +struct pmx_driver pmx_driver; +/* Add spear1310 specific devices here */ /* CAN device registeration */
@@ -57,6 +60,18 @@ struct platform_device can1_device = {void __init spear1310_init (void ) { +int ret; +/* call spear13xx family common init function */ spear13xx_init (); + +/* pmx initialization */ + pmx_driver.base =ioremap (SPEAR13XX_FUNC_ENB_BASE ,SZ_4K ); +if (pmx_driver.base) { + ret =pmx_register (&pmx_driver); +if (ret) +pr_err ("padmux: registeration failed. err no: %d\n" , + ret); +iounmap (pmx_driver.base); + } }
arch/arm/mach-spear13xx/spear1310_evb.c +25 -0
@@ -36,6 +36,26 @@ static struct mtd_partition partition_info[] = { PARTITION("Root File System", 0x380000, 84 * 0x20000), }; +/* padmux devices to enable */ +static struct pmx_dev *pmx_devs[] = { +/* spear13xx specific devices */ + &pmx_i2c, + &pmx_i2s1, + &pmx_i2s2, + &pmx_clcd1, + &pmx_clcd2, + &pmx_egpio_grp, + &pmx_gmii, + &pmx_keyboard, + &pmx_mcif, + &pmx_nand_8bit, + &pmx_smi_4_chips, + &pmx_ssp, + &pmx_uart0, + +/* spear1310 specific devices */ +}; +static struct amba_device *amba_devs[]__initdata = {/* spear13xx specific devices */ &gpio_device[0 ],
@@ -137,6 +157,11 @@ int spear1310_pcie_port_is_host(int port)static void __init spear1310_evb_init (void ) { +/* padmux initialization, must be done before spear1300_init */ + pmx_driver.mode =NULL ; + pmx_driver.devs = pmx_devs; + pmx_driver.devs_count =ARRAY_SIZE (pmx_devs); +/* set keyboard plat data */ kbd_set_plat_data (&kbd_device, &kbd_data);
arch/arm/mach-spear13xx/spear13xx.c +528 -0
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arch/arm/plat-spear/Makefile +1 -0
@@ -5,6 +5,7 @@ # Common support obj-y := clcd.o clock.o pll_clk.o smi.o time.o +obj-$(CONFIG_ARCH_SPEAR13XX) += padmux.o obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o obj-$(CONFIG_CPU_FREQ) += cpufreq.o obj-$(CONFIG_MACH_SPEAR310) += plgpio.o
Signature · 1 line
1.7.2.2
PATCH 59/74 SPEAr : Adding SPEAr1310 pad multiplexing devices
In reply to Viresh KUMARFrom: Vipin Kumar <[email protected]>
This patch makes the following changes
-> Addition of SPEAr1310 pad multiplexing devices.
-> A few bugfixes eg. clcd1 and clcd2 removed and clcd/clcd_hires added -> Support for modifying multiple regiters in different address ranges
Signed-off-by Vipin Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear13xx/include/mach/generic.h | 46 +++- arch/arm/mach-spear13xx/include/mach/spear.h | 3 - arch/arm/mach-spear13xx/spear1300.c | 11 +- arch/arm/mach-spear13xx/spear1300_evb.c | 5 +- arch/arm/mach-spear13xx/spear1310.c | 316 +++++++++++++++++++++++- arch/arm/mach-spear13xx/spear1310_evb.c | 17 +- arch/arm/mach-spear13xx/spear13xx.c | 169 ++++++++----- arch/arm/mach-spear3xx/include/mach/generic.h | 12 +- arch/arm/mach-spear3xx/include/mach/spear300.h | 1 - arch/arm/mach-spear3xx/spear300.c | 66 +++--- arch/arm/mach-spear3xx/spear310.c | 20 +- arch/arm/mach-spear3xx/spear320.c | 61 ++--- arch/arm/mach-spear3xx/spear3xx.c | 60 +++--- arch/arm/plat-spear/include/plat/padmux.h | 10 +- arch/arm/plat-spear/padmux.c | 36 ++- 15 files changed, 591 insertions(+), 242 deletions(-)
arch/arm/mach-spear13xx/include/mach/generic.h +36 -10
@@ -25,10 +25,19 @@/* * Function enable (Pad multiplexing register) offsets */ -#define PAD_MUX_CONFIG_REG_0 0x0 -#define PAD_MUX_CONFIG_REG_1 0x4 -#define PAD_MUX_CONFIG_REG_2 0x8 -#define PAD_MUX_CONFIG_REG_3 0xC +/* Pad multiplexing base */ +#define SPEAR13XX_FUNC_ENB_BASE UL(0xE0700650) + +#define PAD_MUX_CONFIG_REG_0 UL(0xE0700650) +#define PAD_MUX_CONFIG_REG_1 UL(0xE0700654) +#define PAD_MUX_CONFIG_REG_2 UL(0xE0700658) +#define PAD_MUX_CONFIG_REG_3 UL(0xE070065C) + +#if defined(CONFIG_MACH_SPEAR1310 ) +#define SPEAR1310_FUNC_CNTL_0 UL(0x6C800000) + +#define PMX_SMII_MASK (1 << 24)/* Func cntl reg0 */ +#endif /* pad mux declarations */ #define PMX_I2S1_MASK (1 << 3)
@@ -112,9 +121,8 @@#define PMX_KBD_ROWCOL68_MASK (1 << 4)/* Offset 4 */ #define PMX_KBD_COL0_MASK (1 << 21)/* Offset 4 */ #define PMX_KBD_COL1_MASK (1 << 19)/* Offset 4 */ -#define PMX_KEYBOARD_MASK (PMX_KBD_ROW0_MASK | PMX_KBD_ROW1_MASK | \ - PMX_KBD_ROWCOL25_MASK | PMX_KBD_ROWCOL68_MASK | \ - PMX_KBD_COL0_MASK | PMX_KBD_COL1_MASK) +#define PMX_KEYBOARD_6X6_MASK (PMX_KBD_ROW0_MASK | PMX_KBD_ROW1_MASK | \ + PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL0_MASK | PMX_KBD_COL1_MASK)#define PMX_UART0_MASK (1 << 1)#define PMX_I2C_MASK (1 << 2)
@@ -165,16 +173,18 @@/* pad mux devices */ extern struct pmx_dev pmx_i2c;extern struct pmx_dev pmx_ssp; +extern struct pmx_dev pmx_i2s1;extern struct pmx_dev pmx_i2s2; -extern struct pmx_dev pmx_clcd1; -extern struct pmx_dev pmx_clcd2; +extern struct pmx_dev pmx_clcd; +extern struct pmx_dev pmx_clcd_hires;extern struct pmx_dev pmx_egpio_grp;extern struct pmx_dev pmx_smi_2_chips;extern struct pmx_dev pmx_smi_4_chips;extern struct pmx_dev pmx_gmii;extern struct pmx_dev pmx_nand_8bit;extern struct pmx_dev pmx_nand_16bit; -extern struct pmx_dev pmx_keyboard; +extern struct pmx_dev pmx_keyboard_6x6; +extern struct pmx_dev pmx_keyboard_9x9;extern struct pmx_dev pmx_uart0;extern struct pmx_dev pmx_uart0_modem;extern struct pmx_dev pmx_gpt_0_1;
@@ -183,6 +193,22 @@ extern struct pmx_dev pmx_gpt_1_1;extern struct pmx_dev pmx_gpt_1_2;extern struct pmx_dev pmx_mcif; +#if defined(CONFIG_MACH_SPEAR1310 ) +extern struct pmx_dev pmx_uart1_modem; +extern struct pmx_dev pmx_uart_1; +extern struct pmx_dev pmx_uart_2; +extern struct pmx_dev pmx_uart_3_4_5; +extern struct pmx_dev pmx_rs485_hdlc_1_2; +extern struct pmx_dev pmx_tdm_hdlc_1_2; +extern struct pmx_dev pmx_nand32bit; +extern struct pmx_dev pmx_gmii1; +extern struct pmx_dev pmx_rgmii; +extern struct pmx_dev pmx_i2c1; +extern struct pmx_dev pmx_smii_0_1_2; +extern struct pmx_dev pmx_can; +extern struct pmx_dev pmx_uart1_modem; +#endif +/* * Each GPT has 2 timer channels * Following GPT channels will be used as clock source and clockevent
arch/arm/mach-spear13xx/include/mach/spear.h +0 -3
@@ -88,9 +88,6 @@#define SPEAR13XX_MCIF_CF_BASE UL(0xB2800000)#define SPEAR13XX_MCIF_SDHCI_BASE UL(0xB3000000) -/* Pad multiplexing base */ -#define SPEAR13XX_FUNC_ENB_BASE UL(0xE0700650) -/* Debug uart for linux, will be used for debug and uncompress messages */ #define SPEAR_DBG_UART_BASE SPEAR13XX_UART_BASE#define VA_SPEAR_DBG_UART_BASE VA_SPEAR13XX_UART_BASE
arch/arm/mach-spear13xx/spear1300.c +3 -8
@@ -27,12 +27,7 @@ void __init spear1300_init(void)spear13xx_init ();/* pmx initialization */ - pmx_driver.base =ioremap (SPEAR13XX_FUNC_ENB_BASE ,SZ_4K ); -if (pmx_driver.base) { - ret =pmx_register (&pmx_driver); -if (ret) -pr_err ("padmux: registeration failed. err no: %d\n" , - ret); -iounmap (pmx_driver.base); - } + ret =pmx_register (&pmx_driver); +if (ret) +pr_err ("padmux: registeration failed. err no: %d\n" , ret); }
arch/arm/mach-spear13xx/spear1300_evb.c +2 -3
@@ -44,11 +44,10 @@ static struct pmx_dev *pmx_devs[] = { &pmx_i2c, &pmx_i2s1, &pmx_i2s2, - &pmx_clcd1, - &pmx_clcd2, + &pmx_clcd, &pmx_egpio_grp, &pmx_gmii, - &pmx_keyboard, + &pmx_keyboard_6x6, &pmx_mcif, &pmx_nand_8bit, &pmx_smi_4_chips,
arch/arm/mach-spear13xx/spear1310.c +308 -8
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arch/arm/mach-spear13xx/spear1310_evb.c +10 -7
@@ -41,26 +41,29 @@ static struct pmx_dev *pmx_devs[] = {/* spear13xx specific devices */ &pmx_i2c, &pmx_i2s1, - &pmx_i2s2, - &pmx_clcd1, - &pmx_clcd2, &pmx_egpio_grp, &pmx_gmii, - &pmx_keyboard, + &pmx_keyboard_6x6, &pmx_mcif, &pmx_nand_8bit, - &pmx_smi_4_chips, - &pmx_ssp, + &pmx_smi_2_chips, &pmx_uart0,/* spear1310 specific devices */ + &pmx_can, + &pmx_i2c1, + &pmx_smii_0_1_2, + &pmx_rs485_hdlc_1_2, + &pmx_tdm_hdlc_1_2, + &pmx_uart_1, + &pmx_uart_2, + &pmx_uart_3_4_5, };static struct amba_device *amba_devs[]__initdata = {/* spear13xx specific devices */ &gpio_device[0 ], &gpio_device[1 ], - &ssp_device, &uart_device, };
arch/arm/mach-spear13xx/spear13xx.c +100 -69
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arch/arm/mach-spear3xx/include/mach/generic.h +9 -3
@@ -149,7 +149,10 @@ extern struct pmx_dev pmx_telecom_boot_pins;extern struct pmx_dev pmx_telecom_sdhci_4bit;extern struct pmx_dev pmx_telecom_sdhci_8bit;extern struct pmx_dev pmx_gpio1; -#define PAD_MUX_CONFIG_REG 0x00 + +/* pad multiplexing support */ +#define PAD_MUX_CONFIG_REG 0x99000000 +#define MODE_CONFIG_REG 0x99000004/* Add spear300 machine function declarations here */ void __init spear300_init (void );
@@ -181,7 +184,7 @@ extern struct pmx_dev pmx_uart3_4_5;extern struct pmx_dev pmx_fsmc;extern struct pmx_dev pmx_rs485_0_1;extern struct pmx_dev pmx_tdm0; -#define PAD_MUX_CONFIG_REG 0x08 +#define PAD_MUX_CONFIG_REG 0xB4000008/* Add spear310 machine function declarations here */ void __init spear310_init (void );
@@ -231,7 +234,10 @@ extern struct pmx_dev pmx_mii1;extern struct pmx_dev pmx_smii0;extern struct pmx_dev pmx_smii1;extern struct pmx_dev pmx_i2c1; -#define PAD_MUX_CONFIG_REG 0x0C + +/* pad multiplexing support */ +#define PAD_MUX_CONFIG_REG 0xB300000C +#define MODE_CONFIG_REG 0xB3000010/* Add spear320 machine function declarations here */ void __init spear320_init (void );
arch/arm/mach-spear3xx/include/mach/spear300.h +0 -1
@@ -45,7 +45,6 @@#define SPEAR300_NOR_2_BASE UL(0x92000000)#define SPEAR300_NOR_3_BASE UL(0x93000000)#define SPEAR300_FSMC_BASE UL(0x94000000) -#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000)#define SPEAR300_KEYBOARD_BASE UL(0xA0000000)#define SPEAR300_GPIO_BASE UL(0xA9000000)
arch/arm/mach-spear3xx/spear300.c +30 -36
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arch/arm/mach-spear3xx/spear310.c +9 -11
@@ -26,7 +26,7 @@/* Pad multiplexing for emi_cs_0_1_4_5 devices */ static struct pmx_mux_reg pmx_emi_cs_0_1_4_5_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_3_4_MASK , .value =0 , },
@@ -48,7 +48,7 @@ struct pmx_dev pmx_emi_cs_0_1_4_5 = {/* Pad multiplexing for emi_cs_2_3 devices */ static struct pmx_mux_reg pmx_emi_cs_2_3_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK , .value =0 , },
@@ -70,7 +70,7 @@ struct pmx_dev pmx_emi_cs_2_3 = {/* Pad multiplexing for uart1 device */ static struct pmx_mux_reg pmx_uart1_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_FIRDA_MASK , .value =0 , },
@@ -92,7 +92,7 @@ struct pmx_dev pmx_uart1 = {/* Pad multiplexing for uart2 device */ static struct pmx_mux_reg pmx_uart2_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK , .value =0 , },
@@ -114,7 +114,7 @@ struct pmx_dev pmx_uart2 = {/* Pad multiplexing for uart3_4_5 devices */ static struct pmx_mux_reg pmx_uart3_4_5_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK , .value =0 , },
@@ -136,7 +136,7 @@ struct pmx_dev pmx_uart3_4_5 = {/* Pad multiplexing for fsmc device */ static struct pmx_mux_reg pmx_fsmc_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_SSP_CS_MASK , .value =0 , },
@@ -158,7 +158,7 @@ struct pmx_dev pmx_fsmc = {/* Pad multiplexing for rs485_0_1 devices */ static struct pmx_mux_reg pmx_rs485_0_1_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -180,7 +180,7 @@ struct pmx_dev pmx_rs485_0_1 = {/* Pad multiplexing for tdm0 device */ static struct pmx_mux_reg pmx_tdm0_mux[] = { { - .offset =PAD_MUX_CONFIG_REG , + .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -535,9 +535,7 @@ void __init spear310_init(void) }/* pmx initialization */ - pmx_driver.base = base; ret =pmx_register (&pmx_driver);if (ret) -printk (KERN_ERR "padmux: registeration failed. err no: %d\n" , - ret); +pr_err ("padmux: registeration failed. err no: %d\n" , ret); }
arch/arm/mach-spear3xx/spear320.c +28 -33
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arch/arm/mach-spear3xx/spear3xx.c +30 -30
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arch/arm/plat-spear/include/plat/padmux.h +4 -6
@@ -19,23 +19,23 @@/* * struct pmx_reg: configuration structure for mode reg and mux reg * -* offset: offset of mode reg +* address: physical address of mode reg * mask: mask of mode reg */ struct pmx_reg { -u32 offset; +u32 address;u32 mask; };/* * struct pmx_mux_reg: configuration structure every group of modes of a device * -* offset: multiplexing register offset +* address: physical address of multiplexing register * mask: mask for supported mode * value: value to be written */ struct pmx_mux_reg { -u32 offset; +u32 address;u32 mask;u32 value; };
@@ -87,14 +87,12 @@ struct pmx_dev {* mode: mode to be set * devs: array of pointer to pmx devices * devs_count: ARRAY_SIZE of devs -* base: base address of soc config registers * mode_reg: structure of mode config register */ struct pmx_driver {struct pmx_mode *mode;struct pmx_dev **devs;u8 devs_count; -u32 *base;struct pmx_reg mode_reg; };
arch/arm/plat-spear/padmux.c +22 -14
@@ -19,12 +19,10 @@/* * struct pmx: pmx definition structure * -* base: base address of configuration registers * mode_reg: mode configurations * active_mode: pointer to current active mode */ struct pmx { -u32 base;struct pmx_reg mode_reg;struct pmx_mode *active_mode; };
@@ -40,17 +38,22 @@ static struct pmx *pmx;*/ static int pmx_mode_set (struct pmx_mode *mode) { -u32 val; +u32 val, *address;if (!mode->name)return -EFAULT ; pmx->active_mode = mode; - val =readl (pmx->base + pmx->mode_reg.offset); - val &= ~pmx->mode_reg.mask; - val |= mode->value & pmx->mode_reg.mask; -writel (val, pmx->base + pmx->mode_reg.offset); + address =ioremap (pmx->mode_reg.address,SZ_16 ); +if (address) { + val =readl (address); + val &= ~pmx->mode_reg.mask; + val |= mode->value & pmx->mode_reg.mask; +writel (val, address); + +iounmap (address); + }return 0 ; }
@@ -70,6 +73,7 @@ static int pmx_mode_set(struct pmx_mode *mode)static int pmx_devs_enable (struct pmx_dev **devs,u8 count) {u32 val, i; +u32 *address;if (!count)return -EINVAL ;
@@ -104,10 +108,15 @@ static int pmx_devs_enable(struct pmx_dev **devs, u8 count)struct pmx_mux_reg *mux_reg = &devs[i]->modes[j].mux_regs[k]; - val =readl (pmx->base + mux_reg->offset); - val &= ~mux_reg->mask; - val |= mux_reg->value & mux_reg->mask; -writel (val, pmx->base + mux_reg->offset); + address =ioremap (mux_reg->address,SZ_16 ); +if (address) { + val =readl (address); + val &= ~mux_reg->mask; + val |= mux_reg->value & mux_reg->mask; +writel (val, address); + +iounmap (address); + } } devs[i]->is_active = true;
@@ -134,15 +143,14 @@ int pmx_register(struct pmx_driver *driver)if (pmx)return -EPERM ; -if (!driver->base || !driver->devs) +if (!driver->devs)return -EFAULT ; pmx =kzalloc (sizeof (*pmx),GFP_KERNEL );if (!pmx)return -ENOMEM ; - pmx->base = (u32 )driver->base; - pmx->mode_reg.offset = driver->mode_reg.offset; + pmx->mode_reg.address = driver->mode_reg.address; pmx->mode_reg.mask = driver->mode_reg.mask;/* choose mode to enable */
Signature · 1 line
1.7.2.2
PATCH 60/74 ST SPEAr3xx: Passing pmx devices address from machine *.c files
In reply to Viresh KUMARAll spear3xx machines have different pad mux register addresses. In order to have single image for all spear3xx boards, we need to pass this address from machine specific files to fix addresses of pmx devs found in spear3xx.c
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/include/mach/generic.h | 11 +++--- arch/arm/mach-spear3xx/spear300.c | 27 +++----------- arch/arm/mach-spear3xx/spear310.c | 11 ++---- arch/arm/mach-spear3xx/spear320.c | 31 ++-------------- arch/arm/mach-spear3xx/spear3xx.c | 48 +++++++++--------------- 5 files changed, 36 insertions(+), 92 deletions(-)
arch/arm/mach-spear3xx/include/mach/generic.h +6 -5
@@ -51,6 +51,7 @@ void __init spear_setup_timer(void);void __init spear3xx_map_io (void );void __init spear3xx_init_irq (void );void __init spear3xx_init (void ); +void spear3xx_pmx_init_addr (struct pmx_driver *driver,unsigned int addr);/* pad mux declarations */ #define PMX_FIRDA_MASK (1 << 14)
@@ -151,8 +152,8 @@ extern struct pmx_dev pmx_telecom_sdhci_8bit;extern struct pmx_dev pmx_gpio1;/* pad multiplexing support */ -#define PAD_MUX_CONFIG_REG 0x99000000 -#define MODE_CONFIG_REG 0x99000004 +#define SPEAR300_PAD_MUX_CONFIG_REG 0x99000000 +#define SPEAR300_MODE_CONFIG_REG 0x99000004/* Add spear300 machine function declarations here */ void __init spear300_init (void );
@@ -184,7 +185,7 @@ extern struct pmx_dev pmx_uart3_4_5;extern struct pmx_dev pmx_fsmc;extern struct pmx_dev pmx_rs485_0_1;extern struct pmx_dev pmx_tdm0; -#define PAD_MUX_CONFIG_REG 0xB4000008 +#define SPEAR310_PAD_MUX_CONFIG_REG 0xB4000008/* Add spear310 machine function declarations here */ void __init spear310_init (void );
@@ -236,8 +237,8 @@ extern struct pmx_dev pmx_smii1;extern struct pmx_dev pmx_i2c1;/* pad multiplexing support */ -#define PAD_MUX_CONFIG_REG 0xB300000C -#define MODE_CONFIG_REG 0xB3000010 +#define SPEAR320_PAD_MUX_CONFIG_REG 0xB300000C +#define SPEAR320_MODE_CONFIG_REG 0xB3000010/* Add spear320 machine function declarations here */ void __init spear320_init (void );
arch/arm/mach-spear3xx/spear300.c +5 -22
@@ -118,7 +118,6 @@ struct pmx_mode caml_lcd_mode = {/* Pad multiplexing for FSMC 2 NAND devices */ static struct pmx_mux_reg pmx_fsmc_2_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_FIRDA_MASK , .value =0 , },
@@ -142,7 +141,6 @@ struct pmx_dev pmx_fsmc_2_chips = {/* Pad multiplexing for FSMC 4 NAND devices */ static struct pmx_mux_reg pmx_fsmc_4_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_FIRDA_MASK |PMX_UART0_MASK , .value =0 , },
@@ -166,7 +164,6 @@ struct pmx_dev pmx_fsmc_4_chips = {/* Pad multiplexing for Keyboard device */ static struct pmx_mux_reg pmx_kbd_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =0x0 , .value =0 , },
@@ -192,7 +189,6 @@ struct pmx_dev pmx_keyboard = {/* Pad multiplexing for CLCD device */ static struct pmx_mux_reg pmx_clcd_pfmode_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK , .value =0 , },
@@ -200,7 +196,6 @@ static struct pmx_mux_reg pmx_clcd_pfmode_mux[] = {static struct pmx_mux_reg pmx_clcd_lcdmode_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_3_4_MASK , .value =0 , },
@@ -228,7 +223,6 @@ struct pmx_dev pmx_clcd = {/* Pad multiplexing for Telecom GPIO device */ static struct pmx_mux_reg pmx_gpio_lcdmode_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -236,7 +230,6 @@ static struct pmx_mux_reg pmx_gpio_lcdmode_mux[] = {static struct pmx_mux_reg pmx_gpio_fonemode_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK |PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK , .value =0 , },
@@ -244,7 +237,6 @@ static struct pmx_mux_reg pmx_gpio_fonemode_mux[] = {static struct pmx_mux_reg pmx_gpio_atai2smode_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK |PMX_TIMER_3_4_MASK , .value =0 , },
@@ -252,7 +244,6 @@ static struct pmx_mux_reg pmx_gpio_atai2smode_mux[] = {static struct pmx_mux_reg pmx_gpio_lendfonemode_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK |PMX_TIMER_1_2_MASK , .value =0 , },
@@ -260,7 +251,6 @@ static struct pmx_mux_reg pmx_gpio_lendfonemode_mux[] = {static struct pmx_mux_reg pmx_gpio_atawi2smode_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK |PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK |PMX_UART0_MODEM_MASK , .value =0 ,
@@ -300,7 +290,6 @@ struct pmx_dev pmx_telecom_gpio = {/* Pad multiplexing for TDM device */ static struct pmx_mux_reg pmx_tdm_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK |PMX_SSP_CS_MASK , .value =0 , },
@@ -327,7 +316,6 @@ struct pmx_dev pmx_telecom_tdm = {/* Pad multiplexing for spi cs i2c device */ static struct pmx_mux_reg pmx_spi_cs_i2c_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK , .value =0 , },
@@ -352,7 +340,6 @@ struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {static struct pmx_mux_reg pmx_caml_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -360,7 +347,6 @@ static struct pmx_mux_reg pmx_caml_mux[] = {static struct pmx_mux_reg pmx_camu_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK |PMX_MII_MASK , .value =0 , },
@@ -387,7 +373,6 @@ struct pmx_dev pmx_telecom_camera = {/* Pad multiplexing for dac device */ static struct pmx_mux_reg pmx_dac_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK , .value =0 , },
@@ -411,7 +396,6 @@ struct pmx_dev pmx_telecom_dac = {/* Pad multiplexing for spi cs i2c device */ static struct pmx_mux_reg pmx_i2s_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK , .value =0 , },
@@ -437,7 +421,6 @@ struct pmx_dev pmx_telecom_i2s = {/* Pad multiplexing for bootpins device */ static struct pmx_mux_reg pmx_bootpins_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK |PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK , .value =0 ,
@@ -461,7 +444,6 @@ struct pmx_dev pmx_telecom_boot_pins = {/* Pad multiplexing for sdhci 4bit device */ static struct pmx_mux_reg pmx_sdhci_4bit_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_GPIO_PIN0_MASK |PMX_GPIO_PIN1_MASK |PMX_GPIO_PIN2_MASK |PMX_GPIO_PIN3_MASK |PMX_GPIO_PIN4_MASK |PMX_GPIO_PIN5_MASK ,
@@ -490,7 +472,6 @@ struct pmx_dev pmx_telecom_sdhci_4bit = {/* Pad multiplexing for spi cs i2c device */ static struct pmx_mux_reg pmx_sdhci_8bit_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_GPIO_PIN0_MASK |PMX_GPIO_PIN1_MASK |PMX_GPIO_PIN2_MASK |PMX_GPIO_PIN3_MASK |PMX_GPIO_PIN4_MASK |PMX_GPIO_PIN5_MASK |PMX_MII_MASK ,
@@ -518,7 +499,6 @@ struct pmx_dev pmx_telecom_sdhci_8bit = {/* Pad multiplexing for spi cs i2c device */ static struct pmx_mux_reg pmx_gpio1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK |PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK , .value =0 ,
@@ -541,7 +521,7 @@ struct pmx_dev pmx_gpio1 = {/* pmx driver structure */ struct pmx_driver pmx_driver = { - .mode_reg = {.address =MODE_CONFIG_REG , .mask =0x0000000f }, + .mode_reg = {.address =SPEAR300_MODE_CONFIG_REG , .mask =0x0000000f }, };/* Add spear300 specific devices here */
@@ -777,7 +757,7 @@ struct spear_shirq shirq_ras1 = {void sdhci_i2s_mem_enable (u8 mask) {u32 val; -void __iomem *config =ioremap (MODE_CONFIG_REG ,SZ_16 ); +void __iomem *config =ioremap (SPEAR300_MODE_CONFIG_REG ,SZ_16 );if (!config) {pr_debug ("sdhci_i2s_enb: ioremap fail\n" );return ;
@@ -809,6 +789,9 @@ void __init spear300_init(void)printk (KERN_ERR "Error registering Shared IRQ\n" ); } +/* This fixes addresses of all pmx devices for spear300 */ +spear3xx_pmx_init_addr (&pmx_driver,SPEAR300_PAD_MUX_CONFIG_REG ); +/* pmx initialization */ ret =pmx_register (&pmx_driver);if (ret)
arch/arm/mach-spear3xx/spear310.c +3 -8
@@ -26,7 +26,6 @@/* Pad multiplexing for emi_cs_0_1_4_5 devices */ static struct pmx_mux_reg pmx_emi_cs_0_1_4_5_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_3_4_MASK , .value =0 , },
@@ -48,7 +47,6 @@ struct pmx_dev pmx_emi_cs_0_1_4_5 = {/* Pad multiplexing for emi_cs_2_3 devices */ static struct pmx_mux_reg pmx_emi_cs_2_3_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK , .value =0 , },
@@ -70,7 +68,6 @@ struct pmx_dev pmx_emi_cs_2_3 = {/* Pad multiplexing for uart1 device */ static struct pmx_mux_reg pmx_uart1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_FIRDA_MASK , .value =0 , },
@@ -92,7 +89,6 @@ struct pmx_dev pmx_uart1 = {/* Pad multiplexing for uart2 device */ static struct pmx_mux_reg pmx_uart2_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK , .value =0 , },
@@ -114,7 +110,6 @@ struct pmx_dev pmx_uart2 = {/* Pad multiplexing for uart3_4_5 devices */ static struct pmx_mux_reg pmx_uart3_4_5_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK , .value =0 , },
@@ -136,7 +131,6 @@ struct pmx_dev pmx_uart3_4_5 = {/* Pad multiplexing for fsmc device */ static struct pmx_mux_reg pmx_fsmc_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_SSP_CS_MASK , .value =0 , },
@@ -158,7 +152,6 @@ struct pmx_dev pmx_fsmc = {/* Pad multiplexing for rs485_0_1 devices */ static struct pmx_mux_reg pmx_rs485_0_1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -180,7 +173,6 @@ struct pmx_dev pmx_rs485_0_1 = {/* Pad multiplexing for tdm0 device */ static struct pmx_mux_reg pmx_tdm0_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -534,6 +526,9 @@ void __init spear310_init(void)printk (KERN_ERR "Error registering Shared IRQ 4\n" ); } +/* This fixes addresses of all pmx devices for spear310 */ +spear3xx_pmx_init_addr (&pmx_driver,SPEAR310_PAD_MUX_CONFIG_REG ); +/* pmx initialization */ ret =pmx_register (&pmx_driver);if (ret)
arch/arm/mach-spear3xx/spear320.c +4 -27
@@ -58,7 +58,6 @@ struct pmx_mode small_printers_mode = {/* Pad multiplexing for CLCD device */ static struct pmx_mux_reg pmx_clcd_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =0x0 , .value =0 , },
@@ -81,7 +80,6 @@ struct pmx_dev pmx_clcd = {/* Pad multiplexing for EMI (Parallel NOR flash) device */ static struct pmx_mux_reg pmx_emi_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK , .value =0 , },
@@ -104,7 +102,6 @@ struct pmx_dev pmx_emi = {/* Pad multiplexing for FSMC (NAND flash) device */ static struct pmx_mux_reg pmx_fsmc_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =0x0 , .value =0 , },
@@ -127,7 +124,6 @@ struct pmx_dev pmx_fsmc = {/* Pad multiplexing for SPP device */ static struct pmx_mux_reg pmx_spp_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =0x0 , .value =0 , },
@@ -150,7 +146,6 @@ struct pmx_dev pmx_spp = {/* Pad multiplexing for SDHCI device */ static struct pmx_mux_reg pmx_sdhci_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK , .value =0 , },
@@ -174,7 +169,6 @@ struct pmx_dev pmx_sdhci = {/* Pad multiplexing for I2S device */ static struct pmx_mux_reg pmx_i2s_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK , .value =0 , },
@@ -197,7 +191,6 @@ struct pmx_dev pmx_i2s = {/* Pad multiplexing for UART1 device */ static struct pmx_mux_reg pmx_uart1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_GPIO_PIN0_MASK |PMX_GPIO_PIN1_MASK , .value =0 , },
@@ -220,7 +213,6 @@ struct pmx_dev pmx_uart1 = {/* Pad multiplexing for UART1 Modem device */ static struct pmx_mux_reg pmx_uart1_modem_autoexp_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_TIMER_1_2_MASK |PMX_TIMER_3_4_MASK |PMX_SSP_CS_MASK , .value =0 ,
@@ -229,7 +221,6 @@ static struct pmx_mux_reg pmx_uart1_modem_autoexp_mux[] = {static struct pmx_mux_reg pmx_uart1_modem_smallpri_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_GPIO_PIN3_MASK |PMX_GPIO_PIN4_MASK |PMX_GPIO_PIN5_MASK |PMX_SSP_CS_MASK , .value =0 ,
@@ -257,7 +248,6 @@ struct pmx_dev pmx_uart1_modem = {/* Pad multiplexing for UART2 device */ static struct pmx_mux_reg pmx_uart2_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_FIRDA_MASK , .value =0 , },
@@ -280,7 +270,6 @@ struct pmx_dev pmx_uart2 = {/* Pad multiplexing for Touchscreen device */ static struct pmx_mux_reg pmx_touchscreen_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_SSP_CS_MASK , .value =0 , },
@@ -303,7 +292,6 @@ struct pmx_dev pmx_touchscreen = {/* Pad multiplexing for CAN device */ static struct pmx_mux_reg pmx_can_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_GPIO_PIN2_MASK |PMX_GPIO_PIN3_MASK |PMX_GPIO_PIN4_MASK |PMX_GPIO_PIN5_MASK , .value =0 ,
@@ -327,7 +315,6 @@ struct pmx_dev pmx_can = {/* Pad multiplexing for SDHCI LED device */ static struct pmx_mux_reg pmx_sdhci_led_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_SSP_CS_MASK , .value =0 , },
@@ -350,7 +337,6 @@ struct pmx_dev pmx_sdhci_led = {/* Pad multiplexing for PWM0 device */ static struct pmx_mux_reg pmx_pwm0_net_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK , .value =0 , },
@@ -358,7 +344,6 @@ static struct pmx_mux_reg pmx_pwm0_net_mux[] = {static struct pmx_mux_reg pmx_pwm0_autoexpsmallpri_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -385,7 +370,6 @@ struct pmx_dev pmx_pwm0 = {/* Pad multiplexing for PWM1 device */ static struct pmx_mux_reg pmx_pwm1_net_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_UART0_MODEM_MASK , .value =0 , },
@@ -393,7 +377,6 @@ static struct pmx_mux_reg pmx_pwm1_net_mux[] = {static struct pmx_mux_reg pmx_pwm1_autoexpsmallpri_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -420,7 +403,6 @@ struct pmx_dev pmx_pwm1 = {/* Pad multiplexing for PWM2 device */ static struct pmx_mux_reg pmx_pwm2_net_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_SSP_CS_MASK , .value =0 , },
@@ -428,7 +410,6 @@ static struct pmx_mux_reg pmx_pwm2_net_mux[] = {static struct pmx_mux_reg pmx_pwm2_autoexpsmallpri_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -455,7 +436,6 @@ struct pmx_dev pmx_pwm2 = {/* Pad multiplexing for PWM3 device */ static struct pmx_mux_reg pmx_pwm3_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -478,7 +458,6 @@ struct pmx_dev pmx_pwm3 = {/* Pad multiplexing for SSP1 device */ static struct pmx_mux_reg pmx_ssp1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -501,7 +480,6 @@ struct pmx_dev pmx_ssp1 = {/* Pad multiplexing for SSP2 device */ static struct pmx_mux_reg pmx_ssp2_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -524,7 +502,6 @@ struct pmx_dev pmx_ssp2 = {/* Pad multiplexing for mii1 device */ static struct pmx_mux_reg pmx_mii1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =0x0 , .value =0 , },
@@ -547,7 +524,6 @@ struct pmx_dev pmx_mii1 = {/* Pad multiplexing for smii0 device */ static struct pmx_mux_reg pmx_smii0_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -570,7 +546,6 @@ struct pmx_dev pmx_smii0 = {/* Pad multiplexing for smii1 device */ static struct pmx_mux_reg pmx_smii1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =PMX_MII_MASK , .value =0 , },
@@ -593,7 +568,6 @@ struct pmx_dev pmx_smii1 = {/* Pad multiplexing for i2c1 device */ static struct pmx_mux_reg pmx_i2c1_mux[] = { { - .address =PAD_MUX_CONFIG_REG , .mask =0x0 , .value =0 , },
@@ -615,7 +589,7 @@ struct pmx_dev pmx_i2c1 = {/* pmx driver structure */ struct pmx_driver pmx_driver = { - .mode_reg = {.address =MODE_CONFIG_REG , .mask =0x00000007 }, + .mode_reg = {.address =SPEAR320_MODE_CONFIG_REG , .mask =0x00000007 }, };/* Add spear320 specific devices here */
@@ -1026,6 +1000,9 @@ void __init spear320_init(void)printk (KERN_ERR "Error registering Shared IRQ 4\n" ); } +/* This fixes addresses of all pmx devices for spear320 */ +spear3xx_pmx_init_addr (&pmx_driver,SPEAR320_PAD_MUX_CONFIG_REG ); +/* pmx initialization */ ret =pmx_register (&pmx_driver);if (ret)
arch/arm/mach-spear3xx/spear3xx.c +18 -30
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Signature · 1 line
1.7.2.2
PATCH 61/74 SPEAr3xx: Make local structres static
In reply to Viresh KUMARFrom: Ryan Mallon <[email protected]>
Several structures in arch/arm/mach-spear3xx are not marked static like they should be. Fix this.
Signed-off-by Ryan Mallon <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/spear300.c | 6 +++--- arch/arm/mach-spear3xx/spear310.c | 16 ++++++++-------- arch/arm/mach-spear3xx/spear320.c | 12 ++++++------ arch/arm/mach-spear3xx/spear3xx.c | 2 -- 4 files changed, 17 insertions(+), 19 deletions(-)
arch/arm/mach-spear3xx/spear300.c +3 -3
@@ -114,7 +114,6 @@ struct pmx_mode caml_lcd_mode = { .value = 0x0F, }; -/* devices */ /* Pad multiplexing for FSMC 2 NAND devices */ static struct pmx_mux_reg pmx_fsmc_2_mux[] = { {
@@ -700,7 +699,7 @@ struct platform_device sdhci_device = { };/* spear3xx shared irq */ -struct shirq_dev_config shirq_ras1_config[] = { +static struct shirq_dev_config shirq_ras1_config[] = { { .virq =VIRQ_IT_PERS_S , .enb_mask =IT_PERS_S_IRQ_MASK ,
@@ -740,7 +739,8 @@ struct shirq_dev_config shirq_ras1_config[] = { }, }; -struct spear_shirq shirq_ras1 = { + +static struct spear_shirq shirq_ras1 = { .irq =IRQ_GEN_RAS_1 , .dev_config = shirq_ras1_config, .dev_count =ARRAY_SIZE (shirq_ras1_config),
arch/arm/mach-spear3xx/spear310.c +8 -8
@@ -374,7 +374,7 @@ struct platform_device plgpio_device = {/* spear3xx shared irq */ -struct shirq_dev_config shirq_ras1_config[] = { +static struct shirq_dev_config shirq_ras1_config[] = { { .virq =VIRQ_SMII0 , .status_mask =SMII0_IRQ_MASK ,
@@ -402,7 +402,7 @@ struct shirq_dev_config shirq_ras1_config[] = { }, }; -struct spear_shirq shirq_ras1 = { +static struct spear_shirq shirq_ras1 = { .irq =IRQ_GEN_RAS_1 , .dev_config = shirq_ras1_config, .dev_count =ARRAY_SIZE (shirq_ras1_config),
@@ -414,7 +414,7 @@ struct spear_shirq shirq_ras1 = { }, }; -struct shirq_dev_config shirq_ras2_config[] = { +static struct shirq_dev_config shirq_ras2_config[] = { { .virq =VIRQ_UART1 , .status_mask =UART1_IRQ_MASK ,
@@ -433,7 +433,7 @@ struct shirq_dev_config shirq_ras2_config[] = { }, }; -struct spear_shirq shirq_ras2 = { +static struct spear_shirq shirq_ras2 = { .irq =IRQ_GEN_RAS_2 , .dev_config = shirq_ras2_config, .dev_count =ARRAY_SIZE (shirq_ras2_config),
@@ -445,14 +445,14 @@ struct spear_shirq shirq_ras2 = { }, }; -struct shirq_dev_config shirq_ras3_config[] = { +static struct shirq_dev_config shirq_ras3_config[] = { { .virq =VIRQ_EMI , .status_mask =EMI_IRQ_MASK , }, }; -struct spear_shirq shirq_ras3 = { +static struct spear_shirq shirq_ras3 = { .irq =IRQ_GEN_RAS_3 , .dev_config = shirq_ras3_config, .dev_count =ARRAY_SIZE (shirq_ras3_config),
@@ -464,7 +464,7 @@ struct spear_shirq shirq_ras3 = { }, }; -struct shirq_dev_config shirq_intrcomm_ras_config[] = { +static struct shirq_dev_config shirq_intrcomm_ras_config[] = { { .virq =VIRQ_TDM_HDLC , .status_mask =TDM_HDLC_IRQ_MASK ,
@@ -477,7 +477,7 @@ struct shirq_dev_config shirq_intrcomm_ras_config[] = { }, }; -struct spear_shirq shirq_intrcomm_ras = { +static struct spear_shirq shirq_intrcomm_ras = { .irq =IRQ_INTRCOMM_RAS_ARM , .dev_config = shirq_intrcomm_ras_config, .dev_count =ARRAY_SIZE (shirq_intrcomm_ras_config),
arch/arm/mach-spear3xx/spear320.c +6 -6
@@ -846,7 +846,7 @@ struct platform_device sdhci_device = { };/* spear3xx shared irq */ -struct shirq_dev_config shirq_ras1_config[] = { +static struct shirq_dev_config shirq_ras1_config[] = { { .virq =VIRQ_EMI , .status_mask =EMI_IRQ_MASK ,
@@ -862,7 +862,7 @@ struct shirq_dev_config shirq_ras1_config[] = { }, }; -struct spear_shirq shirq_ras1 = { +static struct spear_shirq shirq_ras1 = { .irq =IRQ_GEN_RAS_1 , .dev_config = shirq_ras1_config, .dev_count =ARRAY_SIZE (shirq_ras1_config),
@@ -875,7 +875,7 @@ struct spear_shirq shirq_ras1 = { }, }; -struct shirq_dev_config shirq_ras3_config[] = { +static struct shirq_dev_config shirq_ras3_config[] = { { .virq =VIRQ_PLGPIO , .enb_mask =GPIO_IRQ_MASK ,
@@ -894,7 +894,7 @@ struct shirq_dev_config shirq_ras3_config[] = { }, }; -struct spear_shirq shirq_ras3 = { +static struct spear_shirq shirq_ras3 = { .irq =IRQ_GEN_RAS_3 , .dev_config = shirq_ras3_config, .dev_count =ARRAY_SIZE (shirq_ras3_config),
@@ -908,7 +908,7 @@ struct spear_shirq shirq_ras3 = { }, }; -struct shirq_dev_config shirq_intrcomm_ras_config[] = { +static struct shirq_dev_config shirq_intrcomm_ras_config[] = { { .virq =VIRQ_CANU , .status_mask =CAN_U_IRQ_MASK ,
@@ -956,7 +956,7 @@ struct shirq_dev_config shirq_intrcomm_ras_config[] = { }, }; -struct spear_shirq shirq_intrcomm_ras = { +static struct spear_shirq shirq_intrcomm_ras = { .irq =IRQ_INTRCOMM_RAS_ARM , .dev_config = shirq_intrcomm_ras_config, .dev_count =ARRAY_SIZE (shirq_intrcomm_ras_config),
arch/arm/mach-spear3xx/spear3xx.c +0 -2
@@ -292,7 +292,6 @@ void __init spear3xx_map_io(void) }/* pad multiplexing support */ -/* devices */ /* Pad multiplexing for firda device */ static struct pmx_mux_reg pmx_firda_mux[] = {
@@ -625,7 +624,6 @@ struct pmx_dev pmx_timer_1_2 = { }; #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) -/* plgpios devices */ /* Pad multiplexing for plgpio_0_1 devices */ static struct pmx_mux_reg pmx_plgpio_0_1_mux[] = { {
Signature · 1 line
1.7.2.2
PATCH 62/74 SPEAR3xx: Rename register/irq defines to remove naming conflicts
In reply to Viresh KUMARFrom: Ryan Mallon <[email protected]>
Prefix register and irq defintions to remove naming conflicts between the three SPEAr3xx platforms.
Signed-off-by Ryan Mallon <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/include/mach/generic.h | 4 +- arch/arm/mach-spear3xx/include/mach/gpio.h | 3 +- arch/arm/mach-spear3xx/include/mach/irqs.h | 207 ++++++++++++------------ arch/arm/mach-spear3xx/include/mach/spear300.h | 26 ++-- arch/arm/mach-spear3xx/include/mach/spear310.h | 44 +++--- arch/arm/mach-spear3xx/include/mach/spear320.h | 48 +++--- arch/arm/mach-spear3xx/spear300.c | 73 ++++----- arch/arm/mach-spear3xx/spear310.c | 108 ++++++------ arch/arm/mach-spear3xx/spear320.c | 158 +++++++++--------- arch/arm/mach-spear3xx/spear3xx.c | 25 ++-- 10 files changed, 349 insertions(+), 347 deletions(-)
arch/arm/mach-spear3xx/include/mach/generic.h +2 -2
@@ -28,8 +28,8 @@* Following GPT channels will be used as clock source and clockevent */ #define SPEAR_GPT0_BASE SPEAR3XX_ML1_TMR_BASE -#define SPEAR_GPT0_CHAN0_IRQ IRQ_CPU_GPT1_1 -#define SPEAR_GPT0_CHAN1_IRQ IRQ_CPU_GPT1_2 +#define SPEAR_GPT0_CHAN0_IRQ SPEAR3XX_IRQ_CPU_GPT1_1 +#define SPEAR_GPT0_CHAN1_IRQ SPEAR3XX_IRQ_CPU_GPT1_2/* Add spear3xx family device structure declarations here */ extern struct amba_device gpio_device;
arch/arm/mach-spear3xx/include/mach/gpio.h +2 -1
@@ -51,8 +51,9 @@#define RAS_GPIO_5 13#define RAS_GPIO_6 14#define RAS_GPIO_7 15 +#endif -#elif defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 ) +#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 )#define PLGPIO_0 8#define PLGPIO_1 9#define PLGPIO_2 10
arch/arm/mach-spear3xx/include/mach/irqs.h +104 -103
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arch/arm/mach-spear3xx/include/mach/spear300.h +13 -13
@@ -20,19 +20,19 @@#define SPEAR300_TELECOM_BASE UL(0x50000000)/* Interrupt registers offsets and masks */ -#define INT_ENB_MASK_REG 0x54 -#define INT_STS_MASK_REG 0x58 -#define IT_PERS_S_IRQ_MASK (1 << 0) -#define IT_CHANGE_S_IRQ_MASK (1 << 1) -#define I2S_IRQ_MASK (1 << 2) -#define TDM_IRQ_MASK (1 << 3) -#define CAMERA_L_IRQ_MASK (1 << 4) -#define CAMERA_F_IRQ_MASK (1 << 5) -#define CAMERA_V_IRQ_MASK (1 << 6) -#define KEYBOARD_IRQ_MASK (1 << 7) -#define GPIO1_IRQ_MASK (1 << 8) - -#define SHIRQ_RAS1_MASK 0x1FF +#define SPEAR300_INT_ENB_MASK_REG 0x54 +#define SPEAR300_INT_STS_MASK_REG 0x58 +#define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0) +#define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1) +#define SPEAR300_I2S_IRQ_MASK (1 << 2) +#define SPEAR300_TDM_IRQ_MASK (1 << 3) +#define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4) +#define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5) +#define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6) +#define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7) +#define SPEAR300_GPIO1_IRQ_MASK (1 << 8) + +#define SPEAR300_SHIRQ_RAS1_MASK 0x1FF#define SPEAR300_CLCD_BASE UL(0x60000000)#define SPEAR300_SDHCI_BASE UL(0x70000000)
arch/arm/mach-spear3xx/include/mach/spear310.h +22 -22
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arch/arm/mach-spear3xx/include/mach/spear320.h +24 -24
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arch/arm/mach-spear3xx/spear300.c +36 -37
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arch/arm/mach-spear3xx/spear310.c +54 -54
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arch/arm/mach-spear3xx/spear320.c +79 -79
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arch/arm/mach-spear3xx/spear3xx.c +13 -12
@@ -22,13 +22,14 @@#include <mach/generic.h> #include <mach/spear.h> -#define SPEAR3XX_WKUP_SRCS (1 << IRQ_MAC_1 | 1 << IRQ_USB_DEV | \ - 1 << IRQ_BASIC_RTC | 1 << IRQ_BASIC_GPIO) +#define SPEAR3XX_WKUP_SRCS (1 << SPEAR3XX_IRQ_MAC_1 | 1 << \ + SPEAR3XX_IRQ_USB_DEV | 1 << SPEAR3XX_IRQ_BASIC_RTC | 1 << \ + SPEAR3XX_IRQ_BASIC_GPIO)/* Add spear3xx machines common devices here */ /* gpio device registeration */ static struct pl061_platform_data gpio_plat_data = { .gpio_base =0 , - .irq_base =SPEAR_GPIO_INT_BASE , + .irq_base =SPEAR3XX_GPIO_INT_BASE , };struct amba_device gpio_device = {
@@ -41,7 +42,7 @@ struct amba_device gpio_device = { .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_BASIC_GPIO, NO_IRQ}, + .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ}, };/* ssp device registeration */
@@ -71,7 +72,7 @@ struct amba_device ssp0_device = { .end = SPEAR3XX_ICM1_SSP_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_SSP, NO_IRQ}, + .irq = {SPEAR3XX_IRQ_SSP, NO_IRQ}, };/* uart device registeration */
@@ -84,7 +85,7 @@ struct amba_device uart_device = { .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_UART, NO_IRQ}, + .irq = {SPEAR3XX_IRQ_UART, NO_IRQ}, };/* watchdog device registeration */
@@ -106,7 +107,7 @@ static struct resource i2c_resources[] = { .end = SPEAR3XX_ICM1_I2C_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { - .start = IRQ_I2C, + .start = SPEAR3XX_IRQ_I2C, .flags = IORESOURCE_IRQ, }, };
@@ -129,7 +130,7 @@ static struct resource ehci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_USB_H_EHCI_0, + .start = SPEAR3XX_IRQ_USB_H_EHCI_0, .flags = IORESOURCE_IRQ, }, };
@@ -141,7 +142,7 @@ static struct resource ohci0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_USB_H_OHCI_0, + .start = SPEAR3XX_IRQ_USB_H_OHCI_0, .flags = IORESOURCE_IRQ, }, };
@@ -153,7 +154,7 @@ static struct resource ohci1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_USB_H_OHCI_1, + .start = SPEAR3XX_IRQ_USB_H_OHCI_1, .flags = IORESOURCE_IRQ, }, };
@@ -208,7 +209,7 @@ static struct resource rtc_resources[] = { .end = SPEAR3XX_ICM3_RTC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { - .start = IRQ_BASIC_RTC, + .start = SPEAR3XX_IRQ_BASIC_RTC, .flags = IORESOURCE_IRQ, }, };
@@ -227,7 +228,7 @@ static struct resource smi_resources[] = { .end = SPEAR3XX_ICM3_SMI_CTRL_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { - .start = IRQ_BASIC_SMI, + .start = SPEAR3XX_IRQ_BASIC_SMI, .flags = IORESOURCE_IRQ, }, };
Signature · 1 line
1.7.2.2
PATCH 63/74 SPEAr3xx: Rework pmx_dev code to remove conflicts
In reply to Viresh KUMARFrom: Ryan Mallon <[email protected]>
Prefix the pmx_devs to remove naming conflicts between the three SPEAr3xx platforms. Also make pmx_driver static to each platform and rework the init code to pass the devices rather than export the pmx_driver structure.
Signed-off-by Ryan Mallon <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/include/mach/generic.h | 129 +++++++++++++------------ arch/arm/mach-spear3xx/spear300.c | 40 ++++---- arch/arm/mach-spear3xx/spear300_evb.c | 25 ++--- arch/arm/mach-spear3xx/spear310.c | 28 +++--- arch/arm/mach-spear3xx/spear310_evb.c | 41 ++++----- arch/arm/mach-spear3xx/spear320.c | 56 ++++++----- arch/arm/mach-spear3xx/spear320_evb.c | 35 +++---- arch/arm/mach-spear3xx/spear3xx.c | 60 ++++++------ 8 files changed, 206 insertions(+), 208 deletions(-)
arch/arm/mach-spear3xx/include/mach/generic.h +65 -64
@@ -71,21 +71,21 @@ void spear3xx_pmx_init_addr(struct pmx_driver *driver, unsigned int addr);#define PMX_TIMER_1_2_MASK (1 << 0)/* pad mux devices */ -extern struct pmx_dev pmx_firda; -extern struct pmx_dev pmx_i2c; -extern struct pmx_dev pmx_ssp_cs; -extern struct pmx_dev pmx_ssp; -extern struct pmx_dev pmx_mii; -extern struct pmx_dev pmx_gpio_pin0; -extern struct pmx_dev pmx_gpio_pin1; -extern struct pmx_dev pmx_gpio_pin2; -extern struct pmx_dev pmx_gpio_pin3; -extern struct pmx_dev pmx_gpio_pin4; -extern struct pmx_dev pmx_gpio_pin5; -extern struct pmx_dev pmx_uart0_modem; -extern struct pmx_dev pmx_uart0; -extern struct pmx_dev pmx_timer_3_4; -extern struct pmx_dev pmx_timer_1_2; +extern struct pmx_dev spear3xx_pmx_firda; +extern struct pmx_dev spear3xx_pmx_i2c; +extern struct pmx_dev spear3xx_pmx_ssp_cs; +extern struct pmx_dev spear3xx_pmx_ssp; +extern struct pmx_dev spear3xx_pmx_mii; +extern struct pmx_dev spear3xx_pmx_gpio_pin0; +extern struct pmx_dev spear3xx_pmx_gpio_pin1; +extern struct pmx_dev spear3xx_pmx_gpio_pin2; +extern struct pmx_dev spear3xx_pmx_gpio_pin3; +extern struct pmx_dev spear3xx_pmx_gpio_pin4; +extern struct pmx_dev spear3xx_pmx_gpio_pin5; +extern struct pmx_dev spear3xx_pmx_uart0_modem; +extern struct pmx_dev spear3xx_pmx_uart0; +extern struct pmx_dev spear3xx_pmx_timer_3_4; +extern struct pmx_dev spear3xx_pmx_timer_1_2;#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 )/* padmux plgpio devices */
@@ -106,8 +106,6 @@ extern struct pmx_dev pmx_plgpio_43_44_47_48;extern struct pmx_dev pmx_plgpio_45_46_49_50;#endif -extern struct pmx_driver pmx_driver; -/* spear300 declarations */ #ifdef CONFIG_MACH_SPEAR300 /* Add spear300 machine device structure declarations here */
@@ -136,27 +134,28 @@ extern struct pmx_mode camu_wlcd_mode;extern struct pmx_mode caml_lcd_mode;/* pad mux devices */ -extern struct pmx_dev pmx_fsmc_2_chips; -extern struct pmx_dev pmx_fsmc_4_chips; -extern struct pmx_dev pmx_keyboard; -extern struct pmx_dev pmx_clcd; -extern struct pmx_dev pmx_telecom_gpio; -extern struct pmx_dev pmx_telecom_tdm; -extern struct pmx_dev pmx_telecom_spi_cs_i2c_clk; -extern struct pmx_dev pmx_telecom_camera; -extern struct pmx_dev pmx_telecom_dac; -extern struct pmx_dev pmx_telecom_i2s; -extern struct pmx_dev pmx_telecom_boot_pins; -extern struct pmx_dev pmx_telecom_sdhci_4bit; -extern struct pmx_dev pmx_telecom_sdhci_8bit; -extern struct pmx_dev pmx_gpio1; +extern struct pmx_dev spear300_pmx_fsmc_2_chips; +extern struct pmx_dev spear300_pmx_fsmc_4_chips; +extern struct pmx_dev spear300_pmx_keyboard; +extern struct pmx_dev spear300_pmx_clcd; +extern struct pmx_dev spear300_pmx_telecom_gpio; +extern struct pmx_dev spear300_pmx_telecom_tdm; +extern struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk; +extern struct pmx_dev spear300_pmx_telecom_camera; +extern struct pmx_dev spear300_pmx_telecom_dac; +extern struct pmx_dev spear300_pmx_telecom_i2s; +extern struct pmx_dev spear300_pmx_telecom_boot_pins; +extern struct pmx_dev spear300_pmx_telecom_sdhci_4bit; +extern struct pmx_dev spear300_pmx_telecom_sdhci_8bit; +extern struct pmx_dev spear300_pmx_gpio1;/* pad multiplexing support */ #define SPEAR300_PAD_MUX_CONFIG_REG 0x99000000#define SPEAR300_MODE_CONFIG_REG 0x99000004/* Add spear300 machine function declarations here */ -void __init spear300_init (void ); +void __init spear300_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs, +u8 pmx_dev_count);#define SDHCI_MEM_ENB 0x1#define I2S_MEM_ENB 0x2void sdhci_i2s_mem_enable (u8 mask);
@@ -177,18 +176,19 @@ extern struct platform_device plgpio_device;extern struct platform_device nand_device;/* pad mux devices */ -extern struct pmx_dev pmx_emi_cs_0_1_4_5; -extern struct pmx_dev pmx_emi_cs_2_3; -extern struct pmx_dev pmx_uart1; -extern struct pmx_dev pmx_uart2; -extern struct pmx_dev pmx_uart3_4_5; -extern struct pmx_dev pmx_fsmc; -extern struct pmx_dev pmx_rs485_0_1; -extern struct pmx_dev pmx_tdm0; +extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5; +extern struct pmx_dev spear310_pmx_emi_cs_2_3; +extern struct pmx_dev spear310_pmx_uart1; +extern struct pmx_dev spear310_pmx_uart2; +extern struct pmx_dev spear310_pmx_uart3_4_5; +extern struct pmx_dev spear310_pmx_fsmc; +extern struct pmx_dev spear310_pmx_rs485_0_1; +extern struct pmx_dev spear310_pmx_tdm0;#define SPEAR310_PAD_MUX_CONFIG_REG 0xB4000008/* Add spear310 machine function declarations here */ -void __init spear310_init (void ); +void __init spear310_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs, +u8 pmx_dev_count);/* spear320 declarations */ #elif defined(CONFIG_MACH_SPEAR320 )
@@ -213,35 +213,36 @@ extern struct pmx_mode auto_exp_mode;extern struct pmx_mode small_printers_mode;/* pad mux devices */ -extern struct pmx_dev pmx_clcd; -extern struct pmx_dev pmx_emi; -extern struct pmx_dev pmx_fsmc; -extern struct pmx_dev pmx_spp; -extern struct pmx_dev pmx_sdhci; -extern struct pmx_dev pmx_i2s; -extern struct pmx_dev pmx_uart1; -extern struct pmx_dev pmx_uart1_modem; -extern struct pmx_dev pmx_uart2; -extern struct pmx_dev pmx_touchscreen; -extern struct pmx_dev pmx_can; -extern struct pmx_dev pmx_sdhci_led; -extern struct pmx_dev pmx_pwm0; -extern struct pmx_dev pmx_pwm1; -extern struct pmx_dev pmx_pwm2; -extern struct pmx_dev pmx_pwm3; -extern struct pmx_dev pmx_ssp1; -extern struct pmx_dev pmx_ssp2; -extern struct pmx_dev pmx_mii1; -extern struct pmx_dev pmx_smii0; -extern struct pmx_dev pmx_smii1; -extern struct pmx_dev pmx_i2c1; +extern struct pmx_dev spear320_pmx_clcd; +extern struct pmx_dev spear320_pmx_emi; +extern struct pmx_dev spear320_pmx_fsmc; +extern struct pmx_dev spear320_pmx_spp; +extern struct pmx_dev spear320_pmx_sdhci; +extern struct pmx_dev spear320_pmx_i2s; +extern struct pmx_dev spear320_pmx_uart1; +extern struct pmx_dev spear320_pmx_uart1_modem; +extern struct pmx_dev spear320_pmx_uart2; +extern struct pmx_dev spear320_pmx_touchscreen; +extern struct pmx_dev spear320_pmx_can; +extern struct pmx_dev spear320_pmx_sdhci_led; +extern struct pmx_dev spear320_pmx_pwm0; +extern struct pmx_dev spear320_pmx_pwm1; +extern struct pmx_dev spear320_pmx_pwm2; +extern struct pmx_dev spear320_pmx_pwm3; +extern struct pmx_dev spear320_pmx_ssp1; +extern struct pmx_dev spear320_pmx_ssp2; +extern struct pmx_dev spear320_pmx_mii1; +extern struct pmx_dev spear320_pmx_smii0; +extern struct pmx_dev spear320_pmx_smii1; +extern struct pmx_dev spear320_pmx_i2c1;/* pad multiplexing support */ #define SPEAR320_PAD_MUX_CONFIG_REG 0xB300000C#define SPEAR320_MODE_CONFIG_REG 0xB3000010/* Add spear320 machine function declarations here */ -void __init spear320_init (void ); +void __init spear320_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs, +u8 pmx_dev_count);/* Add misc structure declarations here */ extern struct clcd_board clcd_plat_data;
arch/arm/mach-spear3xx/spear300.c +22 -18
@@ -131,7 +131,7 @@ static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = { }, }; -struct pmx_dev pmx_fsmc_2_chips = { +struct pmx_dev spear300_pmx_fsmc_2_chips = { .name ="fsmc_2_chips" , .modes = pmx_fsmc_2_chips_modes, .mode_count =ARRAY_SIZE (pmx_fsmc_2_chips_modes),
@@ -154,7 +154,7 @@ static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = { }, }; -struct pmx_dev pmx_fsmc_4_chips = { +struct pmx_dev spear300_pmx_fsmc_4_chips = { .name ="fsmc_4_chips" , .modes = pmx_fsmc_4_chips_modes, .mode_count =ARRAY_SIZE (pmx_fsmc_4_chips_modes),
@@ -179,7 +179,7 @@ static struct pmx_dev_mode pmx_keyboard_modes[] = { }, }; -struct pmx_dev pmx_keyboard = { +struct pmx_dev spear300_pmx_keyboard = { .name ="keyboard" , .modes = pmx_keyboard_modes, .mode_count =ARRAY_SIZE (pmx_keyboard_modes),
@@ -213,7 +213,7 @@ static struct pmx_dev_mode pmx_clcd_modes[] = { }, }; -struct pmx_dev pmx_clcd = { +struct pmx_dev spear300_pmx_clcd = { .name ="clcd" , .modes = pmx_clcd_modes, .mode_count =ARRAY_SIZE (pmx_clcd_modes),
@@ -280,7 +280,7 @@ static struct pmx_dev_mode pmx_telecom_gpio_modes[] = { }, }; -struct pmx_dev pmx_telecom_gpio = { +struct pmx_dev spear300_pmx_telecom_gpio = { .name ="telecom_gpio" , .modes = pmx_telecom_gpio_modes, .mode_count =ARRAY_SIZE (pmx_telecom_gpio_modes),
@@ -306,7 +306,7 @@ static struct pmx_dev_mode pmx_telecom_tdm_modes[] = { }, }; -struct pmx_dev pmx_telecom_tdm = { +struct pmx_dev spear300_pmx_telecom_tdm = { .name ="telecom_tdm" , .modes = pmx_telecom_tdm_modes, .mode_count =ARRAY_SIZE (pmx_telecom_tdm_modes),
@@ -331,7 +331,7 @@ static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = { }, }; -struct pmx_dev pmx_telecom_spi_cs_i2c_clk = { +struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = { .name ="telecom_spi_cs_i2c_clk" , .modes = pmx_telecom_spi_cs_i2c_clk_modes, .mode_count =ARRAY_SIZE (pmx_telecom_spi_cs_i2c_clk_modes),
@@ -363,7 +363,7 @@ static struct pmx_dev_mode pmx_telecom_camera_modes[] = { }, }; -struct pmx_dev pmx_telecom_camera = { +struct pmx_dev spear300_pmx_telecom_camera = { .name ="telecom_camera" , .modes = pmx_telecom_camera_modes, .mode_count =ARRAY_SIZE (pmx_telecom_camera_modes),
@@ -386,7 +386,7 @@ static struct pmx_dev_mode pmx_telecom_dac_modes[] = { }, }; -struct pmx_dev pmx_telecom_dac = { +struct pmx_dev spear300_pmx_telecom_dac = { .name ="telecom_dac" , .modes = pmx_telecom_dac_modes, .mode_count =ARRAY_SIZE (pmx_telecom_dac_modes),
@@ -411,7 +411,7 @@ static struct pmx_dev_mode pmx_telecom_i2s_modes[] = { }, }; -struct pmx_dev pmx_telecom_i2s = { +struct pmx_dev spear300_pmx_telecom_i2s = { .name ="telecom_i2s" , .modes = pmx_telecom_i2s_modes, .mode_count =ARRAY_SIZE (pmx_telecom_i2s_modes),
@@ -434,7 +434,7 @@ static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = { }, }; -struct pmx_dev pmx_telecom_boot_pins = { +struct pmx_dev spear300_pmx_telecom_boot_pins = { .name ="telecom_boot_pins" , .modes = pmx_telecom_boot_pins_modes, .mode_count =ARRAY_SIZE (pmx_telecom_boot_pins_modes),
@@ -462,7 +462,7 @@ static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = { }, }; -struct pmx_dev pmx_telecom_sdhci_4bit = { +struct pmx_dev spear300_pmx_telecom_sdhci_4bit = { .name ="telecom_sdhci_4bit" , .modes = pmx_telecom_sdhci_4bit_modes, .mode_count =ARRAY_SIZE (pmx_telecom_sdhci_4bit_modes),
@@ -489,7 +489,7 @@ static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = { }, }; -struct pmx_dev pmx_telecom_sdhci_8bit = { +struct pmx_dev spear300_pmx_telecom_sdhci_8bit = { .name ="telecom_sdhci_8bit" , .modes = pmx_telecom_sdhci_8bit_modes, .mode_count =ARRAY_SIZE (pmx_telecom_sdhci_8bit_modes),
@@ -512,14 +512,14 @@ static struct pmx_dev_mode pmx_gpio1_modes[] = { }, }; -struct pmx_dev pmx_gpio1 = { +struct pmx_dev spear300_pmx_gpio1 = { .name ="arm gpio1" , .modes = pmx_gpio1_modes, .mode_count =ARRAY_SIZE (pmx_gpio1_modes), };/* pmx driver structure */ -struct pmx_driver pmx_driver = { +static struct pmx_driver pmx_driver = { .mode_reg = {.address =SPEAR300_MODE_CONFIG_REG , .mask =0x0000000f }, };
@@ -773,7 +773,8 @@ void sdhci_i2s_mem_enable(u8 mask) }/* spear300 routines */ -void __init spear300_init (void ) +void __init spear300_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs, +u8 pmx_dev_count) {int ret =0 ;
@@ -788,10 +789,13 @@ void __init spear300_init(void)printk (KERN_ERR "Error registering Shared IRQ\n" ); } +/* pmx initialization */ + pmx_driver.mode = pmx_mode; + pmx_driver.devs = pmx_devs; + pmx_driver.devs_count = pmx_dev_count; +/* This fixes addresses of all pmx devices for spear300 */ spear3xx_pmx_init_addr (&pmx_driver,SPEAR300_PAD_MUX_CONFIG_REG ); - -/* pmx initialization */ ret =pmx_register (&pmx_driver);if (ret)pr_err ("padmux: registeration failed. err no: %d\n" , ret);
arch/arm/mach-spear3xx/spear300_evb.c +10 -15
@@ -28,17 +28,17 @@/* padmux devices to enable */ static struct pmx_dev *pmx_devs[] = {/* spear3xx specific devices */ - &pmx_i2c, - &pmx_ssp_cs, - &pmx_ssp, - &pmx_mii, - &pmx_uart0, + &spear3xx_pmx_i2c, + &spear3xx_pmx_ssp_cs, + &spear3xx_pmx_ssp, + &spear3xx_pmx_mii, + &spear3xx_pmx_uart0,/* spear300 specific devices */ - &pmx_fsmc_2_chips, - &pmx_clcd, - &pmx_telecom_sdhci_4bit, - &pmx_gpio1, + &spear300_pmx_fsmc_2_chips, + &spear300_pmx_clcd, + &spear300_pmx_telecom_sdhci_4bit, + &spear300_pmx_gpio1, };static struct amba_device *amba_devs[]__initdata = {
@@ -130,11 +130,6 @@ static void __init spi_init(void)static void __init spear300_evb_init (void ) { -/* padmux initialization, must be done before spear300_init */ - pmx_driver.mode = &photo_frame_mode; - pmx_driver.devs = pmx_devs; - pmx_driver.devs_count =ARRAY_SIZE (pmx_devs); -/* set keyboard plat data */ kbd_set_plat_data (&kbd_device, &kbd_data);
@@ -149,7 +144,7 @@ static void __init spear300_evb_init(void)sdhci_i2s_mem_enable (SDHCI_MEM_ENB );/* call spear300 machine init function */ -spear300_init (); +spear300_init (&photo_frame_mode, pmx_devs,ARRAY_SIZE (pmx_devs));/* Register slave devices on the I2C buses */ i2c_register_board_devices ();
arch/arm/mach-spear3xx/spear310.c +16 -12
@@ -38,7 +38,7 @@ static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = { }, }; -struct pmx_dev pmx_emi_cs_0_1_4_5 = { +struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = { .name ="emi_cs_0_1_4_5" , .modes = pmx_emi_cs_0_1_4_5_modes, .mode_count =ARRAY_SIZE (pmx_emi_cs_0_1_4_5_modes),
@@ -59,7 +59,7 @@ static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = { }, }; -struct pmx_dev pmx_emi_cs_2_3 = { +struct pmx_dev spear310_pmx_emi_cs_2_3 = { .name ="emi_cs_2_3" , .modes = pmx_emi_cs_2_3_modes, .mode_count =ARRAY_SIZE (pmx_emi_cs_2_3_modes),
@@ -80,7 +80,7 @@ static struct pmx_dev_mode pmx_uart1_modes[] = { }, }; -struct pmx_dev pmx_uart1 = { +struct pmx_dev spear310_pmx_uart1 = { .name ="uart1" , .modes = pmx_uart1_modes, .mode_count =ARRAY_SIZE (pmx_uart1_modes),
@@ -101,7 +101,7 @@ static struct pmx_dev_mode pmx_uart2_modes[] = { }, }; -struct pmx_dev pmx_uart2 = { +struct pmx_dev spear310_pmx_uart2 = { .name ="uart2" , .modes = pmx_uart2_modes, .mode_count =ARRAY_SIZE (pmx_uart2_modes),
@@ -122,7 +122,7 @@ static struct pmx_dev_mode pmx_uart3_4_5_modes[] = { }, }; -struct pmx_dev pmx_uart3_4_5 = { +struct pmx_dev spear310_pmx_uart3_4_5 = { .name ="uart3_4_5" , .modes = pmx_uart3_4_5_modes, .mode_count =ARRAY_SIZE (pmx_uart3_4_5_modes),
@@ -143,7 +143,7 @@ static struct pmx_dev_mode pmx_fsmc_modes[] = { }, }; -struct pmx_dev pmx_fsmc = { +struct pmx_dev spear310_pmx_fsmc = { .name ="fsmc" , .modes = pmx_fsmc_modes, .mode_count =ARRAY_SIZE (pmx_fsmc_modes),
@@ -164,7 +164,7 @@ static struct pmx_dev_mode pmx_rs485_0_1_modes[] = { }, }; -struct pmx_dev pmx_rs485_0_1 = { +struct pmx_dev spear310_pmx_rs485_0_1 = { .name ="rs485_0_1" , .modes = pmx_rs485_0_1_modes, .mode_count =ARRAY_SIZE (pmx_rs485_0_1_modes),
@@ -185,14 +185,14 @@ static struct pmx_dev_mode pmx_tdm0_modes[] = { }, }; -struct pmx_dev pmx_tdm0 = { +struct pmx_dev spear310_pmx_tdm0 = { .name ="tdm0" , .modes = pmx_tdm0_modes, .mode_count =ARRAY_SIZE (pmx_tdm0_modes), };/* pmx driver structure */ -struct pmx_driver pmx_driver; +static struct pmx_driver pmx_driver;/* Add spear310 specific devices here */ /* uart1 device registeration */
@@ -490,7 +490,8 @@ static struct spear_shirq shirq_intrcomm_ras = { };/* spear310 routines */ -void __init spear310_init (void ) +void __init spear310_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs, +u8 pmx_dev_count) {void __iomem *base;int ret =0 ;
@@ -526,10 +527,13 @@ void __init spear310_init(void)printk (KERN_ERR "Error registering Shared IRQ 4\n" ); } +/* pmx initialization */ + pmx_driver.mode = pmx_mode; + pmx_driver.devs = pmx_devs; + pmx_driver.devs_count = pmx_dev_count; +/* This fixes addresses of all pmx devices for spear310 */ spear3xx_pmx_init_addr (&pmx_driver,SPEAR310_PAD_MUX_CONFIG_REG ); - -/* pmx initialization */ ret =pmx_register (&pmx_driver);if (ret)pr_err ("padmux: registeration failed. err no: %d\n" , ret);
arch/arm/mach-spear3xx/spear310_evb.c +18 -23
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arch/arm/mach-spear3xx/spear320.c +30 -26
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arch/arm/mach-spear3xx/spear320_evb.c +15 -20
@@ -37,22 +37,22 @@ static struct mtd_partition partition_info[] = {/* padmux devices to enable */ static struct pmx_dev *pmx_devs[] = {/* spear3xx specific devices */ - &pmx_i2c, - &pmx_ssp, - &pmx_mii, - &pmx_uart0, + &spear3xx_pmx_i2c, + &spear3xx_pmx_ssp, + &spear3xx_pmx_mii, + &spear3xx_pmx_uart0,/* spear320 specific devices */ - &pmx_fsmc, - &pmx_sdhci, - &pmx_i2s, - &pmx_uart1, - &pmx_uart2, - &pmx_can, - &pmx_pwm0, - &pmx_pwm1, - &pmx_pwm2, - &pmx_mii1, + &spear320_pmx_fsmc, + &spear320_pmx_sdhci, + &spear320_pmx_i2s, + &spear320_pmx_uart1, + &spear320_pmx_uart2, + &spear320_pmx_can, + &spear320_pmx_pwm0, + &spear320_pmx_pwm1, + &spear320_pmx_pwm2, + &spear320_pmx_mii1, };static struct amba_device *amba_devs[]__initdata = {
@@ -137,17 +137,12 @@ static void __init spear320_evb_init(void)/* set sdhci device platform data */ sdhci_set_plat_data (&sdhci_device, &sdhci_plat_data); -/* padmux initialization, must be done before spear320_init */ - pmx_driver.mode = &auto_net_mii_mode; - pmx_driver.devs = pmx_devs; - pmx_driver.devs_count =ARRAY_SIZE (pmx_devs); -/* set nand device's plat data */ nand_set_plat_data (&nand_device,NULL ,0 ,NAND_SKIP_BBTSCAN ,SPEAR_NAND_BW8 );/* call spear320 machine init function */ -spear320_init (); +spear320_init (&auto_net_mii_mode, pmx_devs,ARRAY_SIZE (pmx_devs));/* initialize serial nor related data in smi plat data */ smi_init_board_info (&smi_device);
arch/arm/mach-spear3xx/spear3xx.c +30 -30
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Signature · 1 line
1.7.2.2
PATCH 64/74 SPEAr3xx: Rework KConfig to allow all boards to be compiled in
In reply to Viresh KUMARFrom: Ryan Mallon <[email protected]>
Now that all three SPEAr3xx platforms can be built into one kernel, rework KConfig to allow this. Move everything into one KConfig file while we are here.
Signed-off-by Ryan Mallon <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/Kconfig | 30 ++++++++++++++++-------- arch/arm/mach-spear3xx/Kconfig300 | 17 -------------- arch/arm/mach-spear3xx/Kconfig310 | 17 -------------- arch/arm/mach-spear3xx/Kconfig320 | 17 -------------- arch/arm/mach-spear3xx/include/mach/generic.h | 6 +++- 5 files changed, 24 insertions(+), 63 deletions(-) delete mode 100644 arch/arm/mach-spear3xx/Kconfig300 delete mode 100644 arch/arm/mach-spear3xx/Kconfig310 delete mode 100644 arch/arm/mach-spear3xx/Kconfig320
arch/arm/mach-spear3xx/Kconfig +20 -10
@@ -4,9 +4,26 @@ if ARCH_SPEAR3XX -choice - prompt "SPEAr3XX Family" - default MACH_SPEAR300 +menu "SPEAr3xx Implementations" +config BOARD_SPEAR300_EVB + bool "SPEAr300 Evaluation Board" + select MACH_SPEAR300 + help + Supports ST SPEAr300 Evaluation Board + +config BOARD_SPEAR310_EVB + bool "SPEAr310 Evaluation Board" + select MACH_SPEAR310 + help + Supports ST SPEAr310 Evaluation Board + +config BOARD_SPEAR320_EVB + bool "SPEAr320 Evaluation Board" + select MACH_SPEAR320 + help + Supports ST SPEAr320 Evaluation Board + +endmenu config MACH_SPEAR300 bool "SPEAr300"
@@ -23,11 +40,4 @@ config MACH_SPEAR320 help Supports ST SPEAr320 Machine -endchoice - -# Adding SPEAr3XX machine specific configuration files -source "arch/arm/mach-spear3xx/Kconfig300" -source "arch/arm/mach-spear3xx/Kconfig310" -source "arch/arm/mach-spear3xx/Kconfig320" - endif #ARCH_SPEAR3XX
arch/arm/mach-spear3xx/Kconfig300 deleted +0 -17
@@ -1,17 +0,0 @@ -# -# SPEAr300 machine configuration file -# - -if MACH_SPEAR300 - -choice - prompt "SPEAr300 Boards" - default BOARD_SPEAR300_EVB - -config BOARD_SPEAR300_EVB - bool "SPEAr300 Evaluation Board" - help - Supports ST SPEAr300 Evaluation Board -endchoice - -endif #MACH_SPEAR300
arch/arm/mach-spear3xx/Kconfig310 deleted +0 -17
@@ -1,17 +0,0 @@ -# -# SPEAr310 machine configuration file -# - -if MACH_SPEAR310 - -choice - prompt "SPEAr310 Boards" - default BOARD_SPEAR310_EVB - -config BOARD_SPEAR310_EVB - bool "SPEAr310 Evaluation Board" - help - Supports ST SPEAr310 Evaluation Board -endchoice - -endif #MACH_SPEAR310
arch/arm/mach-spear3xx/Kconfig320 deleted +0 -17
@@ -1,17 +0,0 @@ -# -# SPEAr320 machine configuration file -# - -if MACH_SPEAR320 - -choice - prompt "SPEAr320 Boards" - default BOARD_SPEAR320_EVB - -config BOARD_SPEAR320_EVB - bool "SPEAr320 Evaluation Board" - help - Supports ST SPEAr320 Evaluation Board -endchoice - -endif #MACH_SPEAR320
arch/arm/mach-spear3xx/include/mach/generic.h +4 -2
@@ -162,9 +162,10 @@ void sdhci_i2s_mem_enable(u8 mask);/* Add misc structure declarations here */ extern struct clcd_board clcd_plat_data; +#endif /* spear310 declarations */ -#elif defined(CONFIG_MACH_SPEAR310 ) +#if defined(CONFIG_MACH_SPEAR310 )/* Add spear310 machine device structure declarations here */ extern struct amba_device uart1_device;extern struct amba_device uart2_device;
@@ -189,9 +190,10 @@ extern struct pmx_dev spear310_pmx_tdm0;/* Add spear310 machine function declarations here */ void __init spear310_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs,u8 pmx_dev_count); +#endif /* spear320 declarations */ -#elif defined(CONFIG_MACH_SPEAR320 ) +#if defined(CONFIG_MACH_SPEAR320 )/* Add spear320 machine device structure declarations here */ extern struct amba_device clcd_device;extern struct amba_device ssp_device[];
Signature · 1 line
1.7.2.2
PATCH 65/74 SPEAr3xx: Replace defconfigs with single unfied defconfig
In reply to Viresh KUMARFrom: Ryan Mallon <[email protected]>
We only need one defconfig for SPEAr3xx now since we can build all three boards into one kernel.
Signed-off-by Ryan Mallon <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
--- arch/arm/configs/spear300_defconfig | 51 ----------- arch/arm/configs/spear310_defconfig | 52 ----------- arch/arm/configs/spear320_defconfig | 52 ----------- arch/arm/configs/spear3xx_defconfig | 163 +++++++++++++++++++++++++++++++++++ 4 files changed, 163 insertions(+), 155 deletions(-) delete mode 100644 arch/arm/configs/spear300_defconfig delete mode 100644 arch/arm/configs/spear310_defconfig delete mode 100644 arch/arm/configs/spear320_defconfig create mode 100644 arch/arm/configs/spear3xx_defconfig
arch/arm/configs/spear300_defconfig deleted +0 -51
@@ -1,51 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_PLAT_SPEAR=y -CONFIG_BINFMT_MISC=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_INPUT_FF_MEMLESS=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_HW_RANDOM is not set -CONFIG_RAW_DRIVER=y -CONFIG_MAX_RAW_DEVS=8192 -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_PL061=y -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_AUTOFS4_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_IOCHARSET="ascii" -CONFIG_TMPFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="utf8" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=m -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -CONFIG_DEBUG_INFO=y -# CONFIG_CRC32 is not set
arch/arm/configs/spear310_defconfig deleted +0 -52
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arch/arm/configs/spear320_defconfig deleted +0 -52
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arch/arm/configs/spear3xx_defconfig new file +163 -0
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Signature · 1 line
1.7.2.2
PATCH 66/74 ST SPEAr: Appending spear3** with global structures
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/include/mach/generic.h | 140 ++++++++++++------------ arch/arm/mach-spear3xx/spear300.c | 42 ++++---- arch/arm/mach-spear3xx/spear300_evb.c | 41 ++++---- arch/arm/mach-spear3xx/spear310.c | 16 ++-- arch/arm/mach-spear3xx/spear310_evb.c | 35 +++--- arch/arm/mach-spear3xx/spear320.c | 32 +++--- arch/arm/mach-spear3xx/spear320_evb.c | 48 +++++---- arch/arm/mach-spear3xx/spear3xx.c | 20 ++-- arch/arm/plat-spear/include/plat/spi.h | 2 +- 9 files changed, 190 insertions(+), 186 deletions(-)
arch/arm/mach-spear3xx/include/mach/generic.h +70 -70
@@ -32,16 +32,16 @@#define SPEAR_GPT0_CHAN1_IRQ SPEAR3XX_IRQ_CPU_GPT1_2/* Add spear3xx family device structure declarations here */ -extern struct amba_device gpio_device; -extern struct amba_device ssp0_device; -extern struct amba_device uart_device; -extern struct amba_device wdt_device; -extern struct platform_device ehci_device; -extern struct platform_device i2c_device; -extern struct platform_device ohci0_device; -extern struct platform_device ohci1_device; -extern struct platform_device rtc_device; -extern struct platform_device smi_device; +extern struct amba_device spear3xx_gpio_device; +extern struct amba_device spear3xx_ssp0_device; +extern struct amba_device spear3xx_uart_device; +extern struct amba_device spear3xx_wdt_device; +extern struct platform_device spear3xx_ehci_device; +extern struct platform_device spear3xx_i2c_device; +extern struct platform_device spear3xx_ohci0_device; +extern struct platform_device spear3xx_ohci1_device; +extern struct platform_device spear3xx_rtc_device; +extern struct platform_device spear3xx_smi_device;extern struct sys_timer spear3xx_timer;/* Add spear3xx family function declarations here */
@@ -89,49 +89,49 @@ extern struct pmx_dev spear3xx_pmx_timer_1_2;#if defined(CONFIG_MACH_SPEAR310 ) || defined(CONFIG_MACH_SPEAR320 )/* padmux plgpio devices */ -extern struct pmx_dev pmx_plgpio_0_1; -extern struct pmx_dev pmx_plgpio_2_3; -extern struct pmx_dev pmx_plgpio_4_5; -extern struct pmx_dev pmx_plgpio_6_9; -extern struct pmx_dev pmx_plgpio_10_27; -extern struct pmx_dev pmx_plgpio_28; -extern struct pmx_dev pmx_plgpio_29; -extern struct pmx_dev pmx_plgpio_30; -extern struct pmx_dev pmx_plgpio_31; -extern struct pmx_dev pmx_plgpio_32; -extern struct pmx_dev pmx_plgpio_33; -extern struct pmx_dev pmx_plgpio_34_36; -extern struct pmx_dev pmx_plgpio_37_42; -extern struct pmx_dev pmx_plgpio_43_44_47_48; -extern struct pmx_dev pmx_plgpio_45_46_49_50; +extern struct pmx_dev spear3xx_pmx_plgpio_0_1; +extern struct pmx_dev spear3xx_pmx_plgpio_2_3; +extern struct pmx_dev spear3xx_pmx_plgpio_4_5; +extern struct pmx_dev spear3xx_pmx_plgpio_6_9; +extern struct pmx_dev spear3xx_pmx_plgpio_10_27; +extern struct pmx_dev spear3xx_pmx_plgpio_28; +extern struct pmx_dev spear3xx_pmx_plgpio_29; +extern struct pmx_dev spear3xx_pmx_plgpio_30; +extern struct pmx_dev spear3xx_pmx_plgpio_31; +extern struct pmx_dev spear3xx_pmx_plgpio_32; +extern struct pmx_dev spear3xx_pmx_plgpio_33; +extern struct pmx_dev spear3xx_pmx_plgpio_34_36; +extern struct pmx_dev spear3xx_pmx_plgpio_37_42; +extern struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48; +extern struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50;#endif /* spear300 declarations */ #ifdef CONFIG_MACH_SPEAR300 /* Add spear300 machine device structure declarations here */ -extern struct amba_device clcd_device; -extern struct amba_device gpio1_device; -extern struct platform_device kbd_device; -extern struct platform_device nand0_device; -extern struct platform_device nand1_device; -extern struct platform_device nand2_device; -extern struct platform_device nand3_device; -extern struct platform_device sdhci_device; +extern struct amba_device spear300_clcd_device; +extern struct amba_device spear300_gpio1_device; +extern struct platform_device spear300_kbd_device; +extern struct platform_device spear300_nand0_device; +extern struct platform_device spear300_nand1_device; +extern struct platform_device spear300_nand2_device; +extern struct platform_device spear300_nand3_device; +extern struct platform_device spear300_sdhci_device;/* pad mux modes */ -extern struct pmx_mode nand_mode; -extern struct pmx_mode nor_mode; -extern struct pmx_mode photo_frame_mode; -extern struct pmx_mode lend_ip_phone_mode; -extern struct pmx_mode hend_ip_phone_mode; -extern struct pmx_mode lend_wifi_phone_mode; -extern struct pmx_mode hend_wifi_phone_mode; -extern struct pmx_mode ata_pabx_wi2s_mode; -extern struct pmx_mode ata_pabx_i2s_mode; -extern struct pmx_mode caml_lcdw_mode; -extern struct pmx_mode camu_lcd_mode; -extern struct pmx_mode camu_wlcd_mode; -extern struct pmx_mode caml_lcd_mode; +extern struct pmx_mode spear300_nand_mode; +extern struct pmx_mode spear300_nor_mode; +extern struct pmx_mode spear300_photo_frame_mode; +extern struct pmx_mode spear300_lend_ip_phone_mode; +extern struct pmx_mode spear300_hend_ip_phone_mode; +extern struct pmx_mode spear300_lend_wifi_phone_mode; +extern struct pmx_mode spear300_hend_wifi_phone_mode; +extern struct pmx_mode spear300_ata_pabx_wi2s_mode; +extern struct pmx_mode spear300_ata_pabx_i2s_mode; +extern struct pmx_mode spear300_caml_lcdw_mode; +extern struct pmx_mode spear300_camu_lcd_mode; +extern struct pmx_mode spear300_camu_wlcd_mode; +extern struct pmx_mode spear300_caml_lcd_mode;/* pad mux devices */ extern struct pmx_dev spear300_pmx_fsmc_2_chips;
@@ -167,14 +167,14 @@ extern struct clcd_board clcd_plat_data;/* spear310 declarations */ #if defined(CONFIG_MACH_SPEAR310 )/* Add spear310 machine device structure declarations here */ -extern struct amba_device uart1_device; -extern struct amba_device uart2_device; -extern struct amba_device uart3_device; -extern struct amba_device uart4_device; -extern struct amba_device uart5_device; -extern struct platform_device emi_nor_device; -extern struct platform_device plgpio_device; -extern struct platform_device nand_device; +extern struct amba_device spear310_uart1_device; +extern struct amba_device spear310_uart2_device; +extern struct amba_device spear310_uart3_device; +extern struct amba_device spear310_uart4_device; +extern struct amba_device spear310_uart5_device; +extern struct platform_device spear310_emi_nor_device; +extern struct platform_device spear310_plgpio_device; +extern struct platform_device spear310_nand_device;/* pad mux devices */ extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5;
@@ -195,24 +195,24 @@ void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,/* spear320 declarations */ #if defined(CONFIG_MACH_SPEAR320 )/* Add spear320 machine device structure declarations here */ -extern struct amba_device clcd_device; -extern struct amba_device ssp_device[]; -extern struct amba_device uart1_device; -extern struct amba_device uart2_device; -extern struct platform_device can0_device; -extern struct platform_device can1_device; -extern struct platform_device emi_nor_device; -extern struct platform_device i2c1_device; -extern struct platform_device nand_device; -extern struct platform_device plgpio_device; -extern struct platform_device pwm_device; -extern struct platform_device sdhci_device; +extern struct amba_device spear320_clcd_device; +extern struct amba_device spear320_ssp_device[]; +extern struct amba_device spear320_uart1_device; +extern struct amba_device spear320_uart2_device; +extern struct platform_device spear320_can0_device; +extern struct platform_device spear320_can1_device; +extern struct platform_device spear320_emi_nor_device; +extern struct platform_device spear320_i2c1_device; +extern struct platform_device spear320_nand_device; +extern struct platform_device spear320_plgpio_device; +extern struct platform_device spear320_pwm_device; +extern struct platform_device spear320_sdhci_device;/* pad mux modes */ -extern struct pmx_mode auto_net_smii_mode; -extern struct pmx_mode auto_net_mii_mode; -extern struct pmx_mode auto_exp_mode; -extern struct pmx_mode small_printers_mode; +extern struct pmx_mode spear320_auto_net_smii_mode; +extern struct pmx_mode spear320_auto_net_mii_mode; +extern struct pmx_mode spear320_auto_exp_mode; +extern struct pmx_mode spear320_small_printers_mode;/* pad mux devices */ extern struct pmx_dev spear320_pmx_clcd;
arch/arm/mach-spear3xx/spear300.c +21 -21
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arch/arm/mach-spear3xx/spear300_evb.c +21 -20
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arch/arm/mach-spear3xx/spear310.c +8 -8
@@ -196,7 +196,7 @@ static struct pmx_driver pmx_driver;/* Add spear310 specific devices here */ /* uart1 device registeration */ -struct amba_device uart1_device = { +struct amba_device spear310_uart1_device = { .dev = { .init_name ="uart1" , },
@@ -209,7 +209,7 @@ struct amba_device uart1_device = { };/* uart2 device registeration */ -struct amba_device uart2_device = { +struct amba_device spear310_uart2_device = { .dev = { .init_name ="uart2" , },
@@ -222,7 +222,7 @@ struct amba_device uart2_device = { };/* uart3 device registeration */ -struct amba_device uart3_device = { +struct amba_device spear310_uart3_device = { .dev = { .init_name ="uart3" , },
@@ -235,7 +235,7 @@ struct amba_device uart3_device = { };/* uart4 device registeration */ -struct amba_device uart4_device = { +struct amba_device spear310_uart4_device = { .dev = { .init_name ="uart4" , },
@@ -248,7 +248,7 @@ struct amba_device uart4_device = { };/* uart5 device registeration */ -struct amba_device uart5_device = { +struct amba_device spear310_uart5_device = { .dev = { .init_name ="uart5" , },
@@ -277,7 +277,7 @@ static struct resource nand_resources[] = { }, }; -struct platform_device nand_device = { +struct platform_device spear310_nand_device = { .name ="nand" , .id =-1 , .resource = nand_resources,
@@ -332,7 +332,7 @@ static struct resource emi_nor_resources[] = { }, }; -struct platform_device emi_nor_device = { +struct platform_device spear310_emi_nor_device = { .name ="physmap-flash" , .id =-1 , .resource = emi_nor_resources,
@@ -362,7 +362,7 @@ static struct resource plgpio_resources[] = { }, }; -struct platform_device plgpio_device = { +struct platform_device spear310_plgpio_device = { .name ="plgpio" , .id =-1 , .dev = {
arch/arm/mach-spear3xx/spear310_evb.c +18 -17
@@ -59,27 +59,27 @@ static struct pmx_dev *pmx_devs[] = {static struct amba_device *amba_devs[]__initdata = {/* spear3xx specific devices */ - &gpio_device, - &ssp0_device, - &uart_device, - &wdt_device, + &spear3xx_gpio_device, + &spear3xx_ssp0_device, + &spear3xx_uart_device, + &spear3xx_wdt_device,/* spear310 specific devices */ };static struct platform_device *plat_devs[]__initdata = {/* spear3xx specific devices */ - &ehci_device, - &emi_nor_device, - &i2c_device, - &nand_device, - &ohci0_device, - &ohci1_device, - &rtc_device, - &smi_device, + &spear3xx_ehci_device, + &spear3xx_i2c_device, + &spear3xx_ohci0_device, + &spear3xx_ohci1_device, + &spear3xx_rtc_device, + &spear3xx_smi_device,/* spear310 specific devices */ - &plgpio_device, + &spear310_emi_nor_device, + &spear310_nand_device, + &spear310_plgpio_device, };/* spi board information */
@@ -120,7 +120,7 @@ static void __init spi_init(void)static void __init spear310_evb_init (void ) {/* set nand device's plat data */ -nand_set_plat_data (&nand_device,NULL ,0 ,NAND_SKIP_BBTSCAN , +nand_set_plat_data (&spear310_nand_device,NULL ,0 ,NAND_SKIP_BBTSCAN ,SPEAR_NAND_BW8 );/* call spear310 machine init function */
@@ -130,10 +130,10 @@ static void __init spear310_evb_init(void)i2c_register_board_devices ();/* initialize serial nor related data in smi plat data */ -smi_init_board_info (&smi_device); +smi_init_board_info (&spear3xx_smi_device);/* initialize emi related data in emi plat data */ -emi_init_board_info (&emi_nor_device, partition_info, +emi_init_board_info (&spear310_emi_nor_device, partition_info,ARRAY_SIZE (partition_info),EMI_FLASH_WIDTH32 );/* Add Platform Devices */
@@ -143,7 +143,8 @@ static void __init spear310_evb_init(void)spear_amba_device_register (amba_devs,ARRAY_SIZE (amba_devs));/* Initialize emi regiters */ -emi_init (&emi_nor_device,SPEAR310_EMI_REG_BASE ,0 ,EMI_FLASH_WIDTH32 ); +emi_init (&spear310_emi_nor_device,SPEAR310_EMI_REG_BASE ,0 , +EMI_FLASH_WIDTH32 );spi_init (); }
arch/arm/mach-spear3xx/spear320.c +16 -16
@@ -30,25 +30,25 @@#define SMALL_PRINTERS_MODE (1 << 3)#define ALL_MODES 0xF -struct pmx_mode auto_net_smii_mode = { +struct pmx_mode spear320_auto_net_smii_mode = { .id =AUTO_NET_SMII_MODE , .name ="Automation Networking SMII Mode" , .value =0x00 , }; -struct pmx_mode auto_net_mii_mode = { +struct pmx_mode spear320_auto_net_mii_mode = { .id =AUTO_NET_MII_MODE , .name ="Automation Networking MII Mode" , .value =0x01 , }; -struct pmx_mode auto_exp_mode = { +struct pmx_mode spear320_auto_exp_mode = { .id =AUTO_EXP_MODE , .name ="Automation Expanded Mode" , .value =0x02 , }; -struct pmx_mode small_printers_mode = { +struct pmx_mode spear320_small_printers_mode = { .id =SMALL_PRINTERS_MODE , .name ="Small Printers Mode" , .value =0x03 ,
@@ -594,7 +594,7 @@ static struct pmx_driver pmx_driver = {/* Add spear320 specific devices here */ /* CLCD device registration */ -struct amba_device clcd_device = { +struct amba_device spear320_clcd_device = { .dev = { .init_name ="clcd" , .coherent_dma_mask = ~0 ,
@@ -622,7 +622,7 @@ static struct pl022_ssp_controller ssp_platform_data[] = { } }; -struct amba_device ssp_device[] = { +struct amba_device spear320_ssp_device[] = { { .dev = { .coherent_dma_mask = ~0 ,
@@ -651,7 +651,7 @@ struct amba_device ssp_device[] = { };/* uart1 device registeration */ -struct amba_device uart1_device = { +struct amba_device spear320_uart1_device = { .dev = { .init_name ="uart1" , },
@@ -664,7 +664,7 @@ struct amba_device uart1_device = { };/* uart2 device registeration */ -struct amba_device uart2_device = { +struct amba_device spear320_uart2_device = { .dev = { .init_name ="uart2" , },
@@ -687,7 +687,7 @@ static struct resource emi_nor_resources[] = { }, }; -struct platform_device emi_nor_device = { +struct platform_device spear320_emi_nor_device = { .name ="physmap-flash" , .id =-1 , .resource = emi_nor_resources,
@@ -714,7 +714,7 @@ static struct resource can0_resources[] = { }, }; -struct platform_device can0_device = { +struct platform_device spear320_can0_device = { .name ="spear_can" , .id =0 , .num_resources =ARRAY_SIZE (can0_resources),
@@ -732,7 +732,7 @@ static struct resource can1_resources[] = { }, }; -struct platform_device can1_device = { +struct platform_device spear320_can1_device = { .name ="spear_can" , .id =1 , .num_resources =ARRAY_SIZE (can1_resources),
@@ -751,7 +751,7 @@ static struct resource i2c1_resources[] = { }, }; -struct platform_device i2c1_device = { +struct platform_device spear320_i2c1_device = { .name ="i2c_designware" , .id =1 , .dev = {
@@ -778,7 +778,7 @@ static struct resource nand_resources[] = { }, }; -struct platform_device nand_device = { +struct platform_device spear320_nand_device = { .name ="nand" , .id =-1 , .resource = nand_resources,
@@ -797,7 +797,7 @@ static struct resource plgpio_resources[] = { }, }; -struct platform_device plgpio_device = { +struct platform_device spear320_plgpio_device = { .name ="plgpio" , .id =-1 , .dev = {
@@ -816,7 +816,7 @@ static struct resource pwm_resources[] = { }, }; -struct platform_device pwm_device = { +struct platform_device spear320_pwm_device = { .name ="pwm" , .id =-1 , .num_resources =ARRAY_SIZE (pwm_resources),
@@ -835,7 +835,7 @@ static struct resource sdhci_resources[] = { } }; -struct platform_device sdhci_device = { +struct platform_device spear320_sdhci_device = { .dev = { .coherent_dma_mask = ~0 , },
arch/arm/mach-spear3xx/spear320_evb.c +25 -23
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arch/arm/mach-spear3xx/spear3xx.c +10 -10
@@ -32,7 +32,7 @@ static struct pl061_platform_data gpio_plat_data = { .irq_base = SPEAR3XX_GPIO_INT_BASE, }; -struct amba_device gpio_device = { +struct amba_device spear3xx_gpio_device = { .dev = { .init_name ="gpio" , .platform_data = &gpio_plat_data,
@@ -61,7 +61,7 @@ static struct pl022_ssp_controller ssp_platform_data = { .num_chipselect = 2, }; -struct amba_device ssp0_device = { +struct amba_device spear3xx_ssp0_device = { .dev = { .coherent_dma_mask = ~0 , .init_name ="ssp-pl022.0" ,
@@ -76,7 +76,7 @@ struct amba_device ssp0_device = { };/* uart device registeration */ -struct amba_device uart_device = { +struct amba_device spear3xx_uart_device = { .dev = { .init_name ="uart" , },
@@ -89,7 +89,7 @@ struct amba_device uart_device = { };/* watchdog device registeration */ -struct amba_device wdt_device = { +struct amba_device spear3xx_wdt_device = { .dev = { .init_name ="wdt" , },
@@ -112,7 +112,7 @@ static struct resource i2c_resources[] = { }, }; -struct platform_device i2c_device = { +struct platform_device spear3xx_i2c_device = { .name ="i2c_designware" , .id =0 , .dev = {
@@ -162,7 +162,7 @@ static struct resource ohci1_resources[] = {static u64 ehci_dmamask = ~0 ;static int usbh_id =-1 ; -struct platform_device ehci_device = { +struct platform_device spear3xx_ehci_device = { .name ="spear-ehci" , .id =-1 , .dev = {
@@ -176,7 +176,7 @@ struct platform_device ehci_device = {static u64 ohci0_dmamask = ~0 ; -struct platform_device ohci0_device = { +struct platform_device spear3xx_ohci0_device = { .name ="spear-ohci" , .id =0 , .dev = {
@@ -190,7 +190,7 @@ struct platform_device ohci0_device = {static u64 ohci1_dmamask = ~0 ; -struct platform_device ohci1_device = { +struct platform_device spear3xx_ohci1_device = { .name ="spear-ohci" , .id =1 , .dev = {
@@ -214,7 +214,7 @@ static struct resource rtc_resources[] = { }, }; -struct platform_device rtc_device = { +struct platform_device spear3xx_rtc_device = { .name ="rtc-spear" , .id =-1 , .num_resources =ARRAY_SIZE (rtc_resources),
@@ -233,7 +233,7 @@ static struct resource smi_resources[] = { }, }; -struct platform_device smi_device = { +struct platform_device spear3xx_smi_device = { .name ="smi" , .id =-1 , .num_resources =ARRAY_SIZE (smi_resources),
arch/arm/plat-spear/include/plat/spi.h +1 -1
@@ -55,7 +55,7 @@ static void spi##id##_##type##_cs_control(u32 control) \/* This will define CHIP_INFO structure for a specific spi slave */ #define DECLARE_SPI_CHIP_INFO (id, type, chip_select_control) \ -struct pl022_config_chip spi##id##_##type##_chip_info = { \ +static struct pl022_config_chip spi##id##_##type##_chip_info = {\ .lbm = LOOPBACK_DISABLED, \ .iface = SSP_INTERFACE_MOTOROLA_SPI, \ .hierarchy = SSP_MASTER, \
Signature · 1 line
1.7.2.2
PATCH 67/74 ST SPEAr3xx: Updating plgpio and emi source to make it compliant with single image strategy
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
--- arch/arm/mach-spear3xx/emi.c | 20 +++++++++++- arch/arm/mach-spear3xx/include/mach/emi.h | 19 ++++++----- arch/arm/mach-spear3xx/include/mach/gpio.h | 27 ++++++++-------- arch/arm/plat-spear/plgpio.c | 46 ++++++++++++++++++++------- 4 files changed, 76 insertions(+), 36 deletions(-)
arch/arm/mach-spear3xx/emi.c +18 -2
@@ -15,6 +15,7 @@#include <linux/err.h> #include <linux/init.h> #include <linux/io.h> +#include <asm/mach-types.h> #include <mach/emi.h> int __init emi_init(struct platform_device *pdev, unsigned long base,
@@ -23,8 +24,23 @@ int __init emi_init(struct platform_device *pdev, unsigned long base,void __iomem *emi_reg_base;struct clk *clk;int ret; +u32 ack_reg, max_banks; +/* u32 timeout_reg, irq_reg; */ -if (bank > (EMI_MAX_BANKS -1 )) +/* fixing machine dependent values */ +if (machine_is_spear310 ()) { + ack_reg =SPEAR310_ACK_REG ; + max_banks =SPEAR310_EMI_MAX_BANKS ; +/* timeout_reg = SPEAR310_TIMEOUT_REG; */ +/* irq_reg = SPEAR310_IRQ_REG; */ + }else { + ack_reg =SPEAR320_ACK_REG ; + max_banks =SPEAR320_EMI_MAX_BANKS ; +/* timeout_reg = SPEAR320_TIMEOUT_REG; */ +/* irq_reg = SPEAR320_IRQ_REG; */ + } + +if (bank > (max_banks -1 ))return -EINVAL ; emi_reg_base =ioremap (base,EMI_REG_SIZE );
@@ -71,7 +87,7 @@ int __init emi_init(struct platform_device *pdev, unsigned long base, emi_reg_base + (EMI_BANK_REG_SIZE * bank) + CTRL_REG);/* disable all the acks */ -writel (0x3f << bank, emi_reg_base +ACK_REG ); +writel (0x3f << bank, emi_reg_base + ack_reg);iounmap (emi_reg_base);
arch/arm/mach-spear3xx/include/mach/emi.h +10 -9
@@ -33,18 +33,19 @@#define CTRL_REG (0x14)#if defined(CONFIG_MACH_SPEAR310 ) -#define TIMEOUT_REG (0x90) -#define ACK_REG (0x94) -#define IRQ_REG (0x98) +#define SPEAR310_TIMEOUT_REG (0x90) +#define SPEAR310_ACK_REG (0x94) +#define SPEAR310_IRQ_REG (0x98) -#define EMI_MAX_BANKS 6 +#define SPEAR310_EMI_MAX_BANKS 6 +#endif -#elif defined(CONFIG_MACH_SPEAR320 ) -#define TIMEOUT_REG (0x60) -#define ACK_REG (0x64) -#define IRQ_REG (0x68) +#if defined(CONFIG_MACH_SPEAR320 ) +#define SPEAR320_TIMEOUT_REG (0x60) +#define SPEAR320_ACK_REG (0x64) +#define SPEAR320_IRQ_REG (0x68) -#define EMI_MAX_BANKS 4 +#define SPEAR320_EMI_MAX_BANKS 4#endif
arch/arm/mach-spear3xx/include/mach/gpio.h +14 -13
@@ -17,20 +17,21 @@#include <plat/gpio.h> #ifdef CONFIG_MACH_SPEAR310 -#define PLGPIO_ENB 0x0010 -#define PLGPIO_WDATA 0x0020 -#define PLGPIO_DIR 0x0030 -#define PLGPIO_IE 0x0040 -#define PLGPIO_RDATA 0x0050 -#define PLGPIO_MIS 0x0060 +#define SPEAR310_PLGPIO_ENB 0x0010 +#define SPEAR310_PLGPIO_WDATA 0x0020 +#define SPEAR310_PLGPIO_DIR 0x0030 +#define SPEAR310_PLGPIO_IE 0x0040 +#define SPEAR310_PLGPIO_RDATA 0x0050 +#define SPEAR310_PLGPIO_MIS 0x0060 +#endif -#elif defined(CONFIG_MACH_SPEAR320 ) -#define PLGPIO_ENB 0x0024 -#define PLGPIO_WDATA 0x0034 -#define PLGPIO_DIR 0x0044 -#define PLGPIO_RDATA 0x0054 -#define PLGPIO_IE 0x0064 -#define PLGPIO_MIS 0x0074 +#if defined(CONFIG_MACH_SPEAR320 ) +#define SPEAR320_PLGPIO_ENB 0x0024 +#define SPEAR320_PLGPIO_WDATA 0x0034 +#define SPEAR320_PLGPIO_DIR 0x0044 +#define SPEAR320_PLGPIO_RDATA 0x0054 +#define SPEAR320_PLGPIO_IE 0x0064 +#define SPEAR320_PLGPIO_MIS 0x0074#endif #define BASIC_GPIO_0 0
arch/arm/plat-spear/plgpio.c +34 -12
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1.7.2.2
PATCH 68/74 SPEAr6xx: Rework Kconfig for single image solution
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
--- arch/arm/mach-spear6xx/Kconfig | 15 ++++++++------- arch/arm/mach-spear6xx/Kconfig600 | 17 ----------------- 2 files changed, 8 insertions(+), 24 deletions(-) delete mode 100644 arch/arm/mach-spear6xx/Kconfig600
arch/arm/mach-spear6xx/Kconfig +8 -7
@@ -4,17 +4,18 @@ if ARCH_SPEAR6XX -choice - prompt "SPEAr6XX Family" - default MACH_SPEAR600 +menu "SPEAr6xx Implementations" +config BOARD_SPEAR600_EVB + bool "SPEAr600 Evaluation Board" + select MACH_SPEAR600 + help + Supports ST SPEAr600 Evaluation Board + +endmenu config MACH_SPEAR600 bool "SPEAr600" help Supports ST SPEAr600 Machine -endchoice - -# Adding SPEAr6XX machine specific configuration files -source "arch/arm/mach-spear6xx/Kconfig600" endif #ARCH_SPEAR6XX
arch/arm/mach-spear6xx/Kconfig600 deleted +0 -17
@@ -1,17 +0,0 @@ -# -# SPEAr600 machine configuration file -# - -if MACH_SPEAR600 - -choice - prompt "SPEAr600 Boards" - default BOARD_SPEAR600_EVB - -config BOARD_SPEAR600_EVB - bool "SPEAr600 Evaluation Board" - help - Supports ST SPEAr600 Evaluation Board -endchoice - -endif #MACH_SPEAR600
Signature · 1 line
1.7.2.2
PATCH 69/74 ST SPEAR6xx: renaming spear600_defconfig as spear6xx_defconfig
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
--- arch/arm/configs/spear600_defconfig | 49 ----- arch/arm/configs/spear6xx_defconfig | 358 +++++++++++++++++++++++++++++++++++ 2 files changed, 358 insertions(+), 49 deletions(-) delete mode 100644 arch/arm/configs/spear600_defconfig create mode 100644 arch/arm/configs/spear6xx_defconfig
arch/arm/configs/spear600_defconfig deleted +0 -49
@@ -1,49 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_PLAT_SPEAR=y -CONFIG_ARCH_SPEAR6XX=y -CONFIG_BINFMT_MISC=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_INPUT_FF_MEMLESS=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_RAW_DRIVER=y -CONFIG_MAX_RAW_DEVS=8192 -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_PL061=y -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_AUTOFS4_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_IOCHARSET="ascii" -CONFIG_TMPFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="utf8" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=m -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -CONFIG_DEBUG_INFO=y -# CONFIG_CRC32 is not set
arch/arm/configs/spear6xx_defconfig new file +358 -0
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Signature · 1 line
1.7.2.2
PATCH 70/74 SPEAr13XX: Update register/macros/devices/routine names and pmx dev registration to implement single image for multiple boards.
In reply to Viresh KUMARSigned-off-by Viresh Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/clock.c | 12 +++--- arch/arm/mach-spear13xx/include/mach/generic.h | 47 ++++++++++----------- arch/arm/mach-spear13xx/include/mach/irqs.h | 1 - arch/arm/mach-spear13xx/include/mach/spear1310.h | 6 +- arch/arm/mach-spear13xx/spear1300.c | 9 +++- arch/arm/mach-spear13xx/spear1300_evb.c | 47 +++++++++----------- arch/arm/mach-spear13xx/spear1310.c | 13 ++++-- arch/arm/mach-spear13xx/spear1310_evb.c | 49 ++++++++++------------ arch/arm/mach-spear13xx/spear13xx.c | 34 ++++++++-------- 9 files changed, 108 insertions(+), 110 deletions(-)
arch/arm/mach-spear13xx/clock.c +6 -6
@@ -988,15 +988,15 @@ static struct pclk_info phy_pclk_info[] = {static struct pclk_sel phy_pclk_sel = { .pclk_info = phy_pclk_info, .pclk_count =ARRAY_SIZE (phy_pclk_info), - .pclk_sel_reg = (unsigned int *)(IO_ADDRESS (RAS_CTRL_REG1 )), - .pclk_sel_mask =PHY_CLK_MASK , + .pclk_sel_reg = (unsigned int *)(IO_ADDRESS (SPEAR1310_RAS_CTRL_REG1 )), + .pclk_sel_mask =SPEAR1310_PHY_CLK_MASK , };/* Phy 1 Clock */ struct clk gmac_phy1_clk = { .flags =ALWAYS_ENABLED , .pclk_sel = &phy_pclk_sel, - .pclk_sel_shift =PHY_CLK_SHIFT , + .pclk_sel_shift =SPEAR1310_PHY_CLK_SHIFT , .recalc = &follow_parent, };
@@ -1004,7 +1004,7 @@ struct clk gmac_phy1_clk = {static struct clk gmac_phy2_clk = { .flags =ALWAYS_ENABLED , .pclk_sel = &phy_pclk_sel, - .pclk_sel_shift =PHY_CLK_SHIFT , + .pclk_sel_shift =SPEAR1310_PHY_CLK_SHIFT , .recalc = &follow_parent, };
@@ -1012,7 +1012,7 @@ static struct clk gmac_phy2_clk = {static struct clk gmac_phy3_clk = { .flags =ALWAYS_ENABLED , .pclk_sel = &phy_pclk_sel, - .pclk_sel_shift =PHY_CLK_SHIFT , + .pclk_sel_shift =SPEAR1310_PHY_CLK_SHIFT , .recalc = &follow_parent, };
@@ -1020,7 +1020,7 @@ static struct clk gmac_phy3_clk = {static struct clk gmac_phy4_clk = { .flags =ALWAYS_ENABLED , .pclk_sel = &phy_pclk_sel, - .pclk_sel_shift =PHY_CLK_SHIFT , + .pclk_sel_shift =SPEAR1310_PHY_CLK_SHIFT , .recalc = &follow_parent, };
arch/arm/mach-spear13xx/include/mach/generic.h +23 -24
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arch/arm/mach-spear13xx/include/mach/irqs.h +0 -1
@@ -122,7 +122,6 @@#endif /* CONFIG_MACH_SPEAR1310 */ #define IRQ_GIC_END (IRQ_SHPI_START + 128) -#define VIRQ_START IRQ_GIC_END/* GPIO pins virtual irqs */
arch/arm/mach-spear13xx/include/mach/spear1310.h +3 -3
@@ -21,9 +21,9 @@#define SPEAR1310_RAS_BASE UL(0x6C800000)/* RAS Area Control Register */ -#define RAS_CTRL_REG1 (SPEAR1310_RAS_BASE + 0x4) -#define PHY_CLK_MASK 0xF -#define PHY_CLK_SHIFT 0 +#define SPEAR1310_RAS_CTRL_REG1 (SPEAR1310_RAS_BASE + 0x4) +#define SPEAR1310_PHY_CLK_MASK 0xF +#define SPEAR1310_PHY_CLK_SHIFT 0#endif /* __MACH_SPEAR1310_H */
arch/arm/mach-spear13xx/spear1300.c +7 -2
@@ -15,11 +15,12 @@#include <mach/spear.h> /* pmx driver structure */ -struct pmx_driver pmx_driver; +static struct pmx_driver pmx_driver;/* Add spear1300 specific devices here */ -void __init spear1300_init (void ) +void __init spear1300_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs, +u8 pmx_dev_count) {int ret;
@@ -27,6 +28,10 @@ void __init spear1300_init(void)spear13xx_init ();/* pmx initialization */ + pmx_driver.mode = pmx_mode; + pmx_driver.devs = pmx_devs; + pmx_driver.devs_count = pmx_dev_count; + ret =pmx_register (&pmx_driver);if (ret)pr_err ("padmux: registeration failed. err no: %d\n" , ret);
arch/arm/mach-spear13xx/spear1300_evb.c +21 -26
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arch/arm/mach-spear13xx/spear1310.c +9 -4
@@ -17,7 +17,7 @@#include <mach/hardware.h> /* pmx driver structure */ -struct pmx_driver pmx_driver; +static struct pmx_driver pmx_driver;/* Pad multiplexing for uart1_modem device */ static struct pmx_mux_reg pmx_uart1_modem_mux[] = {
@@ -338,7 +338,7 @@ static struct resource can0_resources[] = { }, }; -struct platform_device can0_device = { +struct platform_device spear1310_can0_device = { .name ="spear_can" , .id =0 , .num_resources =ARRAY_SIZE (can0_resources),
@@ -356,14 +356,15 @@ static struct resource can1_resources[] = { }, }; -struct platform_device can1_device = { +struct platform_device spear1310_can1_device = { .name ="spear_can" , .id =1 , .num_resources =ARRAY_SIZE (can1_resources), .resource = can1_resources, }; -void __init spear1310_init (void ) +void __init spear1310_init (struct pmx_mode *pmx_mode,struct pmx_dev **pmx_devs, +u8 pmx_dev_count) {int ret;
@@ -371,6 +372,10 @@ void __init spear1310_init(void)spear13xx_init ();/* pmx initialization */ + pmx_driver.mode = pmx_mode; + pmx_driver.devs = pmx_devs; + pmx_driver.devs_count = pmx_dev_count; + ret =pmx_register (&pmx_driver);if (ret)pr_err ("padmux: registeration failed. err no: %d\n" , ret);
arch/arm/mach-spear13xx/spear1310_evb.c +22 -27
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arch/arm/mach-spear13xx/spear13xx.c +17 -17
@@ -40,7 +40,7 @@ static struct pl061_platform_data gpio_plat_data[] = { }, }; -struct amba_device gpio_device[] = { +struct amba_device spear13xx_gpio_device[] = { { .dev = { .init_name ="gpio0" ,
@@ -82,7 +82,7 @@ static struct pl022_ssp_controller ssp_platform_data = { .num_chipselect = 2, }; -struct amba_device ssp_device = { +struct amba_device spear13xx_ssp_device = { .dev = { .coherent_dma_mask = ~0 , .init_name ="ssp-pl022" ,
@@ -97,7 +97,7 @@ struct amba_device ssp_device = { };/* uart device registeration */ -struct amba_device uart_device = { +struct amba_device spear13xx_uart_device = { .dev = { .init_name ="uart" , },
@@ -121,7 +121,7 @@ static struct resource i2c_resources[] = { }, }; -struct platform_device i2c_device = { +struct platform_device spear13xx_i2c_device = { .name ="i2c_designware" , .id =0 , .dev = {
@@ -142,7 +142,7 @@ static struct resource fsmc_nor_resources[] = { }, }; -struct platform_device fsmc_nor_device = { +struct platform_device spear13xx_fsmc_nor_device = { .name ="physmap-flash" , .id =-1 , .resource = fsmc_nor_resources,
@@ -198,7 +198,7 @@ static struct resource nand_resources[] = { }, }; -struct platform_device nand_device = { +struct platform_device spear13xx_nand_device = { .name ="nand" , .id =-1 , .resource = nand_resources,
@@ -259,7 +259,7 @@ static int usbh0_id;static int usbh1_id =1 ;static u64 ehci0_dmamask = ~0 ; -struct platform_device ehci0_device = { +struct platform_device spear13xx_ehci0_device = { .name ="spear-ehci" , .id =0 , .dev = {
@@ -273,7 +273,7 @@ struct platform_device ehci0_device = {static u64 ehci1_dmamask = ~0 ; -struct platform_device ehci1_device = { +struct platform_device spear13xx_ehci1_device = { .name ="spear-ehci" , .id =1 , .dev = {
@@ -287,7 +287,7 @@ struct platform_device ehci1_device = {static u64 ohci0_dmamask = ~0 ; -struct platform_device ohci0_device = { +struct platform_device spear13xx_ohci0_device = { .name ="spear-ohci" , .id =0 , .dev = {
@@ -300,7 +300,7 @@ struct platform_device ohci0_device = { };static u64 ohci1_dmamask = ~0 ; -struct platform_device ohci1_device = { +struct platform_device spear13xx_ohci1_device = { .name ="spear-ohci" , .id =1 , .dev = {
@@ -324,7 +324,7 @@ static struct resource kbd_resources[] = { }, }; -struct platform_device kbd_device = { +struct platform_device spear13xx_kbd_device = { .name ="keyboard" , .id =-1 , .num_resources =ARRAY_SIZE (kbd_resources),
@@ -343,7 +343,7 @@ static struct resource rtc_resources[] = { }, }; -struct platform_device rtc_device = { +struct platform_device spear13xx_rtc_device = { .name ="rtc-spear" , .id =-1 , .num_resources =ARRAY_SIZE (rtc_resources),
@@ -362,7 +362,7 @@ static struct resource smi_resources[] = { }, }; -struct platform_device smi_device = { +struct platform_device spear13xx_smi_device = { .name ="smi" , .id =-1 , .num_resources =ARRAY_SIZE (smi_resources),
@@ -419,7 +419,7 @@ static struct resource sdhci_resources[] = { } }; -struct platform_device sdhci_device = { +struct platform_device spear13xx_sdhci_device = { .dev = { .coherent_dma_mask = ~0 , },
@@ -449,7 +449,7 @@ static struct resource pcie_gadget0_resources[] = {static int pcie_gadget0_id;static u64 pcie_gadget0_dmamask = ~0 ; -struct platform_device pcie_gadget0_device = { +struct platform_device spear13xx_pcie_gadget0_device = { .name ="pcie-gadget-spear" , .id =0 , .dev = {
@@ -480,7 +480,7 @@ static struct resource pcie_gadget1_resources[] = {static int pcie_gadget1_id;static u64 pcie_gadget1_dmamask = ~0 ; -struct platform_device pcie_gadget1_device = { +struct platform_device spear13xx_pcie_gadget1_device = { .name ="pcie-gadget-spear" , .id =1 , .dev = {
@@ -511,7 +511,7 @@ static struct resource pcie_gadget2_resources[] = {static int pcie_gadget2_id;static u64 pcie_gadget2_dmamask = ~0 ; -struct platform_device pcie_gadget2_device = { +struct platform_device spear13xx_pcie_gadget2_device = { .name ="pcie-gadget-spear" , .id =2 , .dev = {
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1.7.2.2
PATCH 71/74 SPEAr13xx: Rework KConfig to allow all boards to be compiled in
In reply to Viresh KUMARNow that all three SPEAr13xx platforms can be built into one kernel, rework KConfig to allow this. Move everything into one KConfig file while we are here.
Signed-off-by Viresh Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
--- arch/arm/mach-spear13xx/Kconfig | 23 ++++++++++++++--------- arch/arm/mach-spear13xx/Kconfig1300 | 17 ----------------- arch/arm/mach-spear13xx/Kconfig1310 | 17 ----------------- 3 files changed, 14 insertions(+), 43 deletions(-) delete mode 100644 arch/arm/mach-spear13xx/Kconfig1300 delete mode 100644 arch/arm/mach-spear13xx/Kconfig1310
arch/arm/mach-spear13xx/Kconfig +14 -9
@@ -4,9 +4,20 @@ if ARCH_SPEAR13XX -choice - prompt "SPEAr13XX Family" - default MACH_SPEAR1300 +menu "SPEAr13xx Implementations" +config BOARD_SPEAR1300_EVB + bool "SPEAr1300 Evaluation Board" + select MACH_SPEAR1300 + help + Supports ST SPEAr1300 Evaluation Board + +config BOARD_SPEAR1310_EVB + bool "SPEAr1310 Evaluation Board" + select MACH_SPEAR1310 + help + Supports ST SPEAr1310 Evaluation Board + +endmenu config MACH_SPEAR1300 bool "SPEAr1300"
@@ -18,10 +29,4 @@ config MACH_SPEAR1310 help Supports ST SPEAr1310 Machine -endchoice - -# Adding SPEAr13XX machine specific configuration files -source "arch/arm/mach-spear13xx/Kconfig1300" -source "arch/arm/mach-spear13xx/Kconfig1310" - endif #ARCH_SPEAR13XX
arch/arm/mach-spear13xx/Kconfig1300 deleted +0 -17
@@ -1,17 +0,0 @@ -# -# SPEAr1300 machine configuration file -# - -if MACH_SPEAR1300 - -choice - prompt "SPEAr1300 Boards" - default BOARD_SPEAR1300_EVB - -config BOARD_SPEAR1300_EVB - bool "SPEAr1300 Evaluation Board" - help - Supports ST SPEAr1300 Evaluation Board -endchoice - -endif #MACH_SPEAR1300
arch/arm/mach-spear13xx/Kconfig1310 deleted +0 -17
@@ -1,17 +0,0 @@ -# -# SPEAr1310 machine configuration file -# - -if MACH_SPEAR1310 - -choice - prompt "SPEAr1310 Boards" - default BOARD_SPEAR1310_EVB - -config BOARD_SPEAR1310_EVB - bool "SPEAr1310 Evaluation Board" - help - Supports ST SPEAr1310 Evaluation Board -endchoice - -endif #MACH_SPEAR1310
Signature · 1 line
1.7.2.2