Skip to contentSkip to conversation

arm926ejs: timer: Replace bss variable by gdr

PATCH New Heiko Schocher 6 participants 14 messages Dec 10, 2010 – Jan 24, 2011 Arm (32-bit)

lore
Share & tools
lore

Heiko Schocher

author
#0 lore raw

PATCH 1/1 arm926ejs: timer: Replace bss variable by gdr

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher <[email protected]>
cc Albert ARIBAUD <[email protected]>
cc Prafulla Wadaskar <[email protected]>
cc Stefano Babic <[email protected]>
cc Reinhard Meyer <[email protected]>
Signed-off-by Heiko Schocher <[email protected]>
---
 arch/arm/cpu/arm926ejs/davinci/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/kirkwood/timer.c  |    6 ++++--
 arch/arm/cpu/arm926ejs/mb86r0x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/mx25/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/mx27/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/omap/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/orion5x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/spear/timer.c     |    6 ++++--
 arch/arm/cpu/arm926ejs/versatile/timer.c |    6 ++++--
 9 files changed, 36 insertions(+), 18 deletions(-)
arch/arm/cpu/arm926ejs/davinci/timer.c +4 -2
index 9da7443..d7b1e46 100644
@@ -60,8 +60,10 @@ static struct davinci_timer * const timer =
 #define TIMER_LOAD_VAL	(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
 #define TIM_CLK_DIV	16
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 int timer_init(void)
 {
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
index 2ec6a93..3e80329 100644
@@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
 #define READ_TIMER			(readl(CNTMR_VAL_REG(UBOOT_CNTR)) /	\
 					 (CONFIG_SYS_TCLK / 1000))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 void reset_timer_masked(void)
 {
arch/arm/cpu/arm926ejs/mb86r0x/timer.c +4 -2
index 9175b71..6966b0d 100644
@@ -33,8 +33,10 @@
 #define TIMER_LOAD_VAL	0xffffffff
 #define TIMER_FREQ	(CONFIG_MB86R0x_IOCLK  / 256)
 
-static unsigned long long timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
arch/arm/cpu/arm926ejs/mx25/timer.c +4 -2
index 11d41a8..14f0c2d 100644
@@ -41,8 +41,10 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/mx27/timer.c +4 -2
index 8f1d47b..5c1cf01 100644
@@ -43,8 +43,10 @@
 #define GPTCR_CLKSOURCE_32	(4 << 1)	/* Clock source		*/
 #define GPTCR_TEN		1		/* Timer enable		*/
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/omap/timer.c +4 -2
index 7d4b6e6..88a0ee6 100644
@@ -42,8 +42,10 @@
 /* macro to read the 32 bit timer */
 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 int timer_init (void)
 {
arch/arm/cpu/arm926ejs/orion5x/timer.c +4 -2
index 089ef47..bbab226 100644
@@ -90,8 +90,10 @@ static inline ulong read_timer(void)
 	      / (CONFIG_SYS_TCLK / 1000);
 }
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 void reset_timer_masked(void)
 {
arch/arm/cpu/arm926ejs/spear/timer.c +4 -2
index 06858b4..66cf4de 100644
@@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p =
 static struct misc_regs *const misc_regs_p =
     (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 int timer_init(void)
 {
arch/arm/cpu/arm926ejs/versatile/timer.c +4 -2
index 81d6749..2e243b1 100644
@@ -42,8 +42,10 @@
 /* macro to read the 32 bit timer */
 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 #define TIMER_ENABLE	(1 << 7)
 #define TIMER_MODE_MSK	(1 << 6)
Signature · 1 line
1.7.2.3
#1 lore raw

PATCH 1/1 arm926ejs: timer: Replace bss variable by gdr

Quoted 31 lines

-----Original Message-----
From: Heiko Schocher [mailto:hs at denx.de]
Sent: Friday, December 10, 2010 3:03 PM
To: u-boot at lists.denx.de
Cc: Heiko Schocher; Albert ARIBAUD; Prafulla Wadaskar; Stefano Babic; Reinhard Meyer
Subject: [PATCH] arm926ejs: timer: Replace bss variable by gdr

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden.
In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher <[email protected]>
cc Albert ARIBAUD <[email protected]>
cc Prafulla Wadaskar <[email protected]>
cc Stefano Babic <[email protected]>
cc Reinhard Meyer <[email protected]>
Signed-off-by Heiko Schocher <[email protected]>
Quoted 12 lines
---
 arch/arm/cpu/arm926ejs/davinci/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/kirkwood/timer.c  |    6 ++++--
 arch/arm/cpu/arm926ejs/mb86r0x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/mx25/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/mx27/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/omap/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/orion5x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/spear/timer.c     |    6 ++++--
 arch/arm/cpu/arm926ejs/versatile/timer.c |    6 ++++--
 9 files changed, 36 insertions(+), 18 deletions(-)
Acked-by Prafulla Wadaskar <[email protected]>

Regards..
Prafulla . .

#2 lore raw

PATCH 1/1 arm926ejs: timer: Replace bss variable by gdr

In reply to Heiko Schocher
Quoted 13 lines · Heiko Schocher

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Quoted 7 lines
Signed-off-by Heiko Schocher <[email protected]>
cc Albert ARIBAUD <[email protected]>
cc Prafulla Wadaskar <[email protected]>
cc Stefano Babic <[email protected]>
cc Reinhard Meyer <[email protected]>
Signed-off-by Heiko Schocher <[email protected]>
Acked-by Stefano Babic <[email protected]>

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================
#3 lore raw

PATCH 1/1 arm926ejs: timer: Replace bss variable by gdr

In reply to Heiko Schocher

Le 10/12/2010 10:33, Heiko Schocher a ?crit :

Quoted 175 lines

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher<[email protected]>
cc Albert ARIBAUD<[email protected]>
cc Prafulla Wadaskar<[email protected]>
cc Stefano Babic<[email protected]>
cc Reinhard Meyer<[email protected]>
Signed-off-by Heiko Schocher<[email protected]>
---
  arch/arm/cpu/arm926ejs/davinci/timer.c   |    6 ++++--
  arch/arm/cpu/arm926ejs/kirkwood/timer.c  |    6 ++++--
  arch/arm/cpu/arm926ejs/mb86r0x/timer.c   |    6 ++++--
  arch/arm/cpu/arm926ejs/mx25/timer.c      |    6 ++++--
  arch/arm/cpu/arm926ejs/mx27/timer.c      |    6 ++++--
  arch/arm/cpu/arm926ejs/omap/timer.c      |    6 ++++--
  arch/arm/cpu/arm926ejs/orion5x/timer.c   |    6 ++++--
  arch/arm/cpu/arm926ejs/spear/timer.c     |    6 ++++--
  arch/arm/cpu/arm926ejs/versatile/timer.c |    6 ++++--
  9 files changed, 36 insertions(+), 18 deletions(-)
arch/arm/cpu/arm926ejs/davinci/timer.c +4 -2
index 9da7443..d7b1e46 100644
@@ -60,8 +60,10 @@ static struct davinci_timer * const timer =
  #define TIMER_LOAD_VAL	(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
  #define TIM_CLK_DIV	16
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
  int timer_init(void)
  {
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
index 2ec6a93..3e80329 100644
@@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
  #define READ_TIMER			(readl(CNTMR_VAL_REG(UBOOT_CNTR)) /	\
  					 (CONFIG_SYS_TCLK / 1000))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
  void reset_timer_masked(void)
  {
arch/arm/cpu/arm926ejs/mb86r0x/timer.c +4 -2
index 9175b71..6966b0d 100644
@@ -33,8 +33,10 @@
  #define TIMER_LOAD_VAL	0xffffffff
  #define TIMER_FREQ	(CONFIG_MB86R0x_IOCLK  / 256)
 
-static unsigned long long timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
  static inline unsigned long long tick_to_time(unsigned long long tick)
  {
arch/arm/cpu/arm926ejs/mx25/timer.c +4 -2
index 11d41a8..14f0c2d 100644
@@ -41,8 +41,10 @@
  #include<asm/io.h>
  #include<asm/arch/imx-regs.h>
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
  /*
   * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/mx27/timer.c +4 -2
index 8f1d47b..5c1cf01 100644
@@ -43,8 +43,10 @@
  #define GPTCR_CLKSOURCE_32	(4<<  1)	/* Clock source		*/
  #define GPTCR_TEN		1		/* Timer enable		*/
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
  /*
   * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/omap/timer.c +4 -2
index 7d4b6e6..88a0ee6 100644
@@ -42,8 +42,10 @@
  /* macro to read the 32 bit timer */
  #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
  int timer_init (void)
  {
arch/arm/cpu/arm926ejs/orion5x/timer.c +4 -2
index 089ef47..bbab226 100644
@@ -90,8 +90,10 @@ static inline ulong read_timer(void)
  	      / (CONFIG_SYS_TCLK / 1000);
  }
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
  void reset_timer_masked(void)
  {
arch/arm/cpu/arm926ejs/spear/timer.c +4 -2
index 06858b4..66cf4de 100644
@@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p =
  static struct misc_regs *const misc_regs_p =
      (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
  int timer_init(void)
  {
arch/arm/cpu/arm926ejs/versatile/timer.c +0 -0
index 81d6749..2e243b1 100644
@@ -42,8 +42,10 @@
  /* macro to read the 32 bit timer */
  #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))

arch/arm/cpu/arm926ejs/versatile/timer.c line 51

Quoted 10 lines
arch/arm/cpu/arm926ejs/versatile/timer.c +4 -2
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
  #define TIMER_ENABLE	(1<<  7)
  #define TIMER_MODE_MSK	(1<<  6)

Applied to u-boot-arm, with a trivial merge for davinci.

Amicalement,

Signature · 1 line
Albert.
#4 lore raw

PATCH 1/1 arm926ejs: timer: Replace bss variable by gdr

Le 20/01/2011 21:43, Albert ARIBAUD a ?crit :

Quoted 184 lines

Le 10/12/2010 10:33, Heiko Schocher a ?crit :

Quoted 183 lines

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher<[email protected]>
cc Albert ARIBAUD<[email protected]>
cc Prafulla Wadaskar<[email protected]>
cc Stefano Babic<[email protected]>
cc Reinhard Meyer<[email protected]>
Signed-off-by Heiko Schocher<[email protected]>
---
   arch/arm/cpu/arm926ejs/davinci/timer.c   |    6 ++++--
   arch/arm/cpu/arm926ejs/kirkwood/timer.c  |    6 ++++--
   arch/arm/cpu/arm926ejs/mb86r0x/timer.c   |    6 ++++--
   arch/arm/cpu/arm926ejs/mx25/timer.c      |    6 ++++--
   arch/arm/cpu/arm926ejs/mx27/timer.c      |    6 ++++--
   arch/arm/cpu/arm926ejs/omap/timer.c      |    6 ++++--
   arch/arm/cpu/arm926ejs/orion5x/timer.c   |    6 ++++--
   arch/arm/cpu/arm926ejs/spear/timer.c     |    6 ++++--
   arch/arm/cpu/arm926ejs/versatile/timer.c |    6 ++++--
   9 files changed, 36 insertions(+), 18 deletions(-)
arch/arm/cpu/arm926ejs/davinci/timer.c +4 -2
index 9da7443..d7b1e46 100644
@@ -60,8 +60,10 @@ static struct davinci_timer * const timer =
   #define TIMER_LOAD_VAL	(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
   #define TIM_CLK_DIV	16
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
   int timer_init(void)
   {
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
index 2ec6a93..3e80329 100644
@@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
   #define READ_TIMER			(readl(CNTMR_VAL_REG(UBOOT_CNTR)) /	\
   					 (CONFIG_SYS_TCLK / 1000))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
   void reset_timer_masked(void)
   {
arch/arm/cpu/arm926ejs/mb86r0x/timer.c +4 -2
index 9175b71..6966b0d 100644
@@ -33,8 +33,10 @@
   #define TIMER_LOAD_VAL	0xffffffff
   #define TIMER_FREQ	(CONFIG_MB86R0x_IOCLK  / 256)
 
-static unsigned long long timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
   static inline unsigned long long tick_to_time(unsigned long long tick)
   {
arch/arm/cpu/arm926ejs/mx25/timer.c +4 -2
index 11d41a8..14f0c2d 100644
@@ -41,8 +41,10 @@
   #include<asm/io.h>
   #include<asm/arch/imx-regs.h>
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
   /*
    * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/mx27/timer.c +4 -2
index 8f1d47b..5c1cf01 100644
@@ -43,8 +43,10 @@
   #define GPTCR_CLKSOURCE_32	(4<<   1)	/* Clock source		*/
   #define GPTCR_TEN		1		/* Timer enable		*/
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
   /*
    * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/omap/timer.c +4 -2
index 7d4b6e6..88a0ee6 100644
@@ -42,8 +42,10 @@
   /* macro to read the 32 bit timer */
   #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
   int timer_init (void)
   {
arch/arm/cpu/arm926ejs/orion5x/timer.c +4 -2
index 089ef47..bbab226 100644
@@ -90,8 +90,10 @@ static inline ulong read_timer(void)
   	      / (CONFIG_SYS_TCLK / 1000);
   }
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
   void reset_timer_masked(void)
   {
arch/arm/cpu/arm926ejs/spear/timer.c +4 -2
index 06858b4..66cf4de 100644
@@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p =
   static struct misc_regs *const misc_regs_p =
       (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
   int timer_init(void)
   {
arch/arm/cpu/arm926ejs/versatile/timer.c +4 -2
index 81d6749..2e243b1 100644
@@ -42,8 +42,10 @@
   /* macro to read the 32 bit timer */
   #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
Quoted 4 lines

arch/arm/cpu/arm926ejs/versatile/timer.c line 51

Quoted 2 lines
arch/arm/cpu/arm926ejs/versatile/timer.c +0 -0
   #define TIMER_ENABLE	(1<<   7)
   #define TIMER_MODE_MSK	(1<<   6)

Applied to u-boot-arm, with a trivial merge for davinci.

Correction -- can't apply it *and* retain correct authorship in commit. Heiko, can you post a rebased version?

Amicalement,

Signature · 1 line
Albert.
author
#5 lore raw

PATCH 1/1 arm926ejs: timer: Replace bss variable by gdr

Hello Albert,

Quoted 33 lines · Albert ARIBAUD

Le 20/01/2011 21:43, Albert ARIBAUD a ?crit :

Quoted 32 lines

Le 10/12/2010 10:33, Heiko Schocher a ?crit :

Quoted 31 lines

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher<[email protected]>
cc Albert ARIBAUD<[email protected]>
cc Prafulla Wadaskar<[email protected]>
cc Stefano Babic<[email protected]>
cc Reinhard Meyer<[email protected]>
Signed-off-by Heiko Schocher<[email protected]>
---
   arch/arm/cpu/arm926ejs/davinci/timer.c   |    6 ++++--
   arch/arm/cpu/arm926ejs/kirkwood/timer.c  |    6 ++++--
   arch/arm/cpu/arm926ejs/mb86r0x/timer.c   |    6 ++++--
   arch/arm/cpu/arm926ejs/mx25/timer.c      |    6 ++++--
   arch/arm/cpu/arm926ejs/mx27/timer.c      |    6 ++++--
   arch/arm/cpu/arm926ejs/omap/timer.c      |    6 ++++--
   arch/arm/cpu/arm926ejs/orion5x/timer.c   |    6 ++++--
   arch/arm/cpu/arm926ejs/spear/timer.c     |    6 ++++--
   arch/arm/cpu/arm926ejs/versatile/timer.c |    6 ++++--
   9 files changed, 36 insertions(+), 18 deletions(-)

[...]

Quoted 6 lines
Quoted 3 lines
Quoted 2 lines
   #define TIMER_ENABLE	(1<<   7)
   #define TIMER_MODE_MSK	(1<<   6)

Applied to u-boot-arm, with a trivial merge for davinci.

Correction -- can't apply it *and* retain correct authorship in commit. Heiko, can you post a rebased version?

Ok, I rebase this patch against current mainline, and send a new version.

bye,
Heiko

Signature · 2 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
author
#6 lore raw

PATCH v2 1/1 arm926ejs: timer: Replace bss variable by gdr

In reply to Heiko Schocher

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher <[email protected]>
cc Albert ARIBAUD <[email protected]>
cc Prafulla Wadaskar <[email protected]>
cc Stefano Babic <[email protected]>
cc Reinhard Meyer <[email protected]>

---
- changes since v1:
rebased and fixed an trivial merge issue in
arch/arm/cpu/arm926ejs/davinci/timer.c

 arch/arm/cpu/arm926ejs/davinci/timer.c   |    4 ++++
 arch/arm/cpu/arm926ejs/kirkwood/timer.c  |    6 ++++--
 arch/arm/cpu/arm926ejs/mb86r0x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/mx25/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/mx27/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/omap/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/orion5x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/spear/timer.c     |    6 ++++--
 arch/arm/cpu/arm926ejs/versatile/timer.c |    6 ++++--
 9 files changed, 36 insertions(+), 16 deletions(-)
arch/arm/cpu/arm926ejs/davinci/timer.c +4 -0
index 1c6fa4a..9fff95e 100644
@@ -62,6 +62,10 @@ static struct davinci_timer * const timer =
 #define TIMER_LOAD_VAL	0xffffffff
 
 #define TIM_CLK_DIV	16
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 int timer_init(void)
 {
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
index 2ec6a93..3e80329 100644
@@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
 #define READ_TIMER			(readl(CNTMR_VAL_REG(UBOOT_CNTR)) /	\
 					 (CONFIG_SYS_TCLK / 1000))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 void reset_timer_masked(void)
 {
arch/arm/cpu/arm926ejs/mb86r0x/timer.c +4 -2
index 9175b71..6966b0d 100644
@@ -33,8 +33,10 @@
 #define TIMER_LOAD_VAL	0xffffffff
 #define TIMER_FREQ	(CONFIG_MB86R0x_IOCLK  / 256)
 
-static unsigned long long timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
arch/arm/cpu/arm926ejs/mx25/timer.c +4 -2
index 11d41a8..14f0c2d 100644
@@ -41,8 +41,10 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/mx27/timer.c +4 -2
index 8f1d47b..5c1cf01 100644
@@ -43,8 +43,10 @@
 #define GPTCR_CLKSOURCE_32	(4 << 1)	/* Clock source		*/
 #define GPTCR_TEN		1		/* Timer enable		*/
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/omap/timer.c +4 -2
index 7d4b6e6..88a0ee6 100644
@@ -42,8 +42,10 @@
 /* macro to read the 32 bit timer */
 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 int timer_init (void)
 {
arch/arm/cpu/arm926ejs/orion5x/timer.c +4 -2
index 089ef47..bbab226 100644
@@ -90,8 +90,10 @@ static inline ulong read_timer(void)
 	      / (CONFIG_SYS_TCLK / 1000);
 }
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 void reset_timer_masked(void)
 {
arch/arm/cpu/arm926ejs/spear/timer.c +4 -2
index 06858b4..66cf4de 100644
@@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p =
 static struct misc_regs *const misc_regs_p =
     (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 int timer_init(void)
 {
arch/arm/cpu/arm926ejs/versatile/timer.c +4 -2
index 81d6749..2e243b1 100644
@@ -42,8 +42,10 @@
 /* macro to read the 32 bit timer */
 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 #define TIMER_ENABLE	(1 << 7)
 #define TIMER_MODE_MSK	(1 << 6)
Signature · 1 line
1.7.3.4
author
#7 lore raw

PATCH v3 1/1 arm926ejs: timer: Replace bss variable by gdr

In reply to Heiko Schocher

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher <[email protected]>
cc Albert ARIBAUD <[email protected]>
cc Prafulla Wadaskar <[email protected]>
cc Stefano Babic <[email protected]>
cc Reinhard Meyer <[email protected]>

---
- changes since v1:
rebased and fixed an trivial merge issue in arch/arm/cpu/arm926ejs/davinci/timer.c
- changes since v2:
removed changes in arch/arm/cpu/arm926ejs/davinci/timer.c complete, as this is fixed in the meantime

 arch/arm/cpu/arm926ejs/kirkwood/timer.c  |    6 ++++--
 arch/arm/cpu/arm926ejs/mb86r0x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/mx25/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/mx27/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/omap/timer.c      |    6 ++++--
 arch/arm/cpu/arm926ejs/orion5x/timer.c   |    6 ++++--
 arch/arm/cpu/arm926ejs/spear/timer.c     |    6 ++++--
 arch/arm/cpu/arm926ejs/versatile/timer.c |    6 ++++--
 8 files changed, 32 insertions(+), 16 deletions(-)
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
index 2ec6a93..3e80329 100644
@@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
 #define READ_TIMER			(readl(CNTMR_VAL_REG(UBOOT_CNTR)) /	\
 					 (CONFIG_SYS_TCLK / 1000))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 void reset_timer_masked(void)
 {
arch/arm/cpu/arm926ejs/mb86r0x/timer.c +4 -2
index 9175b71..6966b0d 100644
@@ -33,8 +33,10 @@
 #define TIMER_LOAD_VAL	0xffffffff
 #define TIMER_FREQ	(CONFIG_MB86R0x_IOCLK  / 256)
 
-static unsigned long long timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
arch/arm/cpu/arm926ejs/mx25/timer.c +4 -2
index 11d41a8..14f0c2d 100644
@@ -41,8 +41,10 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/mx27/timer.c +4 -2
index 8f1d47b..5c1cf01 100644
@@ -43,8 +43,10 @@
 #define GPTCR_CLKSOURCE_32	(4 << 1)	/* Clock source		*/
 #define GPTCR_TEN		1		/* Timer enable		*/
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastinc gd->lastinc
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
arch/arm/cpu/arm926ejs/omap/timer.c +4 -2
index 7d4b6e6..88a0ee6 100644
@@ -42,8 +42,10 @@
 /* macro to read the 32 bit timer */
 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 int timer_init (void)
 {
arch/arm/cpu/arm926ejs/orion5x/timer.c +4 -2
index 089ef47..bbab226 100644
@@ -90,8 +90,10 @@ static inline ulong read_timer(void)
 	      / (CONFIG_SYS_TCLK / 1000);
 }
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 void reset_timer_masked(void)
 {
arch/arm/cpu/arm926ejs/spear/timer.c +4 -2
index 06858b4..66cf4de 100644
@@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p =
 static struct misc_regs *const misc_regs_p =
     (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 int timer_init(void)
 {
arch/arm/cpu/arm926ejs/versatile/timer.c +4 -2
index 81d6749..2e243b1 100644
@@ -42,8 +42,10 @@
 /* macro to read the 32 bit timer */
 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
 
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc
 
 #define TIMER_ENABLE	(1 << 7)
 #define TIMER_MODE_MSK	(1 << 6)
Signature · 1 line
1.7.3.4
#8 lore raw

PATCH v3 1/1 arm926ejs: timer: Replace bss variable by gdr

Hi Heiko,

Le 21/01/2011 09:56, Heiko Schocher a ?crit :

Quoted 10 lines

Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation.

The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted.

This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer.

Quoted 8 lines

Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board

Signed-off-by Heiko Schocher<[email protected]>
cc Albert ARIBAUD<[email protected]>
cc Prafulla Wadaskar<[email protected]>
cc Stefano Babic<[email protected]>
cc Reinhard Meyer<[email protected]>

Applied to u-boot-arm, thanks.

Amicalement,

Signature · 1 line
Albert.
#9 lore raw

PATCH v3 1/1 arm926ejs: timer: Replace bss variable by gdr

In reply to Heiko Schocher

Hello,

Am 21.01.2011 09:56, schrieb Heiko Schocher:

arch/arm/cpu/arm926ejs/kirkwood/timer.c struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; · line 89

Quoted 6 lines
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc

I'm the only one who doesn't like such defines? They might be handy for quick fixes, but in regard to style and readablity I don't like them. When looking at teh code where they will used, you won't see the actual place where they are stored. And in more complex expression they might become dangerous to use because they hide the operator "->".

Regards,

Alexander

#10 lore raw

PATCH v3 1/1 arm926ejs: timer: Replace bss variable by gdr

Le 22/01/2011 06:39, Alexander Holler a ?crit :

Quoted 4 lines

Hello,

Am 21.01.2011 09:56, schrieb Heiko Schocher:

Quoted 12 lines

arch/arm/cpu/arm926ejs/kirkwood/timer.c struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; · line 89

Quoted 6 lines
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc

I'm the only one who doesn't like such defines? They might be handy for quick fixes, but in regard to style and readablity I don't like them. When looking at teh code where they will used, you won't see the actual place where they are stored. And in more complex expression they might become dangerous to use because they hide the operator "->".

I accept the patch because it un-breaks support for ARM cpus, and I prefer a working fix to a perfect fix in this specific, transitional, situation.

However a general rework of ARM timer code is in order so that all SoCs and CPUs share the same set of gd variables with the same names and the same logic; and when we get that, this code shall move along.

About this rework, as the saying goes... "Patches Welcome ?". :)

Quoted 3 lines

Regards,

Alexander

Amicalement,

Signature · 1 line
Albert.
#11 lore raw

PATCH v3 1/1 arm926ejs: timer: Replace bss variable by gdr

Dear Albert ARIBAUD,

Quoted 5 lines

However a general rework of ARM timer code is in order so that all SoCs and CPUs share the same set of gd variables with the same names and the same logic; and when we get that, this code shall move along.

About this rework, as the saying goes... "Patches Welcome ?". :)

There were several suggestions about that in the past (including from me) that involve rework everywhere HZ related timeouts are used. I still prefer a method as follows (because it does not need repeated mul/div calculations nor necessarily 64 bit arithmetic):

u32 timeout = timeout_init(100); /* 100ms timeout */

do {...} while (!timed_out(timeout));

Internally it would be like:

timeout_init(x):
return fast_tick + (x * fast_tick_rate) / CONFIG_SYS_HZ; /* this might need 64 bit precision in some implementations */

time_out(x):
return ((i32)(x - fast_tick)) < 0;

If the tick were really high speed (and then 64 bits), fast_tick could be derived by shifting the tick some bits to the right.

But, as long as we cannot agree on something, there will be no time spent to make patches...

Best Regards,
Reinhard

#12 lore raw

PATCH v3 1/1 arm926ejs: timer: Replace bss variable by gdr

In reply to Albert ARIBAUD

Am 22.01.2011 08:46, schrieb Albert ARIBAUD:

Quoted 18 lines

Le 22/01/2011 06:39, Alexander Holler a ?crit :

Quoted 4 lines

Hello,

Am 21.01.2011 09:56, schrieb Heiko Schocher:

Quoted 12 lines

arch/arm/cpu/arm926ejs/kirkwood/timer.c struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; · line 89

Quoted 6 lines
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc

I'm the only one who doesn't like such defines? They might be handy for quick fixes, but in regard to style and readablity I don't like them. When looking at teh code where they will used, you won't see the actual place where they are stored. And in more complex expression they might become dangerous to use because they hide the operator "->".

Quoted 3 lines

I accept the patch because it un-breaks support for ARM cpus, and I prefer a working fix to a perfect fix in this specific, transitional, situation.

My experience is that such quick fixes (or workarounds) usually manifests (because they become forgotten) and later on might even be copied to other places. ;)

Anyway, I'll have to thank for that patch, because it fixes at least one of the problems I have while trying to chainload a 2010.12 from a 2010.12 on a kirkwood system.

Regards, and again, thanks for the patch, even if I found it ugly,

Alexander

author
#13 lore raw

PATCH v3 1/1 arm926ejs: timer: Replace bss variable by gdr

Hello Alexander,

Quoted 19 lines · Alexander Holler

Am 22.01.2011 08:46, schrieb Albert ARIBAUD:

Quoted 18 lines

Le 22/01/2011 06:39, Alexander Holler a ?crit :

Quoted 16 lines

Hello,

Am 21.01.2011 09:56, schrieb Heiko Schocher:

arch/arm/cpu/arm926ejs/kirkwood/timer.c struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; · line 89

Quoted 6 lines
arch/arm/cpu/arm926ejs/kirkwood/timer.c +4 -2
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd->tbl
+#define lastdec gd->lastinc

I'm the only one who doesn't like such defines? They might be handy for quick fixes, but in regard to style and readablity I don't like them. When looking at teh code where they will used, you won't see the actual place where they are stored. And in more complex expression they might become dangerous to use because they hide the operator "->".

Quoted 6 lines
Quoted 3 lines

I accept the patch because it un-breaks support for ARM cpus, and I prefer a working fix to a perfect fix in this specific, transitional, situation.

My experience is that such quick fixes (or workarounds) usually manifests (because they become forgotten) and later on might even be

As this is a open source project, feel free to work with us, that this get not forgotten!

Quoted 1 line

copied to other places. ;)

Yes, it is not the best solution, but it fixes a bug. The patch is some days old (and made as a quick fix), and I vote also to make a better approach for timers on arm, but in the time this patch was pending none did a better (accepted) approach...

Quoted 5 lines

Anyway, I'll have to thank for that patch, because it fixes at least one of the problems I have while trying to chainload a 2010.12 from a 2010.12 on a kirkwood system.

Regards, and again, thanks for the patch, even if I found it ugly,

As I said above, feel free to post a patch with a better approach.

bye,
Heiko

Signature · 2 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany