fsl_pmic: add I2C interface support
Subsystems (7)
PATCH v3 1/3 fsl_pmic: add I2C interface support
This patch add I2C interface for fsl_pmic driver support
---
Changes for v2:
- Address the comments from Stefano,
- factor out the param_check in pmic_reg for both spi/i2c
--- drivers/misc/fsl_pmic.c | 52 ++++++++++++++++++++++++++++++++++++++++++---- 1 files changed, 47 insertions(+), 5 deletions(-)
drivers/misc/fsl_pmic.c +47 -5
@@ -22,11 +22,55 @@#include <config.h> #include <common.h> -#include <spi.h> #include <asm/errno.h> #include <linux/types.h> #include <fsl_pmic.h> +static int check_param (u32 reg,u32 write) +{ +if (reg >63 || write >1 ) { +printf ("<reg num> = %d is invalid. Should be less then 63\n" , + reg); +return -1 ; + } + +return 0 ; +} + +#ifdef CONFIG_FSL_PMIC_I2C +#include <i2c.h> +static int init_done; + +u32 pmic_reg (u32 reg,u32 val,u32 write) +{ +unsigned char buf[4 ] = {0 }; +u32 ret_val =0 ; + +if (check_param (reg, write)) +return -1 ; + +if (init_done ==0 ) { +i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); + init_done =1 ; + } + +if (write) { + buf[0 ] = (val >>16 ) &0xff ; + buf[1 ] = (val >>8 ) &0xff ; + buf[2 ] = (val) &0xff ; +if (i2c_write (CONFIG_SYS_FSL_PMIC_I2C_ADDR , reg,1 , buf,3 )) +return -1 ; + }else { +if (i2c_read (CONFIG_SYS_FSL_PMIC_I2C_ADDR , reg,1 , buf,3 )) { +return -1 ; + ret_val = buf[0 ] <<16 | buf[1 ] <<8 | buf[2 ]; + } + } + +return ret_val; +} +#else /* SPI interface */ +#include <spi.h> static struct spi_slave *slave;struct spi_slave *pmic_spi_probe (void )
@@ -55,11 +99,8 @@ u32 pmic_reg(u32 reg, u32 val, u32 write)return -1 ; } -if (reg >63 || write >1 ) { -printf ("<reg num> = %d is invalid. Should be less then 63\n" , - reg); +if (check_param (reg, write))return -1 ; - }if (spi_claim_bus (slave))return -1 ;
@@ -87,6 +128,7 @@ u32 pmic_reg(u32 reg, u32 val, u32 write)spi_release_bus (slave); return cpu_to_be32(pmic_rx); } +#endif void pmic_reg_write (u32 reg,u32 value) {
Signature · 1 line
1.7.0.4
PATCH v3 1/8 MX5: Add initial support for MX53 processor
Add initial support for Freescale MX53 processor,
- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input of setup_pll macro
---
Changes for v2:
-address some comments of Stefano Babic, remove the is_soc_type
and use #ifdef,
-address the comments of stefano, remove CPU_TYPE def, remove something
like /*0x760*/ comments in mx5x_pins.h.
-fix the build break for vision2 board
--- arch/arm/cpu/armv7/mx5/iomux.c | 30 ++- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 91 +++--- arch/arm/cpu/armv7/mx5/soc.c | 22 +- arch/arm/include/asm/arch-mx5/asm-offsets.h | 5 + arch/arm/include/asm/arch-mx5/imx-regs.h | 78 ++--- arch/arm/include/asm/arch-mx5/iomux.h | 102 ------ arch/arm/include/asm/arch-mx5/mx5x_pins.h | 469 ++++++++++++++++++++++++++- include/configs/mx51evk.h | 3 +- include/configs/vision2.h | 3 +- 9 files changed, 599 insertions(+), 204 deletions(-)
arch/arm/cpu/armv7/mx5/iomux.c +25 -5
@@ -34,7 +34,7 @@ enum iomux_reg_addr {IOMUXSW_MUX_CTL =IOMUXC_BASE_ADDR ,IOMUXSW_MUX_END =IOMUXC_BASE_ADDR +MUX_I_END ,IOMUXSW_PAD_CTL =IOMUXC_BASE_ADDR +PAD_I_START , - IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR, + IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + INPUT_CTL_START, };#define MUX_PIN_NUM_MAX (((MUX_I_END - MUX_I_START) >> 2) + 1)
@@ -44,11 +44,12 @@ static inline u32 get_mux_reg(iomux_pin_name_t pin) { u32 mux_reg = PIN_TO_IOMUX_MUX(pin); +#if defined(CONFIG_MX51) if (is_soc_rev(CHIP_REV_2_0) < 0) { /* * Fixup register address: -* i.MX51 TO1 has offset with the register -* which is define as TO2. + * i.MX51 TO1 has offset with the register + * which is define as TO2. */ if ((pin == MX51_PIN_NANDF_RB5) || (pin == MX51_PIN_NANDF_RB6) ||
@@ -59,6 +60,7 @@ static inline u32 get_mux_reg(iomux_pin_name_t pin) else if (mux_reg >= 0x130) mux_reg += 0xC; } +#endif mux_reg += IOMUXSW_MUX_CTL; return mux_reg; }
@@ -68,11 +70,12 @@ static inline u32 get_pad_reg(iomux_pin_name_t pin) { u32 pad_reg = PIN_TO_IOMUX_PAD(pin); +#if defined(CONFIG_MX51) if (is_soc_rev(CHIP_REV_2_0) < 0) { /* * Fixup register address: -* i.MX51 TO1 has offset with the register -* which is define as TO2. + * i.MX51 TO1 has offset with the register + * which is define as TO2. */ if ((pin == MX51_PIN_NANDF_RB5) || (pin == MX51_PIN_NANDF_RB6) ||
@@ -91,6 +94,7 @@ static inline u32 get_pad_reg(iomux_pin_name_t pin) else pad_reg += 8; } +#endif pad_reg +=IOMUXSW_PAD_CTL ;return pad_reg; }
@@ -98,10 +102,13 @@ static inline u32 get_pad_reg(iomux_pin_name_t pin)/* Get the last iomux register address */ static inline u32 get_mux_end (void ) { +#if defined(CONFIG_MX51 )if (is_soc_rev (CHIP_REV_2_0 ) <0 )return IOMUXC_BASE_ADDR + (0x3F8 -4 );else return IOMUXC_BASE_ADDR + (0x3F0 -4 ); +#endif +return IOMUXSW_MUX_END ; }/*
@@ -164,3 +171,16 @@ unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin)u32 pad_reg =get_pad_reg (pin);return readl (pad_reg); } + +/* +* This function configures daisy-chain +* +* @param input index of input select register +* @param config the binary value of elements +*/ +void mxc_iomux_set_input (iomux_input_select_t input,u32 config) +{ +u32 reg =IOMUXSW_INPUT_CTL + (input <<2 ); + +writel (config, reg); +}
arch/arm/cpu/armv7/mx5/lowlevel_init.S +54 -37
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arch/arm/cpu/armv7/mx5/soc.c +17 -5
@@ -33,17 +33,20 @@#include <fsl_esdhc.h> #endif -#if defined(CONFIG_MX51 ) -#define CPU_TYPE 0x51000 -#else +#if !(defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ))#error "CPU_TYPE not defined"#endif u32 get_cpu_rev (void ) { -int system_rev =CPU_TYPE ; +#ifdef CONFIG_MX51 +int system_rev =0x51000 ; +#else +int system_rev =0x53000 ; +#endif int reg =__raw_readl (ROM_SI_REV ); +#if defined(CONFIG_MX51 )switch (reg) {case 0x02 : system_rev |=CHIP_REV_1_1 ;
@@ -57,11 +60,20 @@ u32 get_cpu_rev(void)case 0x20 : system_rev |=CHIP_REV_3_0 ;break ; -return system_rev;default : system_rev |=CHIP_REV_1_0 ; break; } +#else +switch (reg) { +case 0x20 : + system_rev |=CHIP_REV_2_0 ; +break ; +default : + system_rev |=CHIP_REV_1_0 ; +break ; + } +#endif return system_rev; }
arch/arm/include/asm/arch-mx5/asm-offsets.h +5 -0
@@ -37,7 +37,12 @@#define CLKCTL_CCGR4 0x78#define CLKCTL_CCGR5 0x7C#define CLKCTL_CCGR6 0x80 +#if defined(CONFIG_MX53 ) +#define CLKCTL_CCGR7 0x84#define CLKCTL_CMEOR 0x84 +#elif defined(CONFIG_MX51 ) +#define CLKCTL_CMEOR 0x84 +#endif /* DPLL */ #define PLL_DP_CTL 0x00
arch/arm/include/asm/arch-mx5/imx-regs.h +29 -49
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arch/arm/include/asm/arch-mx5/iomux.h +0 -102
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arch/arm/include/asm/arch-mx5/mx5x_pins.h +466 -3
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include/configs/mx51evk.h +1 -2
@@ -24,8 +24,6 @@#ifndef __CONFIG_H#define __CONFIG_H -#include <asm/arch/imx-regs.h> -/* High Level Configuration Options */ #define CONFIG_MX51 /* in a mx51 */
@@ -37,6 +35,7 @@#define CONFIG_L2_OFF +#include <asm/arch/imx-regs.h> /* * Disabled for now due to build problems under Debian and a significant * increase in the final file size: 144260 vs. 109536 Bytes.
include/configs/vision2.h +2 -1
@@ -24,11 +24,12 @@#ifndef __CONFIG_H#define __CONFIG_H -#include <asm/arch/imx-regs.h> #define CONFIG_MX51 /* in a mx51 */ #define CONFIG_L2_OFF +#include <asm/arch/imx-regs.h> +#define CONFIG_SYS_MX5_HCLK 24000000#define CONFIG_SYS_MX5_CLK32 32768#define CONFIG_DISPLAY_CPUINFO
Signature · 1 line
1.7.0.4
PATCH v3 1/8 MX5: Add initial support for MX53 processor
Quoted 5 lines · Jason Liu
Add initial support for Freescale MX53 processor,
- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input ofsetup_pllmacro
Hi Jason,
Quoted 5 lines
arch/arm/include/asm/arch-mx5/asm-offsets.h +0
-0
arch/arm/include/asm/arch-mx5/asm-offsets.h line 45
Quoted 9 lines
arch/arm/include/asm/arch-mx5/asm-offsets.h +5
-0@@ -37,7 +37,12 @@#define CLKCTL_CCGR4 0x78#define CLKCTL_CCGR5 0x7C#define CLKCTL_CCGR6 0x80 +#if defined(CONFIG_MX53 ) +#define CLKCTL_CCGR7 0x84#define CLKCTL_CMEOR 0x84 +#elif defined(CONFIG_MX51 ) +#define CLKCTL_CMEOR 0x84 +#endif
It seems to me that CLKCTL_CMEOR should be dropped in the CONFIG_MX53 case, as its offset is reserved for CLKCTL_CCGR7.
arch/arm/include/asm/arch-mx5/asm-offsets.h
Quoted 4 lines
arch/arm/include/asm/arch-mx5/asm-offsets.h +0
-1-/*! * Number of GPIO port as defined in the IC Spec */ #define GPIO_PORT_NUM 4
I see now that GPIO_PORT_NUM seems superfluous, and it is not used in any part of code. Please drop it :-)
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================
PATCH v3 1/8 MX5: Add initial support for MX53 processor
Hi, Stefano,
2010/12/30 Stefano Babic <[email protected]>:
Quoted 18 lines · Jason Liu
Quoted 5 lines
Add initial support for Freescale MX53 processor,
- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input ofsetup_pllmacroHi Jason,
Quoted 9 lines
arch/arm/include/asm/arch-mx5/asm-offsets.h +0
-0@@ -37,7 +37,12 @@?#define
CLKCTL_CCGR4? ? ? ? ? ?0x78
?#defineCLKCTL_CCGR5? ? ? ? ? ?0x7C
?#defineCLKCTL_CCGR6? ? ? ? ? ?0x80
+#ifdefined(CONFIG_MX53)
Quoted 8 lines
arch/arm/include/asm/arch-mx5/asm-offsets.h line 45
Quoted 5 lines
+#define
CLKCTL_CCGR7? ? ? ? ? ?0x84
?#defineCLKCTL_CMEOR? ? ? ? ? ?0x84arch/arm/include/asm/arch-mx5/asm-offsets.h +3
-0+#elif defined(CONFIG_MX51 ) +#define CLKCTL_CMEOR ? ? ? ? ? ?0x84 +#endif It seems to me that
CLKCTL_CMEORshould be dropped in theCONFIG_MX53case, as its offset is reserved forCLKCTL_CCGR7.
I will fix the CLKCTL_CMEOR offset in MX53. Thanks for the careful review.
Quoted 8 lines
Quoted 5 lines
-/*!
? * Number of GPIO port as defined in the IC Spec
? */
?#defineGPIO_PORT_NUM? ? ? ? ? ? ? ?4I see now that
GPIO_PORT_NUMseems superfluous, and it is not used in any part of code. Please drop it :-)
OK,
Quoted 15 lines
Best regards,
Stefano Babic--
=====================================================================
DENX Software Engineering GmbH, ? ? MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 ?Email: office at denx.de
=====================================================================
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PATCH v3 2/8 fec_mxc: add support for MX53 processor
In reply to Jason LiuThis patch add FEC support for Freescale MX53 processor
--- drivers/net/fec_mxc.c | 2 +- drivers/net/fec_mxc.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-)
drivers/net/fec_mxc.c +1 -1
@@ -354,7 +354,7 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); -#ifdef CONFIG_MX25 +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/* * setup the MII gasket for RMII mode
drivers/net/fec_mxc.h +2 -2
@@ -147,7 +147,7 @@ struct ethernet_regs {uint32_t res14[7 ];/* MBAR_ETH + 0x2E4-2FC */ -#ifdef CONFIG_MX25 +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )uint16_t miigsk_cfgr;/* MBAR_ETH + 0x300 */ uint16_t res15[3 ];/* MBAR_ETH + 0x302-306 */ uint16_t miigsk_enr;/* MBAR_ETH + 0x308 */
@@ -204,7 +204,7 @@ struct ethernet_regs {#define FEC_ECNTRL_RESET 0x00000001/* reset the FEC */ #define FEC_ECNTRL_ETHER_EN 0x00000002/* enable the FEC */ -#ifdef CONFIG_MX25 +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )/* defines for MIIGSK */ /* RMII frequency control: 0=50MHz, 1=5MHz */ #define MIIGSK_CFGR_FRCONT (1 << 6)
Signature · 1 line
1.7.0.4
PATCH v3 2/3 imximage: Add MX53 boot image support
In reply to Jason LiuThis patch add the MX53 boot image support.
This patch has been tested on Freescale MX53EVK board and MX51EVK board.
---
Changes for v2:
- Address the following comments from Stefano,
- Get rid of #ifdef in the imximage.h and .c file and use the runtime check for imximage version
- Document the IMXIMAGE_VERSION definiton in doc/README.imximage
- Move mx53evk/config.mk and mx53evk/imximage.cfg to MX53EVK board support patch.
--- board/freescale/mx51evk/imximage.cfg | 4 + board/ttcontrol/vision2/imximage_hynix.cfg | 4 + doc/README.imximage | 10 +- tools/imximage.c | 357 ++++++++++++++++++++++------ tools/imximage.h | 98 ++++++-- 5 files changed, 382 insertions(+), 91 deletions(-)
board/freescale/mx51evk/imximage.cfg +4 -0
@@ -25,6 +25,10 @@ # # The syntax is taken as close as possible with the kwbimage +# Imximage version + +IMXIMAGE_VERSION 1 + # Boot Device : one of # spi, sd (the board has no nand neither onenand)
board/ttcontrol/vision2/imximage_hynix.cfg +4 -0
@@ -28,6 +28,10 @@ # # The syntax is taken as close as possible with the kwbimage +# Imximage version + +IMXIMAGE_VERSION 2 + # Boot Device : one of # spi, nand, onenand, sd
doc/README.imximage +8 -2
@@ -57,6 +57,11 @@ Configuration command line syntax: 2. Following are the valid command strings and associated data strings:- Command string data string -------------- ----------- + IMXIMAGE_VERSION 1/2 + 1 is for mx25/mx35/mx51 compatible, + 2 is for mx53 compatible, + others is invalid and error is generated. + BOOT_FROM nand/spi/sd/onenand Example: BOOT_FROM spi
@@ -69,8 +74,9 @@ Configuration command line syntax: Example (write to IOMUXC): DATA 4 0x73FA88a0 0x200 -The processor support up to 60 register programming commands. An error -is generated if more commands are found in the configuration file. +The processor support up to 60 register programming commands for IMXIMAGE_VERSION 1 +and 121 register programming commands for IMXIMAGE_VERSION 2. +An error is generated if more commands are found in the configuration file. 3. All commands are optional to program.
tools/imximage.c +289 -68
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tools/imximage.h +77 -21
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Signature · 1 line
1.7.0.4
PATCH v3 2/3 imximage: Add MX53 boot image support
2010/12/29 Jason Liu <[email protected]>:
Quoted 7 lines
This patch add the MX53 boot image support.
This patch has been tested on Freescale MX53EVK board and MX51EVK board.
Signed-off-by Jason Liu <[email protected]>
Please ignore the patch. Send it wrongly. Sorry for the noise.
Quoted 7 lines
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PATCH v3 3/3 MX5:MX53: add initial support for MX53EVK board
In reply to Jason LiuAdd initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been support.
---
Changes for v2:
-Address the comments from Stefano, Albert and Wolfgang,
-remove the ivt.S file and use imximage.cfg instead,
-remove the ivt link to u-boot
-Address the comments from Stefano,
-Correct the copyright issue,
-Use mxc_get_gpio() and mxc_set_gpio() accessors.
-Get rid of system_rev,
-use i2c enumeration value (0,1,..N) instead of BASE address, -use fsl_pmic i2c interface,
-Add comments for why manage the pmic in a different way for TO2 -Remove the comments from configs/mx53evk.h,
- /*
- * Disabled for now due to build problems under Debian and a significant
- * increase in the final file size: 144260 vs. 109536 Bytes.
- */
-Address the comments from Wolfgang,
-Move CONFIG_SYS_TEXT_BASE to board config file,
-Remove the comments from configs/mx53evk.h
- /* size in bytes reserved for initial data */
#define BOARD_LATE_INIT
-Change the comments, * Hardware drivers to * UART drivers
Changes for v3:
- put uart and fec iomux setting to board_early_init_f so that uart can print out the early information such as uboot banner and cpuinfo etc.
- put mxc_gpio patch into this commit according to Stefno comments,
- Put maintainer name to ARM list according to Stefano comments,
- Use Macro instead of constant value for PMIC accord to Stefano comments,
- Remove CONFIG_I2C_MXC and BOARD_LATE_INIT accord to Stefano comments,
- Add config.mk and imximage.cfg files to this patch as Stefano comments,
--- MAINTAINERS | 4 + board/freescale/mx53evk/Makefile | 48 ++++ board/freescale/mx53evk/config.mk | 25 +++ board/freescale/mx53evk/imximage.cfg | 112 ++++++++++ board/freescale/mx53evk/mx53evk.c | 397 ++++++++++++++++++++++++++++++++++ boards.cfg | 1 + drivers/gpio/mxc_gpio.c | 9 +- include/configs/mx53evk.h | 217 +++++++++++++++++++ include/mc13892.h | 5 + 9 files changed, 816 insertions(+), 2 deletions(-)
MAINTAINERS +4 -0
@@ -555,6 +555,10 @@ Stefano Babic <[email protected]> mx51evk i.MX51 vision2 i.MX51 +Jason Liu <[email protected]> + + MX53evk i.MX53 + Enric Balletbo i Serra <[email protected]> igep0020 ARM ARMV7 (OMAP3xx SoC)
board/freescale/mx53evk/Makefile new file +48 -0
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board/freescale/mx53evk/config.mk new file +25 -0
@@ -0,0 +1,25 @@ +# +# Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg +ALL += $(obj)u-boot.imx +
board/freescale/mx53evk/imximage.cfg new file +112 -0
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board/freescale/mx53evk/mx53evk.c new file +397 -0
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boards.cfg +1 -0
@@ -101,6 +101,7 @@ omap5912osk arm arm926ejs - ti edminiv2 arm arm926ejs - LaCie orion5x ca9x4_ct_vxp arm armv7 vexpress armltd mx51evk arm armv7 mx51evk freescale mx5 +mx53evk arm armv7 mx53evk freescale mx5 vision2 arm armv7 vision2 ttcontrol mx5 omap3_overo arm armv7 overo - omap3 omap3_pandora arm armv7 pandora - omap3
drivers/gpio/mxc_gpio.c +7 -2
@@ -24,7 +24,7 @@#ifdef CONFIG_MX31 #include <asm/arch/mx31-regs.h> #endif -#ifdef CONFIG_MX51 +#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 )#include <asm/arch/imx-regs.h> #endif #include <asm/io.h>
@@ -35,9 +35,14 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#ifdef CONFIG_MX51 +#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) [3] = GPIO4_BASE_ADDR,#endif +#if defined(CONFIG_MX53 ) + [4] = GPIO5_BASE_ADDR, + [5] = GPIO6_BASE_ADDR, + [6] = GPIO7_BASE_ADDR, +#endif };int mxc_gpio_direction (unsigned int gpio,enum mxc_gpio_direction direction)
include/configs/mx53evk.h new file +217 -0
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include/mc13892.h +5 -0
@@ -160,4 +160,9 @@/* Reg Power Control 2*/ #define WDIRESET (1 << 12) +/* SWx Output Volts */ +#define SWX_OUT_MASK 0x1F +#define SWX_OUT_1_25 0x1A +#define SWX_OUT_1_30 0X1C +#endif
Signature · 1 line
1.7.0.4
PATCH v3 3/3 MX5:MX53: add initial support for MX53EVK board
2010/12/29 Jason Liu <[email protected]>:
Quoted 5 lines
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been support.Signed-off-by Jason Liu <[email protected]>
Please ignore this patch. Send it wrongly. Sorry for the noise.
Quoted 7 lines
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PATCH v3 3/3 MX5:MX53: add initial support for MX53EVK board
In reply to Jason LiuQuoted 4 lines · Jason Liu
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been support.Signed-off-by Jason Liu <[email protected]>
Hi Jason,
Quoted 4 lines
Changes for v3:
- put uart and fec iomux setting toboard_early_init_fso that uart can print out the early information such as uboot banner and cpuinfo etc.
- putmxc_gpiopatch into this commit according to Stefno comments,
This is not what I meant. I told to put the mxc_gpio patch into this patchset (as you have now done, [PATCH v3 4/8] mxc_gpio: add support for MX53 processor is in this patchset), but not to duplicate the patch inside this commit. In fact, I cannot apply your patches, as they are changing the same file.
Quoted 6 lines
MAINTAINERS +0
-0
MAINTAINERS Stefano Babic <[email protected]> · line 562
Quoted 8 lines
MAINTAINERS +4
-0@@ -555,6 +555,10 @@ Stefano Babic <[email protected]> mx51evk i.MX51 vision2 i.MX51 +Jason Liu <[email protected]> + + MX53evk i.MX53 + Enric Balletbo i Serra <[email protected]>
Please maintain the list *alfabetically* sorted.
drivers/gpio/mxc_gpio.c line 27
Quoted 7 lines
drivers/gpio/mxc_gpio.c +0
-1@@ -24,7 +24,7 @@#ifdef CONFIG_MX31 #include <asm/arch/mx31-regs.h> #endif -#ifdef CONFIG_MX51
Drop these changes from this patch, as we have them in the [PATCH v3 4/8].
drivers/gpio/mxc_gpio.c line 29
Quoted 3 lines
drivers/gpio/mxc_gpio.c +3
-0+/*********************************************************** +* Command definition +***********************************************************/
Multiline comment, please fix globally in this file.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================
PATCH v3 3/3 MX5:MX53: add initial support for MX53EVK board
Hi, Stefano,
2010/12/30 Stefano Babic <[email protected]>:
Quoted 13 lines · Jason Liu
Quoted 4 lines
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been support.Signed-off-by Jason Liu <[email protected]>Hi Jason,
Quoted 4 lines
Changes for v3:
- put uart and fec iomux setting toboard_early_init_fso that uart can print ? out the early information such as uboot banner and cpuinfo etc.
- putmxc_gpiopatch into this commit according to Stefno comments,
Quoted 5 lines
This is not what I meant. I told to put the
mxc_gpiopatch into this patchset (as you have now done, [PATCH v3 4/8]mxc_gpio: add support for MX53 processor is in this patchset), but not to duplicate the patch inside this commit. In fact, I cannot apply your patches, as they are changing the same file.
My bad. I will change it by removing it.
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MAINTAINERS +0
-0@@ -555,6 +555,10 @@ Stefano Babic <[email protected]>? ? ? mx51evk ? ? ? ? i.MX51
? ? ? vision2 ? ? ? ? i.MX51
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MAINTAINERS +4
-0+Jason Liu <[email protected]> + + ? ? MX53evk ? ? ? ? i.MX53 +?Enric Balletbo i Serra <[email protected]>
Please maintain the list *alfabetically* sorted.
OK,
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drivers/gpio/mxc_gpio.c +0
-0@@ -24,7 +24,7 @@?#ifdef
CONFIG_MX31
?#include <asm/arch/mx31-regs.h>
?#endif
-#ifdefCONFIG_MX51Drop these changes from this patch, as we have them in the [PATCH v3 4/8].
Yes, I will do it.
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+/***********************************************************
+ * Command definition
+ ***********************************************************/Multiline comment, please fix globally in this file.
OK, I will fix it globally.
Quoted 15 lines
Best regards,
Stefano Babic--
=====================================================================
DENX Software Engineering GmbH, ? ? MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 ?Email: office at denx.de
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PATCH v3 3/8 serial_mxc: add support for MX53 processor
In reply to Jason LiuThis patch add UART support for Freescale MX53 processor
--- drivers/serial/serial_mxc.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
drivers/serial/serial_mxc.c +6 -0
@@ -56,6 +56,12 @@#define UART_PHYS UART2_BASE_ADDR#elif defined(CONFIG_SYS_MX51_UART3 )#define UART_PHYS UART3_BASE_ADDR +#elif defined(CONFIG_SYS_MX53_UART1 ) +#define UART_PHYS UART1_BASE_ADDR +#elif defined(CONFIG_SYS_MX53_UART2 ) +#define UART_PHYS UART2_BASE_ADDR +#elif defined(CONFIG_SYS_MX53_UART3 ) +#define UART_PHYS UART3_BASE_ADDR#else #error "define CONFIG_SYS_MXxx_UARTx to use the MXC UART driver"#endif
Signature · 1 line
1.7.0.4
PATCH v3 4/8 mxc_gpio: add support for MX53 processor
In reply to Jason LiuThis patch add mxc_gpio support for Freescale MX53 processor
---
Changes for v2
- put this patch into the same patchset with MX53 support as Stefano comments,
--- drivers/gpio/mxc_gpio.c | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-)
drivers/gpio/mxc_gpio.c +7 -2
@@ -24,7 +24,7 @@#ifdef CONFIG_MX31 #include <asm/arch/mx31-regs.h> #endif -#ifdef CONFIG_MX51 +#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 )#include <asm/arch/imx-regs.h> #endif #include <asm/io.h>
@@ -35,9 +35,14 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#ifdef CONFIG_MX51 +#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) [3] = GPIO4_BASE_ADDR,#endif +#if defined(CONFIG_MX53 ) + [4] = GPIO5_BASE_ADDR, + [5] = GPIO6_BASE_ADDR, + [6] = GPIO7_BASE_ADDR, +#endif };int mxc_gpio_direction (unsigned int gpio,enum mxc_gpio_direction direction)
Signature · 1 line
1.7.0.4
PATCH v3 5/8 mxc_i2c: add support for MX53 processor
In reply to Jason LiuThis patch add I2C support for Freescale MX53 processor
---
Changes for v2:
-address the comments of Heiko, add #if defined(CONFIG_MX31)
to avoid break MX31 build. Move CONFIG_HARD_I2C to the top of the file and fix the error message from:
#error "define CONFIG_SYS_I2C_PORT to use the I2C driver"
to #error "define CONFIG_SYS_I2C_MXxx_PORTx to use the I2C driver"
Changes for v3:
-address the comments from Albert, change #ifdef to #if defined()
for the sake of homogeneity
--- drivers/i2c/mxc_i2c.c | 21 ++++++++++++++++++--- 1 files changed, 18 insertions(+), 3 deletions(-)
drivers/i2c/mxc_i2c.c +18 -3
@@ -26,8 +26,14 @@#if defined(CONFIG_HARD_I2C ) +#if defined(CONFIG_MX31 )#include <asm/arch/mx31.h> #include <asm/arch/mx31-regs.h> +#endif + +#if defined(CONFIG_MX53 ) +#include <asm/arch/clock.h> +#endif #define IADR 0x00#define IFDR 0x04
@@ -47,7 +53,7 @@#define I2SR_IIF (1 << 1)#define I2SR_RX_NO_AK (1 << 0) -#ifdef CONFIG_SYS_I2C_MX31_PORT1 +#if defined(CONFIG_SYS_I2C_MX31_PORT1 )#define I2C_BASE 0x43f80000#define I2C_CLK_OFFSET 26#elif defined (CONFIG_SYS_I2C_MX31_PORT2 )
@@ -56,8 +62,12 @@#elif defined (CONFIG_SYS_I2C_MX31_PORT3 )#define I2C_BASE 0x43f84000#define I2C_CLK_OFFSET 30 +#elif defined(CONFIG_SYS_I2C_MX53_PORT1 ) +#define I2C_BASE I2C1_BASE_ADDR +#elif defined(CONFIG_SYS_I2C_MX53_PORT2 ) +#define I2C_BASE I2C2_BASE_ADDR#else -#error "define CONFIG_SYS_I2C_MX31_PORTx to use the mx31 I2C driver" +#error "define CONFIG_SYS_I2C_MXxx_PORTx to use the I2C driver"#endif #ifdef DEBUG
@@ -72,11 +82,16 @@ static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,void i2c_init (int speed,int unused) { -int freq =mx31_get_ipg_clk (); +int freq;int i; +#if defined(CONFIG_MX31 ) + freq =mx31_get_ipg_clk ();/* start the required I2C clock */ __REG (CCM_CGR0 ) =__REG (CCM_CGR0 ) | (3 <<I2C_CLK_OFFSET ); +#else + freq =mxc_get_clock (MXC_IPG_PERCLK ); +#endif for (i =0 ; i <0x1f ; i++)if (freq / div[i] <= speed)
Signature · 1 line
1.7.0.4
PATCH v3 6/8 fsl_pmic: add I2C interface support
In reply to Jason LiuThis patch add I2C interface for fsl_pmic driver support
---
Changes for v2:
- Address the comments from Stefano,
- factor out the param_check in pmic_reg for both spi/i2c
--- drivers/misc/fsl_pmic.c | 52 ++++++++++++++++++++++++++++++++++++++++++---- 1 files changed, 47 insertions(+), 5 deletions(-)
drivers/misc/fsl_pmic.c +47 -5
@@ -22,11 +22,55 @@#include <config.h> #include <common.h> -#include <spi.h> #include <asm/errno.h> #include <linux/types.h> #include <fsl_pmic.h> +static int check_param (u32 reg,u32 write) +{ +if (reg >63 || write >1 ) { +printf ("<reg num> = %d is invalid. Should be less then 63\n" , + reg); +return -1 ; + } + +return 0 ; +} + +#ifdef CONFIG_FSL_PMIC_I2C +#include <i2c.h> +static int init_done; + +u32 pmic_reg (u32 reg,u32 val,u32 write) +{ +unsigned char buf[4 ] = {0 }; +u32 ret_val =0 ; + +if (check_param (reg, write)) +return -1 ; + +if (init_done ==0 ) { +i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); + init_done =1 ; + } + +if (write) { + buf[0 ] = (val >>16 ) &0xff ; + buf[1 ] = (val >>8 ) &0xff ; + buf[2 ] = (val) &0xff ; +if (i2c_write (CONFIG_SYS_FSL_PMIC_I2C_ADDR , reg,1 , buf,3 )) +return -1 ; + }else { +if (i2c_read (CONFIG_SYS_FSL_PMIC_I2C_ADDR , reg,1 , buf,3 )) { +return -1 ; + ret_val = buf[0 ] <<16 | buf[1 ] <<8 | buf[2 ]; + } + } + +return ret_val; +} +#else /* SPI interface */ +#include <spi.h> static struct spi_slave *slave;struct spi_slave *pmic_spi_probe (void )
@@ -55,11 +99,8 @@ u32 pmic_reg(u32 reg, u32 val, u32 write)return -1 ; } -if (reg >63 || write >1 ) { -printf ("<reg num> = %d is invalid. Should be less then 63\n" , - reg); +if (check_param (reg, write))return -1 ; - }if (spi_claim_bus (slave))return -1 ;
@@ -87,6 +128,7 @@ u32 pmic_reg(u32 reg, u32 val, u32 write)spi_release_bus (slave); return cpu_to_be32(pmic_rx); } +#endif void pmic_reg_write (u32 reg,u32 value) {
Signature · 1 line
1.7.0.4
PATCH v3 6/8 fsl_pmic: add I2C interface support
Quoted 4 lines · Jason Liu
This patch add I2C interface for
fsl_pmicdriver supportSigned-off-by Jason Liu <[email protected]>
Quoted 8 lines
---
Changes for v2:
- Address the comments from Stefano,
- factor out theparam_checkinpmic_regfor both spi/i2c--- drivers/misc/fsl_pmic.c | 52 ++++++++++++++++++++++++++++++++++++++++++---- 1 files changed, 47 insertions(+), 5 deletions(-)
Hi Jason,
drivers/misc/fsl_pmic.c line 55
Quoted 5 lines
drivers/misc/fsl_pmic.c +5
-0+ +if (init_done ==0 ) { +i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); + init_done =1 ; + }
As I can see, i2c_init is called during initialization in arch/arm/lib/board.c. Why do we need to call it again ?
drivers/misc/fsl_pmic.c line 67
Quoted 11 lines
drivers/misc/fsl_pmic.c +11
-0+if (write) { + buf[0 ] = (val >>16 ) &0xff ; + buf[1 ] = (val >>8 ) &0xff ; + buf[2 ] = (val) &0xff ; +if (i2c_write (CONFIG_SYS_FSL_PMIC_I2C_ADDR , reg,1 , buf,3 )) +return -1 ; + }else { +if (i2c_read (CONFIG_SYS_FSL_PMIC_I2C_ADDR , reg,1 , buf,3 )) { +return -1 ; + ret_val = buf[0 ] <<16 | buf[1 ] <<8 | buf[2 ]; + }
I am wondering if it works. The line with ret_val is never reached. Do you tested it ?
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================
PATCH v3 6/8 fsl_pmic: add I2C interface support
Hi, Stefano,
2010/12/31 Stefano Babic <[email protected]>:
Quoted 16 lines · Jason Liu
Quoted 4 lines
This patch add I2C interface for
fsl_pmicdriver supportSigned-off-by Jason Liu <[email protected]>Quoted 8 lines
---
Changes for v2:
- Address the comments from Stefano,
? - factor out theparam_checkinpmic_regfor both spi/i2c
---
?drivers/misc/fsl_pmic.c | ? 52 ++++++++++++++++++++++++++++++++++++++++++---- ?1 files changed, 47 insertions(+), 5 deletions(-)Hi Jason,
Quoted 8 lines
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+
+ ? ? if (init_done== 0) {
+ ? ? ? ? ? ?i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ ? ? ? ? ? ?init_done= 1;
+ ? ? }As I can see,
i2c_initis called during initialization inarch/arm/lib/board.c. Why do we need to call it again ?
Yes, I think, I can remove it.
Quoted 13 lines
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+ ? ? if (write) {
+ ? ? ? ? ? ? buf[0] = (val >> 16) &0xff;
+ ? ? ? ? ? ? buf[1] = (val >> 8) &0xff;
+ ? ? ? ? ? ? buf[2] = (val) &0xff;
+ ? ? ? ? ? ? if (i2c_write(CONFIG_SYS_FSL_PMIC_I2C_ADDR, reg, 1, buf, 3))
+ ? ? ? ? ? ? ? ? ? ? return -1;
+ ? ? } else {
+ ? ? ? ? ? ? if (i2c_read(CONFIG_SYS_FSL_PMIC_I2C_ADDR, reg, 1, buf, 3)) {
+ ? ? ? ? ? ? ? ? ? ? return -1;
+ ? ? ? ? ? ?ret_val= buf[0] << 16 | buf[1] << 8 | buf[2];
+ ? ? ? ? ? ? }
Quoted 2 lines
I am wondering if it works. The line with
ret_valis never reached. Do you tested it ?
I have tested before. This patch of code is definitely wrong. I will fix it.
Thanks for review.
Happy New Year!
Quoted 15 lines
Best regards,
Stefano Babic--
=====================================================================
DENX Software Engineering GmbH, ? ? MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 ?Email: office at denx.de
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PATCH v3 1/3 fsl_pmic: add I2C interface support
In reply to Jason Liu2010/12/29 Jason Liu <[email protected]>:
Quoted 4 lines
This patch add I2C interface for
fsl_pmicdriver supportSigned-off-by Jason Liu <[email protected]>
Please ignore this patch. Send it wrongly. Sorry for the noise.
Quoted 5 lines
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