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S3C64XX: timer: replace bss variable by gd

PATCH New Minkyu Kang 5 participants 9 messages Jan 4, 2011 – Jan 9, 2011

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#0 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Use the global data instead of bss variable, replace as follow. timer_load_val -> timer_rate_hz
timestamp -> timer_reset_value
lastdec -> lastinc

---
 arch/arm/cpu/arm1176/s3c64xx/timer.c |   40 +++++++++++++--------------------
 1 files changed, 16 insertions(+), 24 deletions(-)
arch/arm/cpu/arm1176/s3c64xx/timer.c +16 -24
index 9768319..c1280f2 100644
@@ -43,7 +43,7 @@
 #include <asm/arch/s3c6400.h>
 #include <div64.h>
 
-static ulong timer_load_val;
+DECLARE_GLOBAL_DATA_PTR;
 
 #define PRESCALER	167
 
@@ -60,12 +60,6 @@ static inline ulong read_timer(void)
 	return timers->TCNTO4;
 }
 
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
 int timer_init(void)
 {
 	s3c64xx_timers *const timers = s3c64xx_get_base_timers();
@@ -83,20 +77,18 @@ int timer_init(void)
 	 * the prescaler automatically for other PCLK frequencies.
 	 */
 	timers->TCFG0 = PRESCALER << 8;
-	if (timer_load_val == 0) {
-		timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
-		timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
-	}
+	gd->timer_rate_hz = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
+	timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
 
 	/* load value for 10 ms timeout */
-	lastdec = timers->TCNTB4 = timer_load_val;
+	gd->lastinc = timers->TCNTB4 = gd->timer_rate_hz;
 	/* auto load, manual update of Timer 4 */
 	timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
 		TCON_4_UPDATE;
 
 	/* auto load, start Timer 4 */
 	timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
-	timestamp = 0;
+	gd->timer_reset_value = 0;
 
 	return 0;
 }
@@ -113,16 +105,16 @@ unsigned long long get_ticks(void)
 {
 	ulong now = read_timer();
 
-	if (lastdec >= now) {
+	if (gd->lastinc >= now) {
 		/* normal mode */
-		timestamp += lastdec - now;
+		gd->timer_reset_value += gd->lastinc - now;
 	} else {
 		/* we have an overflow ... */
-		timestamp += lastdec + timer_load_val - now;
+		gd->timer_reset_value += gd->lastinc + gd->timer_rate_hz - now;
 	}
-	lastdec = now;
+	gd->lastinc = now;
 
-	return timestamp;
+	return gd->timer_reset_value;
 }
 
 /*
@@ -132,14 +124,14 @@ unsigned long long get_ticks(void)
 ulong get_tbclk(void)
 {
 	/* We overrun in 100s */
-	return (ulong)(timer_load_val / 100);
+	return (ulong)(gd->timer_rate_hz / 100);
 }
 
 void reset_timer_masked(void)
 {
 	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
+	gd->lastinc = read_timer();
+	gd->timer_reset_value = 0;
 }
 
 void reset_timer(void)
@@ -150,7 +142,7 @@ void reset_timer(void)
 ulong get_timer_masked(void)
 {
 	unsigned long long res = get_ticks();
-	do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
+	do_div(res, (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ)));
 	return res;
 }
 
@@ -161,7 +153,7 @@ ulong get_timer(ulong base)
 
 void set_timer(ulong t)
 {
-	timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
+	gd->timer_reset_value = t * (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ));
 }
 
 void __udelay(unsigned long usec)
@@ -170,7 +162,7 @@ void __udelay(unsigned long usec)
 	ulong tmo;
 
 	tmo = (usec + 9) / 10;
-	tmp = get_ticks() + tmo;	/* get current timestamp */
+	tmp = get_ticks() + tmo;	/* get current timer_reset_value */
 
 	while (get_ticks() < tmp)/* loop till event */
 		 /*NOP*/;
Signature · 1 line
1.7.1
#1 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Quoted 4 lines · Minkyu Kang

Use the global data instead of bss variable, replace as follow. timer_load_val -> timer_rate_hz
timestamp -> timer_reset_value
lastdec -> lastinc

I have already test the patch on s3c6410 . It is work perfect.

Thanks,
seedshope

Quoted 125 lines
---
  arch/arm/cpu/arm1176/s3c64xx/timer.c |   40 +++++++++++++--------------------
  1 files changed, 16 insertions(+), 24 deletions(-)
arch/arm/cpu/arm1176/s3c64xx/timer.c +16 -24
index 9768319..c1280f2 100644
@@ -43,7 +43,7 @@
  #include<asm/arch/s3c6400.h>
  #include<div64.h>
 
-static ulong timer_load_val;
+DECLARE_GLOBAL_DATA_PTR;
 
  #define PRESCALER	167
 
@@ -60,12 +60,6 @@ static inline ulong read_timer(void)
  	return timers->TCNTO4;
  }
 
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
  int timer_init(void)
  {
  	s3c64xx_timers *const timers = s3c64xx_get_base_timers();
@@ -83,20 +77,18 @@ int timer_init(void)
  	 * the prescaler automatically for other PCLK frequencies.
  	 */
  	timers->TCFG0 = PRESCALER<<  8;
-	if (timer_load_val == 0) {
-		timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
-		timers->TCFG1 = (timers->TCFG1&  ~0xf0000) | 0x20000;
-	}
+	gd->timer_rate_hz = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
+	timers->TCFG1 = (timers->TCFG1&  ~0xf0000) | 0x20000;
 
  	/* load value for 10 ms timeout */
-	lastdec = timers->TCNTB4 = timer_load_val;
+	gd->lastinc = timers->TCNTB4 = gd->timer_rate_hz;
  	/* auto load, manual update of Timer 4 */
  	timers->TCON = (timers->TCON&  ~0x00700000) | TCON_4_AUTO |
  		TCON_4_UPDATE;
 
  	/* auto load, start Timer 4 */
  	timers->TCON = (timers->TCON&  ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
-	timestamp = 0;
+	gd->timer_reset_value = 0;
 
  	return 0;
  }
@@ -113,16 +105,16 @@ unsigned long long get_ticks(void)
  {
  	ulong now = read_timer();
 
-	if (lastdec>= now) {
+	if (gd->lastinc>= now) {
  		/* normal mode */
-		timestamp += lastdec - now;
+		gd->timer_reset_value += gd->lastinc - now;
  	} else {
  		/* we have an overflow ... */
-		timestamp += lastdec + timer_load_val - now;
+		gd->timer_reset_value += gd->lastinc + gd->timer_rate_hz - now;
  	}
-	lastdec = now;
+	gd->lastinc = now;
 
-	return timestamp;
+	return gd->timer_reset_value;
  }
 
  /*
@@ -132,14 +124,14 @@ unsigned long long get_ticks(void)
  ulong get_tbclk(void)
  {
  	/* We overrun in 100s */
-	return (ulong)(timer_load_val / 100);
+	return (ulong)(gd->timer_rate_hz / 100);
  }
 
  void reset_timer_masked(void)
  {
  	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
+	gd->lastinc = read_timer();
+	gd->timer_reset_value = 0;
  }
 
  void reset_timer(void)
@@ -150,7 +142,7 @@ void reset_timer(void)
  ulong get_timer_masked(void)
  {
  	unsigned long long res = get_ticks();
-	do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
+	do_div(res, (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ)));
  	return res;
  }
 
@@ -161,7 +153,7 @@ ulong get_timer(ulong base)
 
  void set_timer(ulong t)
  {
-	timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
+	gd->timer_reset_value = t * (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ));
  }
 
  void __udelay(unsigned long usec)
@@ -170,7 +162,7 @@ void __udelay(unsigned long usec)
  	ulong tmo;
 
  	tmo = (usec + 9) / 10;
-	tmp = get_ticks() + tmo;	/* get current timestamp */
+	tmp = get_ticks() + tmo;	/* get current timer_reset_value */
 
  	while (get_ticks()<  tmp)/* loop till event */
  		 /*NOP*/;
#2 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Quoted 6 lines · seedshope
Quoted 4 lines · Minkyu Kang

Use the global data instead of bss variable, replace as follow. timer_load_val -> timer_rate_hz
timestamp -> timer_reset_value
lastdec -> lastinc

I have already test the patch on s3c6410 . It is work perfect.

Before I am not use the patch, When I use the command "nand read", The some information will generate. as following:
raise: Signal # 8 caught

I also trace the timer.c, But I can't resolve it. As if after the first initial timer,
I guess the bss will be clear.

Now It is ok after patch this patch.

Thanks,
seedshope

Quoted 133 lines

Thanks,
seedshope

Quoted 129 lines
---
  arch/arm/cpu/arm1176/s3c64xx/timer.c |   40 
+++++++++++++--------------------
  1 files changed, 16 insertions(+), 24 deletions(-)
arch/arm/cpu/arm1176/s3c64xx/timer.c +5 -13
index 9768319..c1280f2 100644
@@ -43,7 +43,7 @@
  #include<asm/arch/s3c6400.h>
  #include<div64.h>
 
-static ulong timer_load_val;
+DECLARE_GLOBAL_DATA_PTR;
 
  #define PRESCALER    167
 
@@ -60,12 +60,6 @@ static inline ulong read_timer(void)
      return timers->TCNTO4;
  }
 
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
  int timer_init(void)
  {
      s3c64xx_timers *const timers = s3c64xx_get_base_timers();
@@ -83,20 +77,18 @@ int timer_init(void)
       * the prescaler automatically for other PCLK frequencies.
       */
      timers->TCFG0 = PRESCALER<<  8;
-    if (timer_load_val == 0) {
-        timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
-        timers->TCFG1 = (timers->TCFG1&  ~0xf0000) | 0x20000;
-    }
+    gd->timer_rate_hz = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
+    timers->TCFG1 = (timers->TCFG1&  ~0xf0000) | 0x20000;
 
      /* load value for 10 ms timeout */
-    lastdec = timers->TCNTB4 = timer_load_val;
+    gd->lastinc = timers->TCNTB4 = gd->timer_rate_hz;
      /* auto load, manual update of Timer 4 */
      timers->TCON = (timers->TCON&  ~0x00700000) | TCON_4_AUTO |
          TCON_4_UPDATE;
 
      /* auto load, start Timer 4 */
      timers->TCON = (timers->TCON&  ~0x00700000) | TCON_4_AUTO | 
 COUNT_4_ON;
-    timestamp = 0;
+    gd->timer_reset_value = 0;
 
      return 0;
  }
arch/arm/cpu/arm1176/s3c64xx/timer.c +10 -10
@@ -113,16 +105,16 @@ unsigned long long get_ticks(void)
  {
      ulong now = read_timer();
 
-    if (lastdec>= now) {
+    if (gd->lastinc>= now) {
          /* normal mode */
-        timestamp += lastdec - now;
+        gd->timer_reset_value += gd->lastinc - now;
      } else {
          /* we have an overflow ... */
-        timestamp += lastdec + timer_load_val - now;
+        gd->timer_reset_value += gd->lastinc + gd->timer_rate_hz - now;
      }
-    lastdec = now;
+    gd->lastinc = now;
 
-    return timestamp;
+    return gd->timer_reset_value;
  }
 
  /*
@@ -132,14 +124,14 @@ unsigned long long get_ticks(void)
  ulong get_tbclk(void)
  {
      /* We overrun in 100s */
-    return (ulong)(timer_load_val / 100);
+    return (ulong)(gd->timer_rate_hz / 100);
  }
 
  void reset_timer_masked(void)
  {
      /* reset time */
-    lastdec = read_timer();
-    timestamp = 0;
+    gd->lastinc = read_timer();
+    gd->timer_reset_value = 0;
  }
 
  void reset_timer(void)
@@ -150,7 +142,7 @@ void reset_timer(void)
  ulong get_timer_masked(void)
  {
      unsigned long long res = get_ticks();
-    do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
+    do_div(res, (gd->timer_rate_hz / (100 * CONFIG_SYS_HZ)));
      return res;
  }
 
@@ -161,7 +153,7 @@ ulong get_timer(ulong base)
 
  void set_timer(ulong t)
  {
-    timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
+    gd->timer_reset_value = t * (gd->timer_rate_hz / (100 * 
 CONFIG_SYS_HZ));
  }
 

void __udelay(unsigned long usec)

arch/arm/cpu/arm1176/s3c64xx/timer.c +1 -1
@@ -170,7 +162,7 @@ void __udelay(unsigned long usec)
      ulong tmo;
 
      tmo = (usec + 9) / 10;
-    tmp = get_ticks() + tmo;    /* get current timestamp */
+    tmp = get_ticks() + tmo;    /* get current timer_reset_value */
 
      while (get_ticks()<  tmp)/* loop till event */
           /*NOP*/;
#3 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Dear seedshope,

Quoted 11 lines · seedshope
Quoted 6 lines · seedshope
Quoted 4 lines · Minkyu Kang

Use the global data instead of bss variable, replace as follow. timer_load_val -> ?timer_rate_hz
timestamp -> ?timer_reset_value
lastdec -> ?lastinc

I have already test the patch on s3c6410 . It is work perfect.

Before I am not use the patch, When I use the command "nand read", The some information will generate. as following:
raise: Signal # 8 caught

Quoted 9 lines

I also trace the timer.c, But I can't resolve it. As if after the first initial timer,
I guess the bss will be clear.

Now It is ok after patch this patch.

Thanks,
seedshope

Quoted 1 line

Thanks for testing.

Did you test with latest version?
Currently, SMDK6400 can't build because didn't rework for relocation. If you are OK, could you please fix it?
I appreciate your help.

Minkyu Kang

Signature · 2 lines
from. prom.
www.promsoft.net
#4 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Quoted 18 lines · Minkyu Kang

Dear seedshope,

Quoted 15 lines · seedshope
Quoted 6 lines · seedshope
Quoted 4 lines · Minkyu Kang

Use the global data instead of bss variable, replace as follow.
timer_load_val -> timer_rate_hz
timestamp -> timer_reset_value
lastdec -> lastinc

I have already test the patch on s3c6410 . It is work perfect.

Before I am not use the patch, When I use the command "nand read", The some information will generate. as following:
raise: Signal # 8 caught

I also trace the timer.c, But I can't resolve it. As if after the first initial timer,
I guess the bss will be clear.

Quoted 7 lines
Quoted 4 lines

Now It is ok after patch this patch.

Thanks,
seedshope

Thanks for testing.

Did you test with latest version?

Yes,

Quoted 2 lines

Currently, SMDK6400 can't build because didn't rework for relocation. If you are OK, could you please fix it?

Ok, recently, I do the patch for SMD6400 and SMDK6410, I will send request review in the weekend?

Thank?
seedshope

Quoted 3 lines

I appreciate your help.

Minkyu Kang

#5 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Dear seedshope,

Quoted 34 lines · seedshope
Quoted 24 lines · Minkyu Kang

Dear seedshope,

Quoted 20 lines · On 4 January 2011 23:56, seedshope<[email protected]> ?wrote:
Quoted 9 lines · seedshope
Quoted 5 lines · Minkyu Kang

Use the global data instead of bss variable, replace as follow. timer_load_val -> ? timer_rate_hz
timestamp -> ? timer_reset_value
lastdec -> ? lastinc

I have already test the patch on s3c6410 . It is work perfect.

Before I am not use the patch, When I use the command "nand read", The some information will generate. as following:
raise: Signal # 8 caught

I also trace the timer.c, But I can't resolve it. As if after the first initial timer,
I guess the bss will be clear.

Quoted 8 lines
Quoted 4 lines

Now It is ok after patch this patch.

Thanks,
seedshope

Thanks for testing.

Did you test with latest version?

Quoted 8 lines

Yes,

Quoted 3 lines

Currently, SMDK6400 can't build because didn't rework for relocation. If you are OK, could you please fix it?

Ok, recently, I do the patch for SMD6400 and SMDK6410, I will send request review in the weekend?

Thanks! :)

Minkyu Kang

Signature · 2 lines
from. prom.
www.promsoft.net
#6 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Dear concerned,

Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines

Use the global data instead of bss variable, replace as follow.
timer_load_val -> timer_rate_hz
timestamp -> timer_reset_value

I am not too happy about this "misuse" of gd->variables making them "misnomers" and the code harder to read.

timer_rate_hz is supposed to hold the rate at which the high speed timer increments.

timer_reset_value supposedly holds the high speed timer's value when timer_reset() is called.

There was a discussion started about this a while ago, but came to no conclusion...

Best Regards,
Reinhard

#7 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

Dear Reinhard Meyer,

Quoted 6 lines · In message <[email protected]> you wrote:
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines

timer_load_val -> timer_rate_hz
timestamp -> timer_reset_value

I am not too happy about this "misuse" of gd->variables making them "misnomers" and the code harder to read.

I'm not happy with this as well, and I actually will not accept the patch because of that.

Quoted 8 lines

timer_rate_hz is supposed to hold the rate at which the high speed timer increments.

timer_reset_value supposedly holds the high speed timer's value when timer_reset() is called.

There was a discussion started about this a while ago, but came to no conclusion...

I suggested this before:

------- Forwarded Message

Date:    Thu, 16 Dec 2010 15:12:41 +0100
From:    Wolfgang Denk <[email protected]>
To:      Reinhard Meyer <[email protected]>

cc: U-Boot user list <[email protected]>, hs at denx.de
Subject: Re: [U-Boot] arm926ejs, timer:

...
Maybe we should lean back and have a look at what Linux is doing in this area?

The recent patch series "64-bit sched_clock" on the lak ML seems to fit pretty well :-)

See http://thread.gmane.org/gmane.linux.ports.arm.kernel/99740

Can we copy from Linux?
...

------- End of Forwarded Message

Unfortunately it seems nobody had time or resources to have a look yet.

I think we should fix this for real now, and not continue to implement one SoC specific version or workaround after the other.

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If you hear an onion ring, answer it.
#8 lore raw

PATCH 1/1 S3C64XX: timer: replace bss variable by gd

In reply to Minkyu Kang

Dear Minkyu Kang,

Quoted 3 lines · In message <[email protected]> you wrote:

Use the global data instead of bss variable, replace as follow. timer_load_val -> timer_rate_hz
timestamp -> timer_reset_value

I object against using variables wich have somewhat self-explanatory names for different purposes.

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I program, therefore I am.