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i.MX51 Framebuffer support

PATCH In review Sascha Hauer 9 participants 30 messages Dec 20, 2010 – Feb 1, 2011

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Sascha Hauer

author maintainer
#0 lore raw

PATCH v2 1/1 i.MX51 Framebuffer support

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

Changes since v1:

- added full overlay support for i.MX51
- more data structures protection
- IPU clock now gets disabled when unused
- many minor cleanups due to comments received from the first round.

The following changes since commit 28a4f908acb342350b9ecbfcdf0a999cb83e05aa:

ARM: mx5: check for error in ioremap (2010-12-14 09:55:53 +0100)

are available in the git repository at:
git://git.pengutronix.de/git/imx/linux-2.6.git ipuv3

Sascha Hauer (9):
ARM i.MX51: Add ipu clock support
ARM i.MX51: rename IPU irqs
Add a mfd IPUv3 driver
fb: export fb mode db table
Add i.MX5 framebuffer driver
ARM i.MX51: Add IPU device support
ARM i.MX5: Allow to increase max zone order ARM i.MX5: increase dma consistent size for IPU support ARM i.MX51 babbage: Add framebuffer support

 arch/arm/Kconfig                                |    4 +-
 arch/arm/mach-mx5/Kconfig                       |    1 +
 arch/arm/mach-mx5/board-mx51_babbage.c          |   74 ++
 arch/arm/mach-mx5/clock-mx51-mx53.c             |  140 ++++
 arch/arm/mach-mx5/devices-imx51.h               |    4 +
 arch/arm/plat-mxc/devices/Kconfig               |    4 +
 arch/arm/plat-mxc/devices/Makefile              |    1 +
 arch/arm/plat-mxc/devices/platform-imx_ipuv3.c  |   47 ++
 arch/arm/plat-mxc/include/mach/devices-common.h |   10 +
 arch/arm/plat-mxc/include/mach/ipu-v3.h         |   49 ++
 arch/arm/plat-mxc/include/mach/memory.h         |    3 +-
 arch/arm/plat-mxc/include/mach/mx51.h           |    4 +-
 drivers/mfd/Kconfig                             |    7 +
 drivers/mfd/Makefile                            |    1 +
 drivers/mfd/imx-ipu-v3/Makefile                 |    3 +
 drivers/mfd/imx-ipu-v3/ipu-common.c             |  708 +++++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-cpmem.c              |  612 +++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-dc.c                 |  364 +++++++++
 drivers/mfd/imx-ipu-v3/ipu-di.c                 |  550 +++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-dmfc.c               |  355 +++++++++
 drivers/mfd/imx-ipu-v3/ipu-dp.c                 |  476 ++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-prv.h                |  216 ++++++
 drivers/video/Kconfig                           |   11 +
 drivers/video/Makefile                          |    1 +
 drivers/video/modedb.c                          |    7 +-
 drivers/video/mx5fb.c                           |  934 +++++++++++++++++++++++
 include/linux/fb.h                              |    3 +
 include/linux/mfd/imx-ipu-v3.h                  |  219 ++++++
 28 files changed, 4802 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/plat-mxc/devices/platform-imx_ipuv3.c
 create mode 100644 arch/arm/plat-mxc/include/mach/ipu-v3.h
 create mode 100644 drivers/mfd/imx-ipu-v3/Makefile
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-common.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-cpmem.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dc.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-di.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dmfc.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dp.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-prv.h
 create mode 100644 drivers/video/mx5fb.c
 create mode 100644 include/linux/mfd/imx-ipu-v3.h
author maintainer
#1 lore raw

PATCH 1/9 ARM i.MX51: Add ipu clock support

---
 arch/arm/mach-mx5/clock-mx51-mx53.c |  140 +++++++++++++++++++++++++++++++++++
 1 files changed, 140 insertions(+), 0 deletions(-)
arch/arm/mach-mx5/clock-mx51-mx53.c +140 -0
index 9fc65bb..f550d02 100644
@@ -39,6 +39,9 @@ static struct clk periph_apm_clk;
 static struct clk ahb_clk;
 static struct clk ipg_clk;
 static struct clk usboh3_clk;
+static struct clk emi_fast_clk;
+static struct clk ipu_clk;
+static struct clk mipi_hsc1_clk;
 
 #define MAX_DPLL_WAIT_TRIES	1000 /* 1000 * udelay(1) = 1ms */
 
@@ -688,6 +691,19 @@ static unsigned long clk_emi_slow_get_rate(struct clk *clk)
 	return clk_get_rate(clk->parent) / div;
 }
 
+static unsigned long _clk_ddr_hf_get_rate(struct clk *clk)
+{
+	unsigned long rate;
+	u32 reg, div;
+
+	reg = __raw_readl(MXC_CCM_CBCDR);
+	div = ((reg & MXC_CCM_CBCDR_DDR_PODF_MASK) >>
+		MXC_CCM_CBCDR_DDR_PODF_OFFSET) + 1;
+	rate = clk_get_rate(clk->parent) / div;
+
+	return rate;
+}
+
 /* External high frequency clock */
 static struct clk ckih_clk = {
 	.get_rate = get_high_reference_clock_rate,
@@ -846,6 +862,109 @@ static struct clk emi_slow_clk = {
 	.get_rate = clk_emi_slow_get_rate,
 };
 
+static int clk_ipu_enable(struct clk *clk)
+{
+	u32 reg;
+
+	_clk_ccgr_enable(clk);
+
+	/* Enable handshake with IPU when certain clock rates are changed */
+	reg = __raw_readl(MXC_CCM_CCDR);
+	reg &= ~MXC_CCM_CCDR_IPU_HS_MASK;
+	__raw_writel(reg, MXC_CCM_CCDR);
+
+	/* Enable handshake with IPU when LPM is entered */
+	reg = __raw_readl(MXC_CCM_CLPCR);
+	reg &= ~MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;
+	__raw_writel(reg, MXC_CCM_CLPCR);
+
+	return 0;
+}
+
+static void clk_ipu_disable(struct clk *clk)
+{
+	u32 reg;
+
+	_clk_ccgr_disable(clk);
+
+	/* Disable handshake with IPU whe dividers are changed */
+	reg = __raw_readl(MXC_CCM_CCDR);
+	reg |= MXC_CCM_CCDR_IPU_HS_MASK;
+	__raw_writel(reg, MXC_CCM_CCDR);
+
+	/* Disable handshake with IPU when LPM is entered */
+	reg = __raw_readl(MXC_CCM_CLPCR);
+	reg |= MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;
+	__raw_writel(reg, MXC_CCM_CLPCR);
+}
+
+static struct clk ahbmux1_clk = {
+	.parent = &ahb_clk,
+	.secondary = &ahb_max_clk,
+	.enable_reg = MXC_CCM_CCGR0,
+	.enable_shift = MXC_CCM_CCGRx_CG8_OFFSET,
+	.enable = _clk_ccgr_enable,
+	.disable = _clk_ccgr_disable_inwait,
+};
+
+static struct clk ipu_sec_clk = {
+	.parent = &emi_fast_clk,
+	.secondary = &ahbmux1_clk,
+};
+
+static struct clk ddr_hf_clk = {
+	.parent = &pll1_sw_clk,
+	.get_rate = _clk_ddr_hf_get_rate,
+};
+
+static struct clk ddr_clk = {
+	.parent = &ddr_hf_clk,
+};
+
+/* clock definitions for MIPI HSC unit which has been removed
+ * from documentation, but not from hardware
+ */
+static int _clk_hsc_enable(struct clk *clk)
+{
+	u32 reg;
+
+	_clk_ccgr_enable(clk);
+	/* Handshake with IPU when certain clock rates are changed. */
+	reg = __raw_readl(MXC_CCM_CCDR);
+	reg &= ~MXC_CCM_CCDR_HSC_HS_MASK;
+	__raw_writel(reg, MXC_CCM_CCDR);
+
+	reg = __raw_readl(MXC_CCM_CLPCR);
+	reg &= ~MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS;
+	__raw_writel(reg, MXC_CCM_CLPCR);
+
+	return 0;
+}
+
+static void _clk_hsc_disable(struct clk *clk)
+{
+	u32 reg;
+
+	_clk_ccgr_disable(clk);
+	/* No handshake with HSC as its not enabled. */
+	reg = __raw_readl(MXC_CCM_CCDR);
+	reg |= MXC_CCM_CCDR_HSC_HS_MASK;
+	__raw_writel(reg, MXC_CCM_CCDR);
+
+	reg = __raw_readl(MXC_CCM_CLPCR);
+	reg |= MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS;
+	__raw_writel(reg, MXC_CCM_CLPCR);
+}
+
+static struct clk mipi_hsp_clk = {
+	.parent = &ipu_clk,
+	.enable_reg = MXC_CCM_CCGR4,
+	.enable_shift = MXC_CCM_CCGRx_CG6_OFFSET,
+	.enable = _clk_hsc_enable,
+	.disable = _clk_hsc_disable,
+	.secondary = &mipi_hsc1_clk,
+};
+
 #define DEFINE_CLOCK_CCGR(name, i, er, es, pfx, p, s)	\
 	static struct clk name = {			\
 		.id		= i,			\
@@ -1077,6 +1196,23 @@ DEFINE_CLOCK_FULL(esdhc2_ipg_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG2_OFFSET,
 DEFINE_CLOCK_MAX(esdhc2_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG3_OFFSET,
 	clk_esdhc2, &pll2_sw_clk, &esdhc2_ipg_clk);
 
+DEFINE_CLOCK(mipi_esc_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, NULL, &pll2_sw_clk);
+DEFINE_CLOCK(mipi_hsc2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &mipi_esc_clk, &pll2_sw_clk);
+DEFINE_CLOCK(mipi_hsc1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &mipi_hsc2_clk, &pll2_sw_clk);
+
+/* IPU */
+DEFINE_CLOCK_FULL(ipu_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG5_OFFSET,
+	NULL,  NULL, clk_ipu_enable, clk_ipu_disable, &ahb_clk, &ipu_sec_clk);
+
+DEFINE_CLOCK_FULL(emi_fast_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG7_OFFSET,
+		NULL, NULL, _clk_ccgr_enable, _clk_ccgr_disable_inwait,
+		&ddr_clk, NULL);
+
+DEFINE_CLOCK(ipu_di0_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG5_OFFSET,
+		NULL, NULL, &pll3_sw_clk, NULL);
+DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,
+		NULL, NULL, &pll3_sw_clk, NULL);
+
 #define _REGISTER_CLOCK(d, n, c) \
        { \
 		.dev_id = d, \
@@ -1117,6 +1253,10 @@ static struct clk_lookup mx51_lookups[] = {
 	_REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
 	_REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
 	_REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
+	_REGISTER_CLOCK(NULL, "mipi_hsp", mipi_hsp_clk)
+	_REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)
+	_REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
+	_REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
 };
 
 static struct clk_lookup mx53_lookups[] = {
Signature · 1 line
1.7.2.3
author maintainer
#2 lore raw

PATCH 2/9 ARM i.MX51: rename IPU irqs

In reply to Sascha Hauer
---
 arch/arm/plat-mxc/include/mach/mx51.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/plat-mxc/include/mach/mx51.h +2 -2
index fa3a2a5..873807f 100644
@@ -251,8 +251,8 @@
 #define MX51_MXC_INT_IOMUX		7
 #define MX51_INT_NFC			8
 #define MX51_MXC_INT_VPU		9
-#define MX51_MXC_INT_IPU_ERR		10
-#define MX51_MXC_INT_IPU_SYN		11
+#define MX51_INT_IPU_ERR		10
+#define MX51_INT_IPU_SYN		11
 #define MX51_MXC_INT_GPU		12
 #define MX51_MXC_INT_RESV13		13
 #define MX51_MXC_INT_USB_H1		14
Signature · 1 line
1.7.2.3
author maintainer
#3 lore raw

PATCH 3/9 Add a mfd IPUv3 driver

In reply to Sascha Hauer

The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely:

- Display Controller (dc)
- Display Interface (di)
- Display Multi Fifo Controller (dmfc)
- Display Processor (dp)
- Image DMA Controller (idmac)

This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together.

The IPU has other units missing in this patch:

- CMOS Sensor Interface (csi)
- Video Deinterlacer (vdi)
- Sensor Multi FIFO Controler (smfc)
- Image Converter (ic)
- Image Rotator (irt)

So expect more files to come in this directory.

---
 arch/arm/plat-mxc/include/mach/ipu-v3.h |   49 +++
 drivers/mfd/Kconfig                     |    7 +
 drivers/mfd/Makefile                    |    1 +
 drivers/mfd/imx-ipu-v3/Makefile         |    3 +
 drivers/mfd/imx-ipu-v3/ipu-common.c     |  708 +++++++++++++++++++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-cpmem.c      |  612 ++++++++++++++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-dc.c         |  364 ++++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-di.c         |  550 ++++++++++++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-dmfc.c       |  355 ++++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-dp.c         |  476 +++++++++++++++++++++
 drivers/mfd/imx-ipu-v3/ipu-prv.h        |  216 ++++++++++
 include/linux/mfd/imx-ipu-v3.h          |  219 ++++++++++
 12 files changed, 3560 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-mxc/include/mach/ipu-v3.h
 create mode 100644 drivers/mfd/imx-ipu-v3/Makefile
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-common.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-cpmem.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dc.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-di.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dmfc.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dp.c
 create mode 100644 drivers/mfd/imx-ipu-v3/ipu-prv.h
 create mode 100644 include/linux/mfd/imx-ipu-v3.h
arch/arm/plat-mxc/include/mach/ipu-v3.h new file +49 -0
new file mode 100644
index 0000000..f8900b9
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2010 Sascha Hauer <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ */
+
+#ifndef __MACH_IPU_V3_H_
+#define __MACH_IPU_V3_H_
+
+/* IPU specific extensions to struct fb_videomode flag field */
+#define FB_SYNC_OE_LOW_ACT	(1 << 8)
+#define FB_SYNC_CLK_LAT_FALL	(1 << 9)
+#define FB_SYNC_DATA_INVERT	(1 << 10)
+#define FB_SYNC_CLK_IDLE_EN	(1 << 11)
+#define FB_SYNC_SHARP_MODE	(1 << 12)
+#define FB_SYNC_SWAP_RGB	(1 << 13)
+
+struct ipuv3_fb_platform_data {
+	const struct fb_videomode	*modes;
+	int				num_modes;
+	char				*mode_str;
+	u32				interface_pix_fmt;
+
+#define IMX_IPU_FB_USE_MODEDB	(1 << 0)
+#define IMX_IPU_FB_USE_OVERLAY	(1 << 1)
+	unsigned long			flags;
+
+	int				ipu_channel_bg;
+	int				ipu_channel_fg;
+	int				dc_channel;
+	int				dp_channel;
+	int				display;
+};
+
+struct imx_ipuv3_platform_data {
+	int rev;
+	struct ipuv3_fb_platform_data	*fb_head0_platform_data;
+	struct ipuv3_fb_platform_data	*fb_head1_platform_data;
+};
+
+#endif /* __MACH_IPU_V3_H_ */
drivers/mfd/Kconfig +7 -0
index 3a1493b..3c81879 100644
@@ -606,6 +606,13 @@ config MFD_VX855
 	  VIA VX855/VX875 south bridge. You will need to enable the vx855_spi
 	  and/or vx855_gpio drivers for this to do anything useful.
 
+config MFD_IMX_IPU_V3
+	tristate "Support the Image Processing Unit (IPU) found on the i.MX51"
+	depends on ARCH_MX51
+	select MFD_CORE
+	help
+	  Say yes here to support the IPU on i.MX51.
+
 endif # MFD_SUPPORT
 
 menu "Multimedia Capabilities Port drivers"
drivers/mfd/Makefile +1 -0
index f54b365..7873b13 100644
@@ -81,3 +81,4 @@ obj-$(CONFIG_MFD_JANZ_CMODIO)	+= janz-cmodio.o
 obj-$(CONFIG_MFD_JZ4740_ADC)	+= jz4740-adc.o
 obj-$(CONFIG_MFD_TPS6586X)	+= tps6586x.o
 obj-$(CONFIG_MFD_VX855)		+= vx855.o
+obj-$(CONFIG_MFD_IMX_IPU_V3)	+= imx-ipu-v3/
drivers/mfd/imx-ipu-v3/Makefile new file +3 -0
new file mode 100644
index 0000000..ff70fe8
@@ -0,0 +1,3 @@
+obj-$(CONFIG_MFD_IMX_IPU_V3) += imx-ipu-v3.o
+
+imx-ipu-v3-objs := ipu-common.o ipu-dc.o ipu-di.o ipu-dp.o ipu-dmfc.o ipu-cpmem.o
drivers/mfd/imx-ipu-v3/ipu-common.c new file +708 -0

708 lines not on this page · raw message

drivers/mfd/imx-ipu-v3/ipu-cpmem.c new file +612 -0

612 lines not on this page · raw message

drivers/mfd/imx-ipu-v3/ipu-dc.c new file +364 -0

364 lines not on this page · raw message

drivers/mfd/imx-ipu-v3/ipu-di.c new file +550 -0

550 lines not on this page · raw message

drivers/mfd/imx-ipu-v3/ipu-dmfc.c new file +355 -0

355 lines not on this page · raw message

drivers/mfd/imx-ipu-v3/ipu-dp.c new file +476 -0

342 lines not on this page · raw message

drivers/mfd/imx-ipu-v3/ipu-prv.h new file +216 -0

216 lines not on this page · raw message

include/linux/mfd/imx-ipu-v3.h new file +219 -0

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Signature · 1 line
1.7.2.3

Part of the diff is not shown here. View the raw message.

author maintainer
#4 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Quoted 26 lines · Sascha Hauer

The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely:

- Display Controller (dc)
- Display Interface (di)
- Display Multi Fifo Controller (dmfc)
- Display Processor (dp)
- Image DMA Controller (idmac)

This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together.

The IPU has other units missing in this patch:

- CMOS Sensor Interface (csi)
- Video Deinterlacer (vdi)
- Sensor Multi FIFO Controler (smfc)
- Image Converter (ic)
- Image Rotator (irt)

Quoted 3 lines

So expect more files to come in this directory.

Hello Samuel,

I see no further comments on this series. Does this mean you are ok with the patch or didn't you find the time looking at it?

This patch can go via the mfd tree or I can push this via my i.MX tree. Going via the i.MX tree makes life a bit easier for me because we do not run into merge order dependencies. Please let me know what you prefer.

Sascha

Signature · 4 lines
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#5 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Hi Sascha,

Quoted 27 lines · Sascha Hauer
Quoted 26 lines · Sascha Hauer

The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely:

- Display Controller (dc)
- Display Interface (di)
- Display Multi Fifo Controller (dmfc)
- Display Processor (dp)
- Image DMA Controller (idmac)

This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together.

The IPU has other units missing in this patch:

- CMOS Sensor Interface (csi)
- Video Deinterlacer (vdi)
- Sensor Multi FIFO Controler (smfc)
- Image Converter (ic)
- Image Rotator (irt)

Quoted 8 lines
Quoted 3 lines

So expect more files to come in this directory.

Hello Samuel,

I see no further comments on this series. Does this mean you are ok with the patch or didn't you find the time looking at it?

I'm coming back from my xmas holidays today, and haven't had time to look at it yet. Hopefully next week.

Quoted 3 lines

This patch can go via the mfd tree or I can push this via my i.MX tree. Going via the i.MX tree makes life a bit easier for me because we do not run into merge order dependencies. Please let me know what you prefer.

I'm usually fine either way. If taking it through your tree makes your life easier, then we should go for it.

Cheers,
Samuel.

Signature · 2 lines
Intel Open Source Technology Centre
http://oss.intel.com/
author maintainer
#6 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Hi Samuel,

Quoted 32 lines · Samuel Ortiz

Hi Sascha,

Quoted 29 lines · Sascha Hauer
Quoted 28 lines · Sascha Hauer

The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely:

- Display Controller (dc)
- Display Interface (di)
- Display Multi Fifo Controller (dmfc)
- Display Processor (dp)
- Image DMA Controller (idmac)

This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together.

The IPU has other units missing in this patch:

- CMOS Sensor Interface (csi)
- Video Deinterlacer (vdi)
- Sensor Multi FIFO Controler (smfc)
- Image Converter (ic)
- Image Rotator (irt)

So expect more files to come in this directory.

Quoted 8 lines
Quoted 6 lines
Quoted 1 line

Hello Samuel,

I see no further comments on this series. Does this mean you are ok with the patch or didn't you find the time looking at it?

I'm coming back from my xmas holidays today, and haven't had time to look at it yet. Hopefully next week.

Ping. I'd like to get this into the next merge window. Right now there is still enough time for me to react on comments.

Regards,
Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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#7 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

In reply to Sascha Hauer

Hi Sascha,

Quoted 20 lines · Sascha Hauer

The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely:

- Display Controller (dc)
- Display Interface (di)
- Display Multi Fifo Controller (dmfc)
- Display Processor (dp)
- Image DMA Controller (idmac)

This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together.

The IPU has other units missing in this patch:

Quoted 7 lines

- CMOS Sensor Interface (csi)
- Video Deinterlacer (vdi)
- Sensor Multi FIFO Controler (smfc)
- Image Converter (ic)
- Image Rotator (irt)

So expect more files to come in this directory.

I couldn't look into details as the patch is huge, but it looks mostly good. One thing I don't really like is the

+static struct device *ipu_dev;
+void __iomem *ipu_cm_reg;
+void __iomem *ipu_idmac_reg;

part. I know there is currently no HW supporting more than one of those controllers, but as a general principle I find this is not a good programming habit.

Now, on a less technical note: I don't really see how this driver fits in the MFD category, unless the upcoming units support brings something new. If I were looking for the i.MX5x image processing unit, I would be looking under drivers/video/.

Cheers,
Samuel.

Signature · 2 lines
Intel Open Source Technology Centre
http://oss.intel.com/
author maintainer
#8 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Quoted 37 lines · Samuel Ortiz

Hi Sascha,

Quoted 20 lines · Sascha Hauer

The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely:

- Display Controller (dc)
- Display Interface (di)
- Display Multi Fifo Controller (dmfc)
- Display Processor (dp)
- Image DMA Controller (idmac)

This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together.

The IPU has other units missing in this patch:

Quoted 7 lines

- CMOS Sensor Interface (csi)
- Video Deinterlacer (vdi)
- Sensor Multi FIFO Controler (smfc)
- Image Converter (ic)
- Image Rotator (irt)

So expect more files to come in this directory.

I couldn't look into details as the patch is huge, but it looks mostly good. One thing I don't really like is the

drivers/mfd/imx-ipu-v3/ipu-common.c new file +3 -0
+static struct device *ipu_dev;
+void __iomem *ipu_cm_reg;
+void __iomem *ipu_idmac_reg;
Quoted 3 lines

part. I know there is currently no HW supporting more than one of those controllers, but as a general principle I find this is not a good programming habit.

Ok, will look into it.

Quoted 5 lines

Now, on a less technical note: I don't really see how this driver fits in the MFD category, unless the upcoming units support brings something new. If I were looking for the i.MX5x image processing unit, I would be looking under drivers/video/.

The ipu unit also supports cameras which would go to drivers/media/video. This is the original reason for putting it into drivers/mfd. That said, I'm not very comfortable with putting it there, mostly because it contains a lot of code to which a mfd maintainer can hardly say anything to and because it's one framework more which has to synchronized when changes to the IPU come.

Thanks,
Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#9 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Quoted 45 lines · Sascha Hauer
Quoted 37 lines · Samuel Ortiz

Hi Sascha,

Quoted 20 lines · Sascha Hauer

The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It features several units for image processing, this patch adds support for the units needed for Framebuffer support, namely:

- Display Controller (dc)
- Display Interface (di)
- Display Multi Fifo Controller (dmfc)
- Display Processor (dp)
- Image DMA Controller (idmac)

This patch is based on the Freescale driver, but follows a different approach. The Freescale code implements logical idmac channels and the handling of the subunits is hidden in common idmac code pathes in big switch/case statements. This patch instead just provides code and resource management for the different subunits. The user, in this case the framebuffer driver, decides how the different units play together.

The IPU has other units missing in this patch:

Quoted 7 lines

- CMOS Sensor Interface (csi)
- Video Deinterlacer (vdi)
- Sensor Multi FIFO Controler (smfc)
- Image Converter (ic)
- Image Rotator (irt)

So expect more files to come in this directory.

I couldn't look into details as the patch is huge, but it looks mostly good. One thing I don't really like is the

drivers/mfd/imx-ipu-v3/ipu-common.c new file +3 -0
+static struct device *ipu_dev;
+void __iomem *ipu_cm_reg;
+void __iomem *ipu_idmac_reg;
Quoted 3 lines

part. I know there is currently no HW supporting more than one of those controllers, but as a general principle I find this is not a good programming habit.

Ok, will look into it.

Quoted 1 line
Quoted 7 lines
Quoted 4 lines

Now, on a less technical note: I don't really see how this driver fits in the MFD category, unless the upcoming units support brings something new. If I were looking for the i.MX5x image processing unit, I would be looking under drivers/video/.

The ipu unit also supports cameras which would go to drivers/media/video. This is the original reason for putting it into drivers/mfd.

Ok, makes a bit more sense.

Quoted 4 lines

That said,
I'm not very comfortable with putting it there, mostly because it contains a lot of code to which a mfd maintainer can hardly say anything to

I won't argue with that :)
I'm not really confortable with it neither, even though the code looks nice and I'm quite sure you're committed to maintaining it in the long term.

Quoted 2 lines

and because it's one framework more which has to synchronized when changes to the IPU come.

Ok, so would moving it do drivers/video/ make sense ?

Cheers,
Samuel.

Signature · 2 lines
Intel Open Source Technology Centre
http://oss.intel.com/
#10 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Quoted 1 line · Samuel Ortiz

Ok, so would moving it do drivers/video/ make sense ?

Isn't that for framebuffer drivers?

#11 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Hi,

Quoted 4 lines · Russell King - ARM Linux
Quoted 1 line · Samuel Ortiz

Ok, so would moving it do drivers/video/ make sense ?

Isn't that for framebuffer drivers?

For now, the ipu driver is used for framebuffer on imx5.

Arnaud

author maintainer
#12 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Quoted 10 lines · Arnaud Patard

Hi,

Quoted 4 lines · Russell King - ARM Linux
Quoted 1 line · Samuel Ortiz

Ok, so would moving it do drivers/video/ make sense ?

Isn't that for framebuffer drivers?

For now, the ipu driver is used for framebuffer on imx5.

But it will hopefully be used for camera aswell.

How about arch/arm/plat-mxc?

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#13 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

Hello,

Quoted 8 lines · Sascha Hauer
Quoted 7 lines · Arnaud Patard

Hi,

Quoted 3 lines · Russell King - ARM Linux
Quoted 1 line · Samuel Ortiz

Ok, so would moving it do drivers/video/ make sense ?

Quoted 7 lines
Quoted 3 lines
Quoted 1 line

Isn't that for framebuffer drivers?

For now, the ipu driver is used for framebuffer on imx5.

But it will hopefully be used for camera aswell.

How about arch/arm/plat-mxc?

I'm sure Linus would object.

Best regards
Uwe

Signature · 2 lines
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
#14 lore raw

Re: [PATCH 3/9] Add a mfd IPUv3 driver

In reply to Russell King - ARM Linux
Quoted 4 lines · Russell King - ARM Linux
Quoted 1 line · Samuel Ortiz

Ok, so would moving it do drivers/video/ make sense ?

Isn't that for framebuffer drivers?

Mostly yes, but there are some display controller drivers there as well. See drivers/video/omap*/.

Cheers,
Samuel.

Signature · 2 lines
Intel Open Source Technology Centre
http://oss.intel.com/
author maintainer
#15 lore raw

PATCH 4/9 fb: export fb mode db table

In reply to Sascha Hauer

The different modes can be useful for drivers. Currently there is no way to expose the modes to sysfs, so export them.

---
 drivers/video/modedb.c |    7 ++++++-
 include/linux/fb.h     |    3 +++
 2 files changed, 9 insertions(+), 1 deletions(-)
drivers/video/modedb.c +6 -1
index 0a4dbdc..82122a9 100644
@@ -36,7 +36,7 @@ EXPORT_SYMBOL_GPL(fb_mode_option);
      *  Standard video mode definitions (taken from XFree86)
      */
 
-static const struct fb_videomode modedb[] = {
+const struct fb_videomode modedb[] = {
     {
 	/* 640x400 @ 70 Hz, 31.5 kHz hsync */
 	NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2,
@@ -277,6 +277,11 @@ static const struct fb_videomode modedb[] = {
     },
 };
 
+const struct fb_videomode *fb_modes = modedb;
+EXPORT_SYMBOL(fb_modes);
+const int num_fb_modes = ARRAY_SIZE(modedb);
+EXPORT_SYMBOL(num_fb_modes);
+
 #ifdef CONFIG_FB_MODE_HELPERS
 const struct fb_videomode vesa_modes[] = {
 	/* 0 640x350-85 VESA */
include/linux/fb.h +3 -0
index d1631d3..e006172 100644
@@ -1151,6 +1151,9 @@ struct fb_videomode {
 extern const char *fb_mode_option;
 extern const struct fb_videomode vesa_modes[];
 
+extern const struct fb_videomode *fb_modes;
+extern const int num_fb_modes;
+
 struct fb_modelist {
 	struct list_head list;
 	struct fb_videomode mode;
Signature · 1 line
1.7.2.3
author maintainer
#16 lore raw

PATCH 5/9 Add i.MX5 framebuffer driver

In reply to Sascha Hauer

This patch adds framebuffer support to the Freescale i.MX SoCs equipped with an IPU v3, so far these are the i.MX50/51/53.

This driver has been tested on the i.MX51 babbage board with both DVI and analog VGA in different resolutions and color depths. It has also been tested on a custom i.MX51 board using a fixed resolution panel.

---
 drivers/video/Kconfig  |   11 +
 drivers/video/Makefile |    1 +
 drivers/video/mx5fb.c  |  934 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 946 insertions(+), 0 deletions(-)
 create mode 100644 drivers/video/mx5fb.c
drivers/video/Kconfig +11 -0
index 27c1fb4..1901915 100644
@@ -2236,6 +2236,17 @@ config FB_MX3
 	  far only synchronous displays are supported. If you plan to use
 	  an LCD display with your i.MX31 system, say Y here.
 
+config FB_MX5
+	tristate "MX5 Framebuffer support"
+	depends on FB && MFD_IMX_IPU_V3
+	select FB_CFB_FILLRECT
+	select FB_CFB_COPYAREA
+	select FB_CFB_IMAGEBLIT
+	select FB_MODE_HELPERS
+	help
+	  This is a framebuffer device for the i.MX51 LCD Controller. If you
+	  plan to use an LCD display with your i.MX51 system, say Y here.
+
 config FB_BROADSHEET
 	tristate "E-Ink Broadsheet/Epson S1D13521 controller support"
 	depends on FB
drivers/video/Makefile +1 -0
index 485e8ed..ad408d2 100644
@@ -145,6 +145,7 @@ obj-$(CONFIG_FB_BF54X_LQ043)	  += bf54x-lq043fb.o
 obj-$(CONFIG_FB_BFIN_LQ035Q1)     += bfin-lq035q1-fb.o
 obj-$(CONFIG_FB_BFIN_T350MCQB)	  += bfin-t350mcqb-fb.o
 obj-$(CONFIG_FB_MX3)		  += mx3fb.o
+obj-$(CONFIG_FB_MX5)		  += mx5fb.o
 obj-$(CONFIG_FB_DA8XX)		  += da8xx-fb.o
 
 # the test framebuffer is last
drivers/video/mx5fb.c new file +934 -0

934 lines not on this page · raw message

Signature · 1 line
1.7.2.3
author maintainer
#17 lore raw

PATCH 6/9 ARM i.MX51: Add IPU device support

In reply to Sascha Hauer
---
 arch/arm/mach-mx5/devices-imx51.h               |    4 ++
 arch/arm/plat-mxc/devices/Kconfig               |    4 ++
 arch/arm/plat-mxc/devices/Makefile              |    1 +
 arch/arm/plat-mxc/devices/platform-imx_ipuv3.c  |   47 +++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/devices-common.h |   10 +++++
 5 files changed, 66 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-mxc/devices/platform-imx_ipuv3.c
arch/arm/mach-mx5/devices-imx51.h +4 -0
index 6302e46..851c114 100644
@@ -47,3 +47,7 @@ extern const struct imx_spi_imx_data imx51_ecspi_data[] __initconst;
 extern const struct imx_imx2_wdt_data imx51_imx2_wdt_data[] __initconst;
 #define imx51_add_imx2_wdt(id, pdata)	\
 	imx_add_imx2_wdt(&imx51_imx2_wdt_data[id])
+
+extern const struct imx_ipuv3_data imx51_ipuv3_data __initconst;
+#define imx51_add_ipuv3(pdata)	\
+	imx_add_ipuv3(&imx51_ipuv3_data, pdata)
arch/arm/plat-mxc/devices/Kconfig +4 -0
index 2537166..262d9c5 100644
@@ -71,3 +71,7 @@ config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 
 config IMX_HAVE_PLATFORM_SPI_IMX
 	bool
+
+config IMX_HAVE_PLATFORM_IMX_IPUV3
+	bool
+
arch/arm/plat-mxc/devices/Makefile +1 -0
index 75cd2ec..0a6be0a 100644
@@ -22,3 +22,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RNGA) += platform-mxc_rnga.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) +=  platform-spi_imx.o
+obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3) +=  platform-imx_ipuv3.o
arch/arm/plat-mxc/devices/platform-imx_ipuv3.c new file +47 -0

47 lines not on this page · raw message

arch/arm/plat-mxc/include/mach/devices-common.h +10 -0
index 8658c9c..8f5197f 100644
@@ -264,3 +264,13 @@ struct imx_spi_imx_data {
 struct platform_device *__init imx_add_spi_imx(
 		const struct imx_spi_imx_data *data,
 		const struct spi_imx_master *pdata);
+
+#include <mach/ipu-v3.h>
+struct imx_ipuv3_data {
+	resource_size_t iobase;
+	resource_size_t irq_err;
+	resource_size_t irq;
+};
+struct platform_device *__init imx_add_ipuv3(
+		const struct imx_ipuv3_data *data,
+		const struct imx_ipuv3_platform_data *pdata);
Signature · 1 line
1.7.2.3
author maintainer
#18 lore raw

PATCH 7/9 ARM i.MX5: Allow to increase max zone order

In reply to Sascha Hauer

default setting of 11 allows us to allocate at maximum 2MB chunks of contiguous memory. For resolutions up to 1920x1080 32bpp we need much more memory, so make zone order configurable

---
 arch/arm/Kconfig |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/Kconfig +2 -2
index db524e7..b3e070e 100644
@@ -1410,8 +1410,8 @@ config SPARSE_IRQ
 source "mm/Kconfig"
 
 config FORCE_MAX_ZONEORDER
-	int "Maximum zone order" if ARCH_SHMOBILE
-	range 11 64 if ARCH_SHMOBILE
+	int "Maximum zone order" if ARCH_SHMOBILE || ARCH_MX5
+	range 11 64 if ARCH_SHMOBILE || ARCH_MX5
 	default "9" if SA1111
 	default "11"
 	help
Signature · 1 line
1.7.2.3
author maintainer
#19 lore raw

PATCH 8/9 ARM i.MX5: increase dma consistent size for IPU support

In reply to Sascha Hauer
---
 arch/arm/plat-mxc/include/mach/memory.h |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)
arch/arm/plat-mxc/include/mach/memory.h +2 -1
index 9a9a000..987b42a 100644
@@ -40,7 +40,8 @@
 # endif
 #endif
 
-#if defined(CONFIG_MX3_VIDEO)
+#if defined(CONFIG_MX3_VIDEO) || defined(CONFIG_MFD_IMX_IPU_V3) || \
+	defined(CONFIG_MFD_IMX_IPU_V3_MODULE)
 /*
  * Increase size of DMA-consistent memory region.
  * This is required for mx3 camera driver to capture at least two QXGA frames.
Signature · 1 line
1.7.2.3
author maintainer
#20 lore raw

PATCH 9/9 ARM i.MX51 babbage: Add framebuffer support

In reply to Sascha Hauer
---
 arch/arm/mach-mx5/Kconfig              |    1 +
 arch/arm/mach-mx5/board-mx51_babbage.c |   74 ++++++++++++++++++++++++++++++++
 2 files changed, 75 insertions(+), 0 deletions(-)
arch/arm/mach-mx5/Kconfig +1 -0
index 5011f42..2a936b7 100644
@@ -22,6 +22,7 @@ config MACH_MX51_BABBAGE
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 	select IMX_HAVE_PLATFORM_SPI_IMX
+	select IMX_HAVE_PLATFORM_IMX_IPUV3
 	help
 	  Include support for MX51 Babbage platform, also known as MX51EVK in
 	  u-boot. This includes specific configurations for the board and its
arch/arm/mach-mx5/board-mx51_babbage.c +74 -0

103 lines not on this page · raw message

Signature · 1 line
1.7.2.3
#21 lore raw

Re: [PATCH 9/9] ARM i.MX51 babbage: Add framebuffer support

Hi Sascha,

2010/12/20 Sascha Hauer <[email protected]>:

Quoted 28 lines

---
?arch/arm/mach-mx5/Kconfig ? ? ? ? ? ? ?| ? ?1 + ?arch/arm/mach-mx5/board-mx51_babbage.c | ? 74 ++++++++++++++++++++++++++++++++ ?2 files changed, 75 insertions(+), 0 deletions(-)

arch/arm/mach-mx5/Kconfig +0 -0
index 5011f42..2a936b7 100644
@@ -22,6 +22,7 @@ config MACH_MX51_BABBAGE

? ? ? ?select IMX_HAVE_PLATFORM_IMX_UART
? ? ? ?select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
? ? ? ?select IMX_HAVE_PLATFORM_SPI_IMX
+ ? ? ? select IMX_HAVE_PLATFORM_IMX_IPUV3
? ? ? ?help
? ? ? ? ?Include support for MX51 Babbage platform, also known as MX51EVK in ? ? ? ? ?u-boot. This includes specific configurations for the board and its

arch/arm/mach-mx5/board-mx51_babbage.c +0 -0
index 368a315..6c1576c 100644
@@ -22,11 +22,13 @@

?#include <linux/input.h>
?#include <linux/spi/flash.h>
?#include <linux/spi/spi.h>
+#include <linux/mfd/imx-ipu-v3.h>

Quoted 6 lines

?#include <mach/common.h>
?#include <mach/hardware.h>
?#include <mach/iomux-mx51.h>
?#include <mach/mxc_ehci.h>
+#include <mach/ipu-v3.h>

Why it needs imx-ipu-v3.h and ipu-v3.h?

Quoted 69 lines

?#include <asm/irq.h>
?#include <asm/setup.h>

arch/arm/mach-mx5/board-mx51_babbage.c +35 -0
@@ -158,6 +160,41 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {
 ? ? ? ?MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
 ? ? ? ?MX51_PAD_CSPI1_SS0__GPIO_4_24,
 ? ? ? ?MX51_PAD_CSPI1_SS1__GPIO_4_25,
+
+ ? ? ? /* Display */
+ ? ? ? MX51_PAD_DISPB2_SER_DIN__GPIO_3_5,
+ ? ? ? MX51_PAD_DISPB2_SER_DIO__GPIO_3_6,
+ ? ? ? MX51_PAD_NANDF_D12__GPIO_3_28,
+
+ ? ? ? MX51_PAD_DISP1_DAT0__DISP1_DAT0,
+ ? ? ? MX51_PAD_DISP1_DAT1__DISP1_DAT1,
+ ? ? ? MX51_PAD_DISP1_DAT2__DISP1_DAT2,
+ ? ? ? MX51_PAD_DISP1_DAT3__DISP1_DAT3,
+ ? ? ? MX51_PAD_DISP1_DAT4__DISP1_DAT4,
+ ? ? ? MX51_PAD_DISP1_DAT5__DISP1_DAT5,
+ ? ? ? MX51_PAD_DISP1_DAT6__DISP1_DAT6,
+ ? ? ? MX51_PAD_DISP1_DAT7__DISP1_DAT7,
+ ? ? ? MX51_PAD_DISP1_DAT8__DISP1_DAT8,
+ ? ? ? MX51_PAD_DISP1_DAT9__DISP1_DAT9,
+ ? ? ? MX51_PAD_DISP1_DAT10__DISP1_DAT10,
+ ? ? ? MX51_PAD_DISP1_DAT11__DISP1_DAT11,
+ ? ? ? MX51_PAD_DISP1_DAT12__DISP1_DAT12,
+ ? ? ? MX51_PAD_DISP1_DAT13__DISP1_DAT13,
+ ? ? ? MX51_PAD_DISP1_DAT14__DISP1_DAT14,
+ ? ? ? MX51_PAD_DISP1_DAT15__DISP1_DAT15,
+ ? ? ? MX51_PAD_DISP1_DAT16__DISP1_DAT16,
+ ? ? ? MX51_PAD_DISP1_DAT17__DISP1_DAT17,
+ ? ? ? MX51_PAD_DISP1_DAT18__DISP1_DAT18,
+ ? ? ? MX51_PAD_DISP1_DAT19__DISP1_DAT19,
+ ? ? ? MX51_PAD_DISP1_DAT20__DISP1_DAT20,
+ ? ? ? MX51_PAD_DISP1_DAT21__DISP1_DAT21,
+ ? ? ? MX51_PAD_DISP1_DAT22__DISP1_DAT22,
+ ? ? ? MX51_PAD_DISP1_DAT23__DISP1_DAT23,
+#define MX51_PAD_DI_GP4__IPU_DI2_PIN15 ? ? ? ? ? ? ? ? IOMUX_PAD(0x758, 0x350, 4, 0x0, ? 0, NO_PAD_CTRL)
+ ? ? ? MX51_PAD_DI_GP4__IPU_DI2_PIN15,
+
+ ? ? ? /* I2C DVI enable */
+ ? ? ? MX51_PAD_CSI2_HSYNC__GPIO_4_14,
 ?};
 

?/* Serial ports */

arch/arm/mach-mx5/board-mx51_babbage.c +17 -0
@@ -346,6 +383,23 @@ static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = {
 ? ? ? ?.num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs),
 ?};
 
+static struct ipuv3_fb_platform_data babbage_fb0_data = {
+ ? ? ? .interface_pix_fmt = IPU_PIX_FMT_RGB24,
+ ? ? ? .flags = IMX_IPU_FB_USE_MODEDB | IMX_IPU_FB_USE_OVERLAY,
+ ? ? ? .display = 0,
+};
+
+static struct ipuv3_fb_platform_data babbage_fb1_data = {
+ ? ? ? .interface_pix_fmt = IPU_PIX_FMT_RGB565,
+ ? ? ? .flags = IMX_IPU_FB_USE_MODEDB,
+ ? ? ? .display = 1,
+};
+
+static struct imx_ipuv3_platform_data ipu_data = {
+ ? ? ? .fb_head0_platform_data = &babbage_fb0_data,
+ ? ? ? .fb_head1_platform_data = &babbage_fb1_data,
+};
+

?/*
?* Board specific initialization.
?*/

arch/arm/mach-mx5/board-mx51_babbage.c static void __init mxc_board_init(void) · line 453

Quoted 8 lines
arch/arm/mach-mx5/board-mx51_babbage.c +5 -0
@@ -392,6 +446,26 @@ static void __init mxc_board_init(void)
 ? ? ? ? ? ? ? ?ARRAY_SIZE(mx51_babbage_spi_board_info));
 ? ? ? ?imx51_add_ecspi(0, &mx51_babbage_spi_pdata);
 ? ? ? ?imx51_add_imx2_wdt(0, NULL);
+
+#define GPIO_DVI_DETECT ? ? ? ?(2 * 32 + 28)
+#define GPIO_DVI_RESET (2 * 32 + 5)
+#define GPIO_DVI_PWRDN (2 * 32 + 6)
+#define GPIO_DVI_I2C ? (3 * 32 + 14)

This should be in board-xxx.h.

Quoted 4 lines
arch/arm/mach-mx5/board-mx51_babbage.c +4 -0
+
+ ? ? ? /* DVI Detect */
+ ? ? ? gpio_request(GPIO_DVI_DETECT, "dvi detect");
+ ? ? ? gpio_direction_input(GPIO_DVI_DETECT);

arch/arm/mach-mx5/board-mx51_babbage.c static void __init mxc_board_init(void) · line 467

Quoted 10 lines
arch/arm/mach-mx5/board-mx51_babbage.c +10 -0
+ ? ? ? /* DVI Reset - Assert for i2c disabled mode */
+ ? ? ? gpio_request(GPIO_DVI_RESET, "dvi reset");
+ ? ? ? gpio_direction_output(GPIO_DVI_RESET, 0);
+ ? ? ? /* DVI Power-down */
+ ? ? ? gpio_request(GPIO_DVI_PWRDN, "dvi pwdn");
+ ? ? ? gpio_direction_output(GPIO_DVI_PWRDN, 1);
+
+ ? ? ? gpio_request(GPIO_DVI_I2C, "dvi i2c");
+ ? ? ? gpio_direction_output(GPIO_DVI_I2C, 0);
+

Can this implement as function, and passes to specified driver who needs it?

Quoted 13 lines
arch/arm/mach-mx5/board-mx51_babbage.c +1 -1
+ ? ? ? imx51_add_ipuv3(&ipu_data);
 ?}
 
 ?static void __init mx51_babbage_timer_init(void)
--

1.7.2.3

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Signature · 2 lines
cheers,
jay
#22 lore raw
In reply to Sascha Hauer

Sascha Hauer <[email protected]> writes:

Hi,

Quoted 5 lines

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

After adding code to my efika sb machine file and your patchset, I've seen the light. Err, no. It was a penguin and a login prompt. I guess it means your patchset is working here.

btw, would be nice to add some comments/docs about :
- the meaning of the fields of the imx_ipuv3_platform_data struct. it's not clear
- same for .display field of the ipuv3_fb_platform_data

Arnaud

#23 lore raw
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

"Arnaud" == Arnaud Patard (Rtp) <[email protected]> writes:

Arnaud> Sascha Hauer <[email protected]> writes:
Arnaud> Hi,

Quoted 6 lines
Quoted 6 lines

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

Arnaud> After adding code to my efika sb machine file and your patchset, I've Arnaud> seen the light. Err, no. It was a penguin and a login prompt. I guess Arnaud> it means your patchset is working here.

Cool. Care to submit that machine file support?

Signature · 1 line
Bye, Peter Korsgaard
#24 lore raw

Peter Korsgaard <[email protected]> writes:
Hi,

Quoted 12 lines
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

"Arnaud" == Arnaud Patard (Rtp) <[email protected]> writes:

Arnaud> Sascha Hauer <[email protected]> writes:
Arnaud> Hi,

Quoted 6 lines
Quoted 6 lines

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

Quoted 5 lines

Arnaud> After adding code to my efika sb machine file and your patchset, I've Arnaud> seen the light. Err, no. It was a penguin and a login prompt. I guess Arnaud> it means your patchset is working here.

Cool. Care to submit that machine file support?

Yes, I will (of course) but ... I'd like to see the usb issues I found fixed because they're the only way to get usb on the sb and without usb, you have no network, no keyboard, no way to connect any external device, which makes the sb pretty useless. In the mean time, you can use my patchset once I've added the fb support in it.

Arnaud

#25 lore raw
In reply to Sascha Hauer

Hello,

Sascha Hauer a ?crit :

Quoted 6 lines

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

This driver is also working fine for me on a custom i.MX51 board with a 800x480 18 bits TFT LCD (16bpp mode).

The only strange thing I noticed was a kind of uggly sprite/artefact (32x32, I would say) appearing at the same time as the Linux console. I think it may be related to a hardware cursor badly (?) initialised, but I didn't find a fix yet.
It disappears when I launch a graphical application (Qt or SDL).

Regards,
Julien

#26 lore raw
Quoted 9 lines · Julien Boibessot

Hello,

Sascha Hauer a ?crit :

Quoted 6 lines

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

Quoted 8 lines

This driver is also working fine for me on a custom i.MX51 board with a 800x480 18 bits TFT LCD (16bpp mode).

The only strange thing I noticed was a kind of uggly sprite/artefact (32x32, I would say) appearing at the same time as the Linux console. I think it may be related to a hardware cursor badly (?) initialised, but I didn't find a fix yet.
It disappears when I launch a graphical application (Qt or SDL).

In the top left corner? That'll be the linux penguin logo, and if it's not coming out correctly, your framebuffer driver is badly broken. Maybe your RGB bitfield information or visual is wrong?

#27 lore raw

Russell King - ARM Linux a ?crit :

Quoted 9 lines · Julien Boibessot
Quoted 7 lines

The only strange thing I noticed was a kind of uggly sprite/artefact (32x32, I would say) appearing at the same time as the Linux console. I think it may be related to a hardware cursor badly (?) initialised, but I didn't find a fix yet.
It disappears when I launch a graphical application (Qt or SDL).

Quoted 4 lines

In the top left corner? That'll be the linux penguin logo, and if it's not coming out correctly, your framebuffer driver is badly broken. Maybe your RGB bitfield information or visual is wrong?

Sorry for my late answer...
Penguin logo is OK, the artefact is just under the penguin and is looking like a blinking cursor until login message is displayed. At that time it becomes a kind of uggly rectangular black and white lines mix, overlapping logging message.
I will follow Sascha's advise and try to play with i.MX51 hardware cursor.

Regards,
Julien

author maintainer
#28 lore raw
In reply to Julien Boibessot
Quoted 9 lines · Julien Boibessot

Hello,

Sascha Hauer a ?crit :

Quoted 6 lines

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

Quoted 8 lines

This driver is also working fine for me on a custom i.MX51 board with a 800x480 18 bits TFT LCD (16bpp mode).

The only strange thing I noticed was a kind of uggly sprite/artefact (32x32, I would say) appearing at the same time as the Linux console. I think it may be related to a hardware cursor badly (?) initialised, but I didn't find a fix yet.
It disappears when I launch a graphical application (Qt or SDL).

It may be the penguin, but I remember a similar report also talkling about hardware cursors. I can't reproduce this. You could search for cursor in the IPU section of the manual and play with the corresponding registers.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#29 lore raw

PATCH v2 1/1 i.MX51 Framebuffer support

Quoted 19 lines · Sascha Hauer
Quoted 9 lines · Julien Boibessot

Hello,

Sascha Hauer a ?crit :

Quoted 6 lines

The following series adds i.MX51 framebuffer support based on the IPUv3. It is not perfect but I decided it is good enough to open it for a wider audience and collect first reviews. I tested this on a babbage board using both outputs (VGA/DVI) with different resolutions up to 1680x1050 and different colour depths. I also tested it on one custom board using a fixed display setting.

Quoted 8 lines

This driver is also working fine for me on a custom i.MX51 board with a 800x480 18 bits TFT LCD (16bpp mode).

The only strange thing I noticed was a kind of uggly sprite/artefact (32x32, I would say) appearing at the same time as the Linux console. I think it may be related to a hardware cursor badly (?) initialised, but I didn't find a fix yet.
It disappears when I launch a graphical application (Qt or SDL).

Quoted 5 lines

It may be the penguin, but I remember a similar report also talkling about hardware cursors. I can't reproduce this. You could search for cursor in the IPU section of the manual and play with the corresponding registers.

We see this too, but only when increasing resolution from the kernel default. We get a yellow square appear in the lower right quadrant of the display.

P.