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mpc83xx: fix pcie configuration space read/write

PATCH Superseded Baidu Boy 3 participants 3 messages Jan 7, 2011 – Jan 9, 2011 PowerPC

v2 of 4 Superseded Latest is v4 →

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Baidu Boy

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#0 lore raw

PATCH v2 1/1 mpc83xx: fix pcie configuration space read/write

This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller.

---
Changes for v2:
- Avoid line wrap in the patch

 arch/powerpc/cpu/mpc83xx/pcie.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)
arch/powerpc/cpu/mpc83xx/pcie.c +6 -2
index 46a706d..2a200b8 100644
@@ -46,13 +46,15 @@ static struct {
 #endif
 };
 
+static u8 pcie_index =0;
+
 #ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
 
 static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
 {
 	int bus = PCI_BUS(dev) - hose->first_busno;
 	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
-	pex83xx_t *pex = &immr->pciexp[bus];
+	pex83xx_t *pex = &immr->pciexp[pcie_index];
 	struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0];
 	u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev);
 	u32 dev_base = bus << 24 | devfn << 16;
@@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region **reg)
 		num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space);
 	}
 
-	for (i = 0; i < num_buses; i++)
+	for (i = 0; i < num_buses; i++){
+		pcie_index = i;
 		mpc83xx_pcie_init_bus(i, reg[i]);
+	}
 }
Signature · 1 line
1.7.3.1.msysgit.0
#1 lore raw

PATCH v2 1/1 mpc83xx: fix pcie configuration space read/write

Quoted 1 line · On Fri, 7 Jan 2011 20:42:51 +0800 Baidu Boy <[email protected]> wrote:

Sign-offs (and ideally the From: field as well) should contain your real name.

Quoted 8 lines
arch/powerpc/cpu/mpc83xx/pcie.c +0 -0
index 46a706d..2a200b8 100644
@@ -46,13 +46,15 @@ static struct {
 #endif
 };
 

arch/powerpc/cpu/mpc83xx/pcie.c static struct { · line 57

Quoted 10 lines
arch/powerpc/cpu/mpc83xx/pcie.c +3 -1
+static u8 pcie_index =0;
+
 #ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
 
 static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
 {
 	int bus = PCI_BUS(dev) - hose->first_busno;
 	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
-	pex83xx_t *pex = &immr->pciexp[bus];
+	pex83xx_t *pex = &immr->pciexp[pcie_index];

Maybe struct pci_controller should contain a field for the driver's private use, where such things could be placed?

arch/powerpc/cpu/mpc83xx/pcie.c void mpc83xx_pcie_init(int num_buses, struct pci_region **reg) · line 333

Quoted 13 lines
arch/powerpc/cpu/mpc83xx/pcie.c +3 -1
 	struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0];
 	u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev);
 	u32 dev_base = bus << 24 | devfn << 16;
@@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region **reg)
 		num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space);
 	}
 
-	for (i = 0; i < num_buses; i++)
+	for (i = 0; i < num_buses; i++){
+		pcie_index = i;
 		mpc83xx_pcie_init_bus(i, reg[i]);
+	}
 }

Won't this break if config space is accessed after initializion?

-Scott

#2 lore raw

PATCH v2 1/1 mpc83xx: fix pcie configuration space read/write

In reply to Baidu Boy

Hello.

Quoted 15 lines · Baidu Boy

This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller.

---
Changes for v2:
- Avoid line wrap in the patch

  arch/powerpc/cpu/mpc83xx/pcie.c |    8 ++++++--
  1 files changed, 6 insertions(+), 2 deletions(-)
arch/powerpc/cpu/mpc83xx/pcie.c +0 -0
index 46a706d..2a200b8 100644

[...]

arch/powerpc/cpu/mpc83xx/pcie.c void mpc83xx_pcie_init(int num_buses, struct pci_region **reg) · line 329

Quoted 6 lines
arch/powerpc/cpu/mpc83xx/pcie.c +1 -1
@@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region **reg)
  		num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space);
  	}
 
-	for (i = 0; i<  num_buses; i++)
+	for (i = 0; i<  num_buses; i++){

There should be space between ) and {.

arch/powerpc/cpu/mpc83xx/pcie.c void mpc83xx_pcie_init(int num_buses, struct pci_region **reg) · line 333

Quoted 4 lines
arch/powerpc/cpu/mpc83xx/pcie.c +2 -0
+		pcie_index = i;
  		mpc83xx_pcie_init_bus(i, reg[i]);
+	}
  }

WBR, Sergei