ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM

The phy_enable callback in struct s5p_platform_mipi_csis is added to allow the CSIS driver to control its PHY enable and reset signals. This allows to use same MIPI CSIS driver across various SoCs.

Signed-off-by Sylwester Nawrocki <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 arch/arm/plat-s5p/dev-csis0.c              |    2 +-
 arch/arm/plat-s5p/dev-csis1.c              |    2 +-
 arch/arm/plat-s5p/include/plat/csis.h      |   28 --------------------
 arch/arm/plat-s5p/include/plat/mipi_csis.h |   39
++++++++++++++++++++++++++++
 4 files changed, 41 insertions(+), 30 deletions(-)
 delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
 create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h

arch/arm/plat-s5p/dev-csis0.c +1 -1

index dfab1c8..57efe9c 100644j
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010 Samsung Electronics Co., Ltd
  *
  * S5P series device definition for MIPI-CSIS channel 0
  *

arch/arm/plat-s5p/dev-csis1.c +1 -1

index e3053f2..c61b46b 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010 Samsung Electronics Co., Ltd
  *
  * S5P series device definition for MIPI-CSIS channel 1
  *

arch/arm/plat- renamed from arch/arm/plat-s5p/include/plat/csis.h +0 -0

s5p/include/plat/csis.h
deleted file mode 100644
index 51e308c..0000000

arch/arm/plat-s5p/include/plat/csis.h deleted +0 -28

@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics
- *
- * S5P series MIPI CSI slave device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef PLAT_S5P_CSIS_H_
-#define PLAT_S5P_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
- * @clk_rate: bus clock frequency
- * @lanes: number of data lanes used
- * @alignment: data alignment in bits
- * @hs_settle: HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
-	unsigned long clk_rate;
-	u8 lanes;
-	u8 alignment;
-	u8 hs_settle;
-};
-
-#endif /* PLAT_S5P_CSIS_H_ */

arch/arm/plat- renamed from arch/arm/plat-s5p/include/plat/mipi_csis.h +0 -0

s5p/include/plat/mipi_csis.h
new file mode 100644
index 0000000..0b22065

arch/arm/plat-s5p/include/plat/mipi_csis.h new file +39 -1

@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics, Co. Ltd
+ *
+ * S5P series MIPI CSI slave device support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_S5P_MIPI_CSIS_H_
+#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+
+struct platform_device;
+
+/**
+ * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
+ * @clk_rate: bus clock frequency
+ * @lanes: number of data lanes used
+ * @alignment: data alignment in bits
+ * @hs_settle: HS-RX settle time
+ */
+struct s5p_platform_mipi_csis {
+	unsigned long clk_rate;
+	u8 lanes;
+	u8 alignment;
+	u8 hs_settle;
+	int (*phy_enable)(struct platform_device *pdev, bool on);
+};
+
+/**
+ * struct s5p_csis_phy_control - global MIPI-CSIS PHY control
+ * @pdev: platform device the mipi phy state is to be changed for
+ * @on: true to enable CSIS PHY and assert its reset,
+ *	false will disable the PHY and put into reset state
+ */
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
+
+#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--

1.7.3.4

Quoted 17 lines · Sylwester Nawrocki

The phy_enable callback in struct s5p_platform_mipi_csis is added to allow the CSIS driver to control its PHY enable and reset signals. This allows to use same MIPI CSIS driver across various SoCs.

Signed-off-by Sylwester Nawrocki <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 arch/arm/plat-s5p/dev-csis0.c              |    2 +-
 arch/arm/plat-s5p/dev-csis1.c              |    2 +-
 arch/arm/plat-s5p/include/plat/csis.h      |   28 --------------------
 arch/arm/plat-s5p/include/plat/mipi_csis.h |   39
++++++++++++++++++++++++++++
 4 files changed, 41 insertions(+), 30 deletions(-)
 delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
 create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h

I think should be separated like following.

If required, ...

1. change copyright
2. rename csis.h to mipi_csis.h

3. add phy enable feature

arch/arm/mach-s5pv310/Makefile +2 -0

 # device support
 
 obj-y					+= dev-audio.o
+
+obj-$(CONFIG_S5PV310_SETUP_MIPI)	+= setup-mipi.o
 obj-$(CONFIG_S5PV310_DEV_PD)		+= dev-pd.o
 
 obj-$(CONFIG_S5PV310_SETUP_I2C1)	+= setup-i2c1.o

arch/arm/mach- renamed from arch/arm/mach-s5pv310/include/mach/map.h +0 -0

s5pv310/include/mach/map.h
index 33bcff2..6635287 100644

s5pv310/include/mach/regs-pmu.h
index fb333d0..bef8102 100644

arch/arm/mach-s5pv310/include/mach/regs-pmu.h +6 -0

@@ -27,4 +27,10 @@
 
 #define S5P_INT_LOCAL_PWR_EN		0x7
 
+#define S5P_MIPI_PHY0_CONTROL		S5P_PMUREG(0x0710)
+#define S5P_MIPI_PHY1_CONTROL		S5P_PMUREG(0x0714)
+#define S5P_MIPI_PHY_ENABLE		(1 << 0)
+#define S5P_MIPI_PHY_SRESETN		(1 << 1)
+#define S5P_MIPI_PHY_MRESETN		(1 << 2)
+
 #endif /* __ASM_ARCH_REGS_PMU_H */

arch/arm/mach- renamed from arch/arm/mach-s5pv310/setup-mipi.c +0 -0

s5pv310/setup-mipi.c
new file mode 100644
index 0000000..fc91a29

arch/arm/mach-s5pv310/setup-mipi.c new file +9 -0

@@ -0,0 +1,62 @@
+/* linux/arch/arm/mach-s5pv310/setup-mipi.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd
+ *
+ * S5PV310 - Helper functions for MIPI CSIS/DSIM PHY control
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.

rst)

arch/arm/mach-s5pv310/setup-mipi.c new file +16 -0

+{
+	static DEFINE_SPINLOCK(lock);
+	void __iomem *addr;
+	unsigned long flags;
+	int pid;
+	u32 cfg;
+
+	if (pdev == NULL)
+		return -EINVAL;
+
+	pid = pdev->id;
+	if (pid != 0 && pid != 1)
+		return -EINVAL;
+
+	addr = pid ? S5P_MIPI_PHY1_CONTROL : S5P_MIPI_PHY0_CONTROL;
+

arch/arm/mach-s5pv310/setup-mipi.c new file +17 -1

+		cfg &= ~S5P_MIPI_PHY_ENABLE;
+
+	__raw_writel(cfg, addr);
+
+	spin_unlock_irqrestore(&lock, flags);
+	return 0;
+}
+
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
+{
+	return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_SRESETN);
+}
+
+int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
+{
+	return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_MRESETN);
+}
--

1.7.3.4

Quoted 10 lines · Sylwester Nawrocki

MIPI_PHYn_CONTROL registers are shared between MIPI DSIM and MIPI CSIS drivers so a spinlock is used to protect multiple access to these registers. Also a proper state of a common PHY enable bit is maintained in order to avoid a DSIM and CSIS driver conflict.

Signed-off-by Sylwester Nawrocki <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---

Basically, it's not good that each machine(SoC) has each own setup-mipi... Because it is very similar(almost same)...means can move it in plat-s5p with following.

1. # of MIPI PHY can be calculated by platform device id
2. can use same definition of MIPI PHY control address with same name re-mapping.

Review

Quoted 44 lines · Sylwester Nawrocki

MIPI_PHYn_CONTROL registers are shared between MIPI DSIM and MIPI CSIS drivers so a spinlock is used to protect multiple access to these registers. Also a proper state of a common PHY enable bit is maintained in order to avoid a DSIM and CSIS driver conflict.

Signed-off-by Sylwester Nawrocki <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 arch/arm/mach-s5pv310/Kconfig                 |    6 ++
 arch/arm/mach-s5pv310/Makefile                |    2 +
 arch/arm/mach-s5pv310/include/mach/map.h      |    7 +--
 arch/arm/mach-s5pv310/include/mach/regs-pmu.h |    6 ++
 arch/arm/mach-s5pv310/setup-mipi.c            |   62
+++++++++++++++++++++++++
 5 files changed, 79 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/mach-s5pv310/setup-mipi.c

arch/arm/mach-s5pv310/Kconfig +6 -0

index b7aa3cd..2420076 100644
@@ -15,6 +15,11 @@ config CPU_S5PV310
 	help
 	  Enable S5PV310 CPU support
 
+config S5PV310_SETUP_MIPI
+	bool
+	help
+	  Common setup code for MIPI CSIS/DSIM channels 0 and 1.
+
 config S5PV310_DEV_PD
 	bool
 	help

@@ -96,6 +101,7 @@ config MACH_UNIVERSAL_C210
 	select S3C_DEV_HSMMC3
 	select S5PV310_SETUP_SDHCI
 	select S3C_DEV_I2C1
+	select S5PV310_SETUP_MIPI
 	select S5PV310_SETUP_I2C1
 	help
 	  Machine support for Samsung Mobile Universal S5PC210 Reference

(quoted diff) +0 -0

b/arch/arm/mach-s5pv310/Makefile

arch/arm/mach-s5pv310/Makefile obj-$(CONFIG_MACH_UNIVERSAL_C210) +=

Quoted 4 lines

index 651f193..7f1b89b 100644

arch/arm/mach-s5pv310/Makefile +0 -0

@@ -29,6 +29,8 @@ obj-$(CONFIG_MACH_UNIVERSAL_C210)	+=

mach-universal_c210.o

Quoted 14 lines

arch/arm/mach-s5pv310/Makefile +2 -0

 # device support
 
 obj-y					+= dev-audio.o
+
+obj-$(CONFIG_S5PV310_SETUP_MIPI)	+= setup-mipi.o
 obj-$(CONFIG_S5PV310_DEV_PD)		+= dev-pd.o
 
 obj-$(CONFIG_S5PV310_SETUP_I2C1)	+= setup-i2c1.o

arch/arm/mach- renamed from arch/arm/mach-s5pv310/include/mach/map.h +0 -0

s5pv310/include/mach/map.h
index 33bcff2..6635287 100644

arch/arm/mach-s5pv310/include/mach/map.h line 68

Quoted 6 lines

arch/arm/mach-s5pv310/include/mach/map.h +1 -2

@@ -65,8 +65,7 @@
 #define S5PV310_PA_GPIO2		(0x11000000)
 #define S5PV310_PA_GPIO3		(0x03860000)
 
-#define S5PV310_PA_MIPI_CSIS0		0x11880000
-#define S5PV310_PA_MIPI_CSIS1		0x11890000
+#define S5PV310_PA_MIPI_CSIS(x)		(0x11880000 + ((x) *

0x10000))

Review

Quoted 14 lines

arch/arm/mach-s5pv310/include/mach/map.h +2 -2

 #define S5PV310_PA_HSMMC(x)		(0x12510000 + ((x) * 0x10000))
 

@@ -124,7 +123,7 @@
 #define S3C_PA_IIC7			S5PV310_PA_IIC(7)
 #define S3C_PA_RTC			S5PV310_PA_RTC
 #define S3C_PA_WDT			S5PV310_PA_WATCHDOG
-#define S5P_PA_MIPI_CSIS0		S5PV310_PA_MIPI_CSIS0
-#define S5P_PA_MIPI_CSIS1		S5PV310_PA_MIPI_CSIS1
+#define S5P_PA_MIPI_CSIS0		S5PV310_PA_MIPI_CSIS(0)
+#define S5P_PA_MIPI_CSIS1		S5PV310_PA_MIPI_CSIS(1)
 
 #endif /* __ASM_ARCH_MAP_H */

(quoted diff) +0 -0

b/arch/arm/mach-

Quoted 31 lines

s5pv310/include/mach/regs-pmu.h
index fb333d0..bef8102 100644

arch/arm/mach-s5pv310/include/mach/regs-pmu.h +6 -0

@@ -27,4 +27,10 @@
 
 #define S5P_INT_LOCAL_PWR_EN		0x7
 
+#define S5P_MIPI_PHY0_CONTROL		S5P_PMUREG(0x0710)
+#define S5P_MIPI_PHY1_CONTROL		S5P_PMUREG(0x0714)
+#define S5P_MIPI_PHY_ENABLE		(1 << 0)
+#define S5P_MIPI_PHY_SRESETN		(1 << 1)
+#define S5P_MIPI_PHY_MRESETN		(1 << 2)
+
 #endif /* __ASM_ARCH_REGS_PMU_H */

arch/arm/mach- renamed from arch/arm/mach-s5pv310/setup-mipi.c +0 -0

s5pv310/setup-mipi.c
new file mode 100644
index 0000000..fc91a29

arch/arm/mach-s5pv310/setup-mipi.c new file +9 -0

@@ -0,0 +1,62 @@
+/* linux/arch/arm/mach-s5pv310/setup-mipi.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd
+ *
+ * S5PV310 - Helper functions for MIPI CSIS/DSIM PHY control
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.

arch/arm/mach-s5pv310/setup-mipi.c line 19

Quoted 10 lines

arch/arm/mach-s5pv310/setup-mipi.c new file +10 -0

+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <mach/regs-pmu.h>
+
+/* Global MIPI CSIS or DSIM PHY enable and reset control. */
+static int s5p_mipi_phy_control(struct platform_device *pdev, bool on,

u32

Quoted 17 lines

rst)

arch/arm/mach-s5pv310/setup-mipi.c new file +16 -0

+{
+	static DEFINE_SPINLOCK(lock);
+	void __iomem *addr;
+	unsigned long flags;
+	int pid;
+	u32 cfg;
+
+	if (pdev == NULL)
+		return -EINVAL;
+
+	pid = pdev->id;
+	if (pid != 0 && pid != 1)
+		return -EINVAL;
+
+	addr = pid ? S5P_MIPI_PHY1_CONTROL : S5P_MIPI_PHY0_CONTROL;
+

arch/arm/mach-s5pv310/setup-mipi.c

Quoted 10 lines

arch/arm/mach-s5pv310/setup-mipi.c new file +10 -0

+	spin_lock_irqsave(&lock, flags);
+
+	cfg = __raw_readl(addr) & ~rst;
+	if (on)
+		cfg |= rst;
+	__raw_writel(cfg, addr);
+
+	if (on)
+		cfg |= S5P_MIPI_PHY_ENABLE;
+	else if (!(cfg & (S5P_MIPI_PHY_SRESETN | S5P_MIPI_PHY_MRESETN) &

~rst))

Quoted 18 lines

arch/arm/mach-s5pv310/setup-mipi.c new file +17 -1

+		cfg &= ~S5P_MIPI_PHY_ENABLE;
+
+	__raw_writel(cfg, addr);
+
+	spin_unlock_irqrestore(&lock, flags);
+	return 0;
+}
+
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
+{
+	return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_SRESETN);
+}
+
+int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
+{
+	return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_MRESETN);
+}
--

Quoted 1 line

1.7.3.4

Basically, it's not good that each machine(SoC) has each own setup-mipi... Because it is very similar(almost same)...means can move it in plat-s5p with following.

1. # of MIPI PHY can be calculated by platform device id
2. can use same definition of MIPI PHY control address with same name re-mapping.

Hello,

the following patch series adds the common platform code for configuration of the MIPI CSIS and MIPI DSIM PHYs on S5PV210 and S5PV310 SoCs. The spinlock is used to avoid races while the common PHY control register is accessed from within MIPI DSIM and MIPI CSIS drivers.
The common PHY enable bit is cleared only when both CSIS and DSIM devices are not in use.

The patch series contains:

[PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup [PATCH/RFC 3/3] ARM: S5PV210: Add a platform helper for MIPI DSIM/CSIS setup

Quoted 12 lines · Sylwester Nawrocki

Hello,

the following patch series adds the common platform code for configuration of the MIPI CSIS and MIPI DSIM PHYs on S5PV210 and S5PV310 SoCs. The spinlock is used to avoid races while the common PHY control register is accessed from within MIPI DSIM and MIPI CSIS drivers.
The common PHY enable bit is cleared only when both CSIS and DSIM devices are not in use.

The patch series contains:

Quoted 2 lines

[PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS

setup

Quoted 1 line

[PATCH/RFC 3/3] ARM: S5PV210: Add a platform helper for MIPI DSIM/CSIS

setup

Quoted 1 line

Any comments on this one?