lwp: adding support for AMD lightweight profiling
RFC PATCH 2/5 lwp: adding support for AMD lightweight profiling
Add a new field for xsave/xrstor functions to specify the features.
Current implementation set EAX:EDX to all 1's. To be prepared for LWP, we add a parameter in xsave/xrstor functions to be set in EAX:EDX. Some of the idea was borrowed from Hans Rosenfeld's Linux kernel patch.
exporting patch:
# HG changeset patch
# User Wei Huang <[email protected]>
# Date 1297376221 21600
# Node ID 20d10f3a6d4c6b7357da0cf35a9fe28100cb582d
# Parent b57ee5edd2924179b21fa19d35b0e2754c4caeff
Add a new field for xsave/xrstor functions to specify the features.
Current implementation set EAX:EDX to all 1's. To be prepared for LWP, we add a parameter in xsave/xrstor functions to be set in EAX:EDX.
xen/arch/x86/i387.c +15 -9
@@ -18,36 +18,42 @@static bool_t __read_mostly cpu_has_xsaveopt; -static void xsave (struct vcpu *v) +static void xsave (struct vcpu *v,uint64_t mask) {struct xsave_struct *ptr = v->arch.xsave_area; +uint32_t hmask = mask >>32 ; +uint32_t lmask = mask; asmvolatile (".byte " REX_PREFIX "0x0f,0xae,0x27" : - :"a" (-1 ),"d" (-1 ),"D" (ptr) + :"a" (lmask),"d" (hmask),"D" (ptr) :"memory" ); } -static void xsaveopt (struct vcpu *v) +static void xsaveopt (struct vcpu *v,uint64_t mask) {struct xsave_struct *ptr = v->arch.xsave_area; +uint32_t hmask = mask >>32 ; +uint32_t lmask = mask; asmvolatile (".byte " REX_PREFIX "0x0f,0xae,0x37" : - :"a" (-1 ),"d" (-1 ),"D" (ptr) + :"a" (lmask),"d" (hmask),"D" (ptr) :"memory" ); } -static void xrstor (struct vcpu *v) +static void xrstor (struct vcpu *v,uint64_t mask) {struct xsave_struct *ptr = v->arch.xsave_area; +uint32_t hmask = mask >>32 ; +uint32_t lmask = mask; asmvolatile (".byte " REX_PREFIX "0x0f,0xae,0x2f" : - :"m" (*ptr),"a" (-1 ),"d" (-1 ),"D" (ptr) ); + :"m" (*ptr),"a" (lmask),"d" (hmask),"D" (ptr) ); }static void load_mxcsr (unsigned long val)
@@ -76,7 +82,7 @@* we set all supported feature mask before doing save/restore. */ set_xcr0 (v->arch.xcr0_accum); -xrstor (v); +xrstor (v,XCNTXT_DEFAULT );set_xcr0 (v->arch.xcr0); }else if ( v->fpu_initialised )
@@ -123,9 +129,9 @@*/ set_xcr0 (v->arch.xcr0_accum);if ( cpu_has_xsaveopt ) -xsaveopt (v); +xsaveopt (v,XCNTXT_DEFAULT );else -xsave (v); +xsave (v,XCNTXT_DEFAULT );set_xcr0 (v->arch.xcr0); }else if ( cpu_has_fxsr )
xen/include/asm-x86/i387.h +3 -0
@@ -32,6 +32,9 @@#define XSTATE_YMM_SIZE 256#define XSAVEOPT (1 << 0) +/* The features that the OS saves/restores by default. */ +#define XCNTXT_DEFAULT (-1) +struct xsave_struct {struct {char x[512 ]; } fpu_sse;/* FPU/MMX, SSE */
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