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SPEAr CPU freq: Adding support for CPU Freq framework

PATCH RESEND New Viresh Kumar 3 participants 4 messages Jan 21, 2011 – Feb 15, 2011 1 message not in the archive

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Arm (32-bit) Arm sub-architectures
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Viresh Kumar

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#1 lore raw

PATCH RESEND v5 39/63 SPEAr CPU freq: Adding support for CPU Freq framework

From: Deepak Sikri <[email protected]>

Signed-off-by Deepak Sikri <[email protected]>
Signed-off-by Rajeev Kumar <[email protected]>
Signed-off-by shiraz hashim <[email protected]>
Signed-off-by Viresh Kumar <[email protected]>
---
 arch/arm/Kconfig                |    1 +
 arch/arm/mach-spear13xx/clock.c |    7 +-
 arch/arm/mach-spear3xx/clock.c  |    5 +-
 arch/arm/mach-spear6xx/clock.c  |    5 +-
 arch/arm/plat-spear/Makefile    |    2 +-
 arch/arm/plat-spear/cpufreq.c   |  164 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 176 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/plat-spear/cpufreq.c
arch/arm/Kconfig +1 -0
index 957d320..11501de 100644
@@ -872,6 +872,7 @@ config PLAT_SPEAR
 	select CLKDEV_LOOKUP
 	select GENERIC_CLOCKEVENTS
 	select HAVE_CLK
+	select ARCH_HAS_CPUFREQ
 	help
 	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
arch/arm/mach-spear13xx/clock.c +4 -3
index 709adb2..a7e75ca 100644
@@ -91,6 +91,7 @@ static struct pll_clk_config pll1_config = {
 /* pll rate configuration table, in ascending order of rates */
 struct pll_rate_tbl pll_rtbl[] = {
 	/* PCLK 24MHz */
+	{.mode = 0, .m = 0x64, .n = 0x03, .p = 0x2}, /* 400 MHz */
 	{.mode = 0, .m = 0x7D, .n = 0x03, .p = 0x2}, /* 500 MHz */
 	{.mode = 0, .m = 0xA6, .n = 0x03, .p = 0x2}, /* 664 MHz */
 	{.mode = 0, .m = 0xC8, .n = 0x03, .p = 0x2}, /* 800 MHz */

@@ -107,7 +108,7 @@ static struct clk pll1_clk = {
 	.calc_rate = &pll_calc_rate,
 	.recalc = &pll_clk_recalc,
 	.set_rate = &pll_clk_set_rate,
-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 3},
+	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 4},
 	.private_data = &pll1_config,
 };
 

@@ -144,7 +145,7 @@ static struct clk pll2_clk = {
 	.calc_rate = &pll_calc_rate,
 	.recalc = &pll_clk_recalc,
 	.set_rate = &pll_clk_set_rate,
-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 3},
+	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 4},
 	.private_data = &pll2_config,
 };
 

@@ -165,7 +166,7 @@ static struct clk pll3_clk = {
 	.calc_rate = &pll_calc_rate,
 	.recalc = &pll_clk_recalc,
 	.set_rate = &pll_clk_set_rate,
-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 3},
+	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 4},
 	.private_data = &pll3_config,
 };
arch/arm/mach-spear3xx/clock.c +3 -2
index 58f0259..37faef1 100644
@@ -55,6 +55,7 @@ static struct pll_clk_masks pll_masks = {
 
 /* pll rate configuration table, in ascending order of rates */
 struct pll_rate_tbl pll_rtbl[] = {
+	{.mode = 0, .m = 0x53, .n = 0x0C, .p = 0x1}, /* 166 MHz */
 	{.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* 266 MHz */
 	{.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* 332 MHz */
 };

@@ -75,7 +76,7 @@ static struct clk pll1_clk = {
 	.calc_rate = &pll_calc_rate,
 	.recalc = &pll_clk_recalc,
 	.set_rate = &pll_clk_set_rate,
-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1},
+	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 2},
 	.private_data = &pll1_config,
 };
 

@@ -95,7 +96,7 @@ static struct clk pll2_clk = {
 	.calc_rate = &pll_calc_rate,
 	.recalc = &pll_clk_recalc,
 	.set_rate = &pll_clk_set_rate,
-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1},
+	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 2},
 	.private_data = &pll2_config,
 };
arch/arm/mach-spear6xx/clock.c +3 -2
index 99cc21d..0a38e16 100644
@@ -55,6 +55,7 @@ static struct pll_clk_masks pll_masks = {
 
 /* pll rate configuration table, in ascending order of rates */
 struct pll_rate_tbl pll_rtbl[] = {
+	{.mode = 0, .m = 0x53, .n = 0x0C, .p = 0x1}, /* 166 MHz */
 	{.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* 266 MHz */
 	{.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* 332 MHz */
 };

@@ -75,7 +76,7 @@ static struct clk pll1_clk = {
 	.calc_rate = &pll_calc_rate,
 	.recalc = &pll_clk_recalc,
 	.set_rate = &pll_clk_set_rate,
-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1},
+	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 2},
 	.private_data = &pll1_config,
 };
 

@@ -95,7 +96,7 @@ static struct clk pll2_clk = {
 	.calc_rate = &pll_calc_rate,
 	.recalc = &pll_clk_recalc,
 	.set_rate = &pll_clk_set_rate,
-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1},
+	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 2},
 	.private_data = &pll2_config,
 };
arch/arm/plat-spear/Makefile +1 -1
index 4c28f01..ec85b82 100644
@@ -6,7 +6,7 @@
 obj-y	:= clcd.o clock.o pll_clk.o time.o
 
 obj-$(CONFIG_ARCH_SPEAR3XX)	+= shirq.o padmux.o
-
+obj-$(CONFIG_CPU_FREQ)		+= cpufreq.o
 obj-$(CONFIG_MACH_SPEAR310)	+= plgpio.o
 obj-$(CONFIG_MACH_SPEAR320)	+= plgpio.o
 obj-$(CONFIG_SPEAR_PWM)		+= pwm.o
arch/arm/plat-spear/cpufreq.c new file +164 -0

164 lines not on this page · raw message

Signature · 1 line
1.7.2.2
#3 lore raw

PATCH RESEND v5 39/63 SPEAr CPU freq: Adding support for CPU Freq framework

In reply to Viresh Kumar

arch/arm/plat-spear/cpufreq.c line 89

Quoted 10 lines · Viresh Kumar

From: Deepak Sikri <[email protected]>

<snip>

arch/arm/plat-spear/cpufreq.c new file +6 -0
+
+	newfreq = clk_round_rate(cpu_clk, spear_cpu_freq[index] * 1000);
+	if (newfreq < 0) {
+		pr_err("CPU Freq: clk_round_rate failed: %ld\n", newfreq);
+		return newfreq;
+	}

clk_round_rate will call round_rate_index();
--------------------------

static int
round_rate_index(struct clk *clk, unsigned long drate, unsigned long *rate)

{
        unsigned long tmp = 0, prev_rate = 0; 
        int index;

        if (!clk->calc_rate)
                return -EFAULT;

------------------------------------------

The cpu_clk don't have calc_rate, clk_round_rate always return fault.

Stanley.

author
#4 lore raw

PATCH RESEND v5 39/63 SPEAr CPU freq: Adding support for CPU Freq framework

Quoted 23 lines · stanley.miao
Quoted 10 lines · Viresh Kumar

arch/arm/plat-spear/cpufreq.c line 89

Quoted 10 lines

From: Deepak Sikri <[email protected]>

<snip>

arch/arm/plat-spear/cpufreq.c new file +6 -0
+
+	newfreq = clk_round_rate(cpu_clk, spear_cpu_freq[index] * 1000);
+	if (newfreq < 0) {
+		pr_err("CPU Freq: clk_round_rate failed: %ld\n", newfreq);
+		return newfreq;
+	}

clk_round_rate will call round_rate_index();
--------------------------

static int
round_rate_index(struct clk *clk, unsigned long drate, unsigned long *rate)

{
        unsigned long tmp = 0, prev_rate = 0; 
        int index;

        if (!clk->calc_rate)
                return -EFAULT;
Quoted 3 lines

------------------------------------------

The cpu_clk don't have calc_rate, clk_round_rate always return fault.

I will resend this patch with this issue resolved.

Signature · 1 line
viresh