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OMAP3 Beagle Pin Mux initialization glitch fix

PATCH New Bob Feretich 2 participants 2 messages Feb 24, 2011 – Mar 1, 2011

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#0 lore raw

PATCH 1/1 OMAP3 Beagle Pin Mux initialization glitch fix

The below patch reverses the order of two segments in the board file. Output pins need to have their values initialized, before they are exposed to the logic outside the chip.

---

board/ti/beagle/beagle.c +6 -6
@@ -239,17 +239,17 @@ int misc_init_r(void)
  	twl4030_power_init();
  	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
 
-	/* Configure GPIOs to output */
-	writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
-	writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
-		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
-
-	/* Set GPIOs */
+	/* Set GPIO states before they are made outputs */
  	writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
  		&gpio6_base->setdataout);
  	writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
  		GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
 
+	/* Configure GPIOs to output */
+	writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
+	writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
+		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
+
  	dieid_num_r();
 
  	return 0;

--

#1 lore raw

PATCH 1/1 OMAP3 Beagle Pin Mux initialization glitch fix

Quoted 6 lines · Bob Feretich

The below patch reverses the order of two segments in the board file. Output pins need to have their values initialized, before they are exposed to the logic outside the chip.

Looks good to me. Thanks Bob! We'll try to pick this up in the default u-boot that ships with the board.

Quoted 35 lines

---

board/ti/beagle/beagle.c ?2011-02-23 17:47:44.000000000 -0800 renamed from board/ti/beagle/beagle.c ?2011-02-23 17:26:27.000000000 -0800 +1 -6
@@ -239,17 +239,17 @@ int misc_init_r(void)
 ? ? ? ?twl4030_power_init();
 ? ? ? ?twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
 
- ? ? ? /* Configure GPIOs to output */
- ? ? ? writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
- ? ? ? writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
- ? ? ? ? ? ? ? GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
-
- ? ? ? /* Set GPIOs */
+ ? ? ? /* Set GPIO states before they are made outputs */
 ? ? ? ?writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
 ? ? ? ? ? ? ? ?&gpio6_base->setdataout);

? ? ? ?writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | ? ? ? ? ? ? ? ?GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);

+ ? ? ? /* Configure GPIOs to output */

+ ? ? ? writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
+ ? ? ? writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |

+ ? ? ? ? ? ? ? GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); +
? ? ? ?dieid_num_r();

? ? ? ?return 0;
--
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