Add watchdog reset to the at91samx SOC family
Subsystems (2)
PATCH 1/1 Add watchdog reset to the at91samx SOC family
This patch add the watchdog reset function to the atmel atsam9x architectures.
---
arch/arm/cpu/arm926ejs/at91/timer.c +16 -0
@@ -26,6 +26,7 @@#include <asm/arch/hardware.h> #include <asm/arch/at91_pit.h> #include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_wdt.h> #include <asm/arch/clk.h> #include <asm/arch/io.h> #include <div64.h>
@@ -139,3 +140,18 @@ ulong get_tbclk(void) {return gd->timer_rate_hz; } + +#if defined(CONFIG_WATCHDOG ) + +void watchdog_reset (void ) +{ +at91_wdt_t *wdt = (at91_wdt_t *)AT91_WDT_BASE ; +int re_enable =disable_interrupts (); + +writel (AT91_WDT_CR_WDRSTT |AT91_WDT_CR_KEY , &wdt->cr); + +if (re_enable) +enable_interrupts (); +} + +#endif
Reinhard Meyer
NAKPATCH 1/1 Add watchdog reset to the at91samx SOC family
Dear Michael Trimarchi,
Quoted 1 line
This patch add the watchdog reset function to the atmel atsam9x architectures.
NAK.
Watchdog already exists at drivers/watchdog/at91sam9_wdt.c :)
Maybe its a bit of an obscure location... But it is already invented ;)
arch/arm/cpu/arm926ejs/at91/timer.c ulong get_tbclk(void) · line 154
Quoted 6 lines
arch/arm/cpu/arm926ejs/at91/timer.c +6
-0+int re_enable =disable_interrupts (); + +writel (AT91_WDT_CR_WDRSTT |AT91_WDT_CR_KEY , &wdt->cr); + +if (re_enable) +enable_interrupts ();
Besides... why would we need to disable IRQs here, writel() is using one instruction to write to the address?
Best Regards,
Reinhard
PATCH 1/1 Add watchdog reset to the at91samx SOC family
HI
Quoted 7 lines · Reinhard Meyer
Dear Michael Trimarchi,
Quoted 1 line
This patch add the watchdog reset function to the atmel atsam9x architectures.
NAK.
Watchdog already exists at
drivers/watchdog/at91sam9_wdt.c:)
Quoted 9 lines
Maybe its a bit of an obscure location... But it is already invented ;)
arch/arm/cpu/arm926ejs/at91/timer.c ulong get_tbclk(void) · line 154
Quoted 6 lines
arch/arm/cpu/arm926ejs/at91/timer.c +6
-0+int re_enable =disable_interrupts (); + +writel (AT91_WDT_CR_WDRSTT |AT91_WDT_CR_KEY , &wdt->cr); + +if (re_enable) +enable_interrupts ();
Yes was obscured, and it is the only one :) there
Michael
Quoted 7 lines
Besides... why would we need to disable IRQs here,
writel()is using one instruction to write to the address?Best Regards,
Reinhard
PATCH 1/1 Add watchdog reset to the at91samx SOC family
In reply to Reinhard MeyerHi
Quoted 7 lines · Reinhard Meyer
Dear Michael Trimarchi,
Quoted 1 line
This patch add the watchdog reset function to the atmel atsam9x architectures.
NAK.
Watchdog already exists at
drivers/watchdog/at91sam9_wdt.c:)
I'm getting confused because I have seen other implementation of the watchdog reset function and I was thinking that was the correct location of the function. Some board initialize it in the sturtup.
Quoted 12 lines
Maybe its a bit of an obscure location... But it is already invented ;)
arch/arm/cpu/arm926ejs/at91/timer.c ulong get_tbclk(void) · line 154
Quoted 6 lines
arch/arm/cpu/arm926ejs/at91/timer.c +6
-0+int re_enable =disable_interrupts (); + +writel (AT91_WDT_CR_WDRSTT |AT91_WDT_CR_KEY , &wdt->cr); + +if (re_enable) +enable_interrupts ();Besides... why would we need to disable IRQs here,
writel()is using one instruction to write to the address?
:(, Ok, I'm porting a new board and I have done it too fase without checking to much the code
but the final result. Anyway I have seen the driver but I don't understand how the HW_WATCHDOG interface match the hw_watchdog_init.
Michael Trimarchi
Quoted 4 lines
Best Regards,
Reinhard