Skip to contentSkip to conversation

davinci: psc.h: clean up indentation done using spaces

PATCH New Sekhar Nori 2 participants 10 messages Mar 23, 2011 – Mar 25, 2011

Subsystems (4)
Arm (32-bit) Arm sub-architectures libata TI DaVinci machine support
lore
Share & tools
lore

Sekhar Nori

author
#0 lore raw

PATCH 1/4 davinci: psc.h: clean up indentation done using spaces

psc.h has indentation using spaces at a number of places. Fix this by indenting using tabs instead.

Signed-off-by Sekhar Nori <[email protected]>
---
 arch/arm/mach-davinci/include/mach/psc.h |  148 +++++++++++++++---------------
 1 files changed, 74 insertions(+), 74 deletions(-)
arch/arm/mach-davinci/include/mach/psc.h +74 -74
index a47e6f2..1110fdd 100644
@@ -30,47 +30,47 @@
 #define	DAVINCI_PWR_SLEEP_CNTRL_BASE	0x01C41000
 
 /* Power and Sleep Controller (PSC) Domains */
-#define DAVINCI_GPSC_ARMDOMAIN      0
-#define DAVINCI_GPSC_DSPDOMAIN      1
+#define DAVINCI_GPSC_ARMDOMAIN		0
+#define DAVINCI_GPSC_DSPDOMAIN		1
 
-#define DAVINCI_LPSC_VPSSMSTR       0
-#define DAVINCI_LPSC_VPSSSLV        1
-#define DAVINCI_LPSC_TPCC           2
-#define DAVINCI_LPSC_TPTC0          3
-#define DAVINCI_LPSC_TPTC1          4
-#define DAVINCI_LPSC_EMAC           5
-#define DAVINCI_LPSC_EMAC_WRAPPER   6
-#define DAVINCI_LPSC_USB            9
-#define DAVINCI_LPSC_ATA            10
-#define DAVINCI_LPSC_VLYNQ          11
-#define DAVINCI_LPSC_UHPI           12
-#define DAVINCI_LPSC_DDR_EMIF       13
-#define DAVINCI_LPSC_AEMIF          14
-#define DAVINCI_LPSC_MMC_SD         15
-#define DAVINCI_LPSC_McBSP          17
-#define DAVINCI_LPSC_I2C            18
-#define DAVINCI_LPSC_UART0          19
-#define DAVINCI_LPSC_UART1          20
-#define DAVINCI_LPSC_UART2          21
-#define DAVINCI_LPSC_SPI            22
-#define DAVINCI_LPSC_PWM0           23
-#define DAVINCI_LPSC_PWM1           24
-#define DAVINCI_LPSC_PWM2           25
-#define DAVINCI_LPSC_GPIO           26
-#define DAVINCI_LPSC_TIMER0         27
-#define DAVINCI_LPSC_TIMER1         28
-#define DAVINCI_LPSC_TIMER2         29
-#define DAVINCI_LPSC_SYSTEM_SUBSYS  30
-#define DAVINCI_LPSC_ARM            31
-#define DAVINCI_LPSC_SCR2           32
-#define DAVINCI_LPSC_SCR3           33
-#define DAVINCI_LPSC_SCR4           34
-#define DAVINCI_LPSC_CROSSBAR       35
-#define DAVINCI_LPSC_CFG27          36
-#define DAVINCI_LPSC_CFG3           37
-#define DAVINCI_LPSC_CFG5           38
-#define DAVINCI_LPSC_GEM            39
-#define DAVINCI_LPSC_IMCOP          40
+#define DAVINCI_LPSC_VPSSMSTR		0
+#define DAVINCI_LPSC_VPSSSLV		1
+#define DAVINCI_LPSC_TPCC		2
+#define DAVINCI_LPSC_TPTC0		3
+#define DAVINCI_LPSC_TPTC1		4
+#define DAVINCI_LPSC_EMAC		5
+#define DAVINCI_LPSC_EMAC_WRAPPER	6
+#define DAVINCI_LPSC_USB		9
+#define DAVINCI_LPSC_ATA		10
+#define DAVINCI_LPSC_VLYNQ		11
+#define DAVINCI_LPSC_UHPI		12
+#define DAVINCI_LPSC_DDR_EMIF		13
+#define DAVINCI_LPSC_AEMIF		14
+#define DAVINCI_LPSC_MMC_SD		15
+#define DAVINCI_LPSC_McBSP		17
+#define DAVINCI_LPSC_I2C		18
+#define DAVINCI_LPSC_UART0		19
+#define DAVINCI_LPSC_UART1		20
+#define DAVINCI_LPSC_UART2		21
+#define DAVINCI_LPSC_SPI		22
+#define DAVINCI_LPSC_PWM0		23
+#define DAVINCI_LPSC_PWM1		24
+#define DAVINCI_LPSC_PWM2		25
+#define DAVINCI_LPSC_GPIO		26
+#define DAVINCI_LPSC_TIMER0		27
+#define DAVINCI_LPSC_TIMER1		28
+#define DAVINCI_LPSC_TIMER2		29
+#define DAVINCI_LPSC_SYSTEM_SUBSYS	30
+#define DAVINCI_LPSC_ARM		31
+#define DAVINCI_LPSC_SCR2		32
+#define DAVINCI_LPSC_SCR3		33
+#define DAVINCI_LPSC_SCR4		34
+#define DAVINCI_LPSC_CROSSBAR		35
+#define DAVINCI_LPSC_CFG27		36
+#define DAVINCI_LPSC_CFG3		37
+#define DAVINCI_LPSC_CFG5		38
+#define DAVINCI_LPSC_GEM		39
+#define DAVINCI_LPSC_IMCOP		40
 
 #define DM355_LPSC_TIMER3		5
 #define DM355_LPSC_SPI1			6

@@ -102,39 +102,39 @@
 /*
  * LPSC Assignments
  */
-#define DM646X_LPSC_ARM            0
-#define DM646X_LPSC_C64X_CPU       1
-#define DM646X_LPSC_HDVICP0        2
-#define DM646X_LPSC_HDVICP1        3
-#define DM646X_LPSC_TPCC           4
-#define DM646X_LPSC_TPTC0          5
-#define DM646X_LPSC_TPTC1          6
-#define DM646X_LPSC_TPTC2          7
-#define DM646X_LPSC_TPTC3          8
-#define DM646X_LPSC_PCI            13
-#define DM646X_LPSC_EMAC           14
-#define DM646X_LPSC_VDCE           15
-#define DM646X_LPSC_VPSSMSTR       16
-#define DM646X_LPSC_VPSSSLV        17
-#define DM646X_LPSC_TSIF0          18
-#define DM646X_LPSC_TSIF1          19
-#define DM646X_LPSC_DDR_EMIF       20
-#define DM646X_LPSC_AEMIF          21
-#define DM646X_LPSC_McASP0         22
-#define DM646X_LPSC_McASP1         23
-#define DM646X_LPSC_CRGEN0         24
-#define DM646X_LPSC_CRGEN1         25
-#define DM646X_LPSC_UART0          26
-#define DM646X_LPSC_UART1          27
-#define DM646X_LPSC_UART2          28
-#define DM646X_LPSC_PWM0           29
-#define DM646X_LPSC_PWM1           30
-#define DM646X_LPSC_I2C            31
-#define DM646X_LPSC_SPI            32
-#define DM646X_LPSC_GPIO           33
-#define DM646X_LPSC_TIMER0         34
-#define DM646X_LPSC_TIMER1         35
-#define DM646X_LPSC_ARM_INTC       45
+#define DM646X_LPSC_ARM		0
+#define DM646X_LPSC_C64X_CPU	1
+#define DM646X_LPSC_HDVICP0	2
+#define DM646X_LPSC_HDVICP1	3
+#define DM646X_LPSC_TPCC	4
+#define DM646X_LPSC_TPTC0	5
+#define DM646X_LPSC_TPTC1	6
+#define DM646X_LPSC_TPTC2	7
+#define DM646X_LPSC_TPTC3	8
+#define DM646X_LPSC_PCI		13
+#define DM646X_LPSC_EMAC	14
+#define DM646X_LPSC_VDCE	15
+#define DM646X_LPSC_VPSSMSTR	16
+#define DM646X_LPSC_VPSSSLV	17
+#define DM646X_LPSC_TSIF0	18
+#define DM646X_LPSC_TSIF1	19
+#define DM646X_LPSC_DDR_EMIF	20
+#define DM646X_LPSC_AEMIF	21
+#define DM646X_LPSC_McASP0	22
+#define DM646X_LPSC_McASP1	23
+#define DM646X_LPSC_CRGEN0	24
+#define DM646X_LPSC_CRGEN1	25
+#define DM646X_LPSC_UART0	26
+#define DM646X_LPSC_UART1	27
+#define DM646X_LPSC_UART2	28
+#define DM646X_LPSC_PWM0	29
+#define DM646X_LPSC_PWM1	30
+#define DM646X_LPSC_I2C		31
+#define DM646X_LPSC_SPI		32
+#define DM646X_LPSC_GPIO	33
+#define DM646X_LPSC_TIMER0	34
+#define DM646X_LPSC_TIMER1	35
+#define DM646X_LPSC_ARM_INTC	45
 
 /* PSC0 defines */
 #define DA8XX_LPSC0_TPCC		0

@@ -243,7 +243,7 @@
 #define PSC_STATE_DISABLE	2
 #define PSC_STATE_ENABLE	3
 
-#define MDSTAT_STATE_MASK 0x1f
+#define MDSTAT_STATE_MASK	0x1f
 
 #ifndef __ASSEMBLER__
Signature · 1 line
1.7.3.2
author
#1 lore raw

PATCH 2/4 davinci: enable forced transitions on PSC

Some DaVinci modules like the SATA on DA850 need forced module state transitions.

Add a "force" parameter to the PSC config function to enable it to make forced transitions.

Forced transitions shouldn't normally be attempted, unless the TRM explicitly specifies its usage.

Signed-off-by Sekhar Nori <[email protected]>
---
 arch/arm/mach-davinci/clock.c            |    8 +++++---
 arch/arm/mach-davinci/clock.h            |    1 +
 arch/arm/mach-davinci/include/mach/psc.h |    3 ++-
 arch/arm/mach-davinci/psc.c              |    4 +++-
 4 files changed, 11 insertions(+), 5 deletions(-)
arch/arm/mach-davinci/clock.c +5 -3
index e4e3af1..3b659c3 100644
@@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk)
 		__clk_enable(clk->parent);
 	if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
 		davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
-				PSC_STATE_ENABLE);
+				PSC_STATE_ENABLE, !!(clk->flags & PSC_FORCE));
 }
 
 static void __clk_disable(struct clk *clk)

@@ -55,7 +55,8 @@ static void __clk_disable(struct clk *clk)
 	    (clk->flags & CLK_PSC))
 		davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
 				(clk->flags & PSC_SWRSTDISABLE) ?
-				PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
+				PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE,
+				!!(clk->flags & PSC_FORCE));
 	if (clk->parent)
 		__clk_disable(clk->parent);
 }

@@ -240,7 +241,8 @@ static int __init clk_disable_unused(void)
 
 		davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc,
 				(ck->flags & PSC_SWRSTDISABLE) ?
-				PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
+				PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE,
+				!!(ck->flags & PSC_FORCE));
 	}
 	spin_unlock_irq(&clockfw_lock);
arch/arm/mach-davinci/clock.h +1 -0
index 0dd2203..48ee462 100644
@@ -111,6 +111,7 @@ struct clk {
 #define CLK_PLL			BIT(4) /* PLL-derived clock */
 #define PRE_PLL			BIT(5) /* source is before PLL mult/div */
 #define PSC_SWRSTDISABLE	BIT(6) /* Disable state is SwRstDisable */
+#define PSC_FORCE		BIT(7) /* Force module state transtition */
 
 #define CLK(dev, con, ck) 	\
 	{			\
arch/arm/mach-davinci/include/mach/psc.h +2 -1
index 1110fdd..394b535 100644
@@ -244,12 +244,13 @@
 #define PSC_STATE_ENABLE	3
 
 #define MDSTAT_STATE_MASK	0x1f
+#define MDCTL_FORCE		BIT(31)
 
 #ifndef __ASSEMBLER__
 
 extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
 extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
-		unsigned int id, u32 next_state);
+		unsigned int id, u32 next_state, bool force);
 
 #endif
arch/arm/mach-davinci/psc.c +3 -1
index a415804..651fcbf 100644
@@ -48,7 +48,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 
 /* Enable or disable a PSC domain */
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
-		unsigned int id, u32 next_state)
+		unsigned int id, u32 next_state, bool force)
 {
 	u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
 	void __iomem *psc_base;

@@ -65,6 +65,8 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
 	mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
 	mdctl &= ~MDSTAT_STATE_MASK;
 	mdctl |= next_state;
+	if (force)
+		mdctl |= MDCTL_FORCE;
 	__raw_writel(mdctl, psc_base + MDCTL + 4 * id);
 
 	pdstat = __raw_readl(psc_base + PDSTAT);
Signature · 1 line
1.7.3.2
author
#2 lore raw

PATCH 3/4 davinci: da850: add support for SATA interface

Add support for SATA controller on the DA850/OMAP-L138/AM18x devices.

The patch adds the necessary clocks, platform resources and a routine to initialize the SATA controller.

The PHY configuration in this patch is courtesy the work done by Zegeye Alemu, Swaminathan and Mansoor Ahamed from TI.

While testing this patch, enable port multiplier support iff you are actually using one. The reasons of this behaviour are discussed
here: http://patchwork.ozlabs.org/patch/78163/

Signed-off-by Sekhar Nori <[email protected]>
Cc linux-ide at vger.kernel.org
---
 arch/arm/mach-davinci/da850.c              |    9 ++
 arch/arm/mach-davinci/devices-da8xx.c      |  138 ++++++++++++++++++++++++++++
 arch/arm/mach-davinci/include/mach/da8xx.h |    3 +
 3 files changed, 150 insertions(+), 0 deletions(-)
arch/arm/mach-davinci/da850.c +9 -0
index 68fe4c2..276199d 100644
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
 	.flags		= DA850_CLK_ASYNC3,
 };
 
+static struct clk sata_clk = {
+	.name		= "sata",
+	.parent		= &pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_SATA,
+	.gpsc		= 1,
+	.flags		= PSC_FORCE,
+};
+
 static struct clk_lookup da850_clks[] = {
 	CLK(NULL,		"ref",		&ref_clk),
 	CLK(NULL,		"pll0",		&pll0_clk),

@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
 	CLK(NULL,		"usb20",	&usb20_clk),
 	CLK("spi_davinci.0",	NULL,		&spi0_clk),
 	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("ahci",		NULL,		&sata_clk),
 	CLK(NULL,		NULL,		NULL),
 };
arch/arm/mach-davinci/devices-da8xx.c +138 -0

147 lines not on this page · raw message

arch/arm/mach-davinci/include/mach/da8xx.h +3 -0
index e4fc1af..aa6f08e 100644
@@ -57,6 +57,7 @@ extern unsigned int da850_max_speed;
 #define DA8XX_SYSCFG1_BASE	(IO_PHYS + 0x22C000)
 #define DA8XX_SYSCFG1_VIRT(x)	(da8xx_syscfg1_base + (x))
 #define DA8XX_DEEPSLEEP_REG	0x8
+#define DA8XX_PWRDN_REG		0x18
 
 #define DA8XX_PSC0_BASE		0x01c10000
 #define DA8XX_PLL0_BASE		0x01c11000

@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
 #define DA8XX_GPIO_BASE		0x01e26000
 #define DA8XX_PSC1_BASE		0x01e27000
 #define DA8XX_LCD_CNTRL_BASE	0x01e13000
+#define DA850_SATA_BASE		0x01e18000
 #define DA8XX_PLL1_BASE		0x01e1a000
 #define DA8XX_MMCSD0_BASE	0x01c40000
 #define DA8XX_AEMIF_CS2_BASE	0x60000000

@@ -93,6 +95,7 @@ int da850_register_cpufreq(char *async_clk);
 int da8xx_register_cpuidle(void);
 void __iomem * __init da8xx_get_mem_ctlr(void);
 int da850_register_pm(struct platform_device *pdev);
+int __init da850_register_sata(unsigned long refclkpn);
 
 extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;
Signature · 1 line
1.7.3.2
author
#3 lore raw

PATCH 4/4 davinci: da850 evm: register SATA device

Register the platform device for SATA interface
present on the DA850/OMAP-L138/AM18x EVM.

Signed-off-by Sekhar Nori <[email protected]>
Cc linux-ide at vger.kernel.org
---
 arch/arm/mach-davinci/board-da850-evm.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)
arch/arm/mach-davinci/board-da850-evm.c +7 -0
index a7b41bf..3d2c0d7 100644
@@ -1117,6 +1117,8 @@ static __init int da850_evm_init_cpufreq(void)
 static __init int da850_evm_init_cpufreq(void) { return 0; }
 #endif
 
+#define DA850EVM_SATA_REFCLKPN_RATE	(100 * 1000 * 1000)
+
 static __init void da850_evm_init(void)
 {
 	int ret;

@@ -1237,6 +1239,11 @@ static __init void da850_evm_init(void)
 	if (ret)
 		pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
 				ret);
+
+	ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
+	if (ret)
+		pr_warning("da850_evm_init: sata registration failed: %d\n",
+				ret);
 }
 
 #ifdef CONFIG_SERIAL_8250_CONSOLE
Signature · 1 line
1.7.3.2
#4 lore raw

PATCH 3/4 davinci: da850: add support for SATA interface

In reply to Sekhar Nori

Hello.

Quoted 18 lines · Sekhar Nori

Add support for SATA controller on the DA850/OMAP-L138/AM18x devices.

The patch adds the necessary clocks, platform resources and a routine to initialize the SATA controller.

The PHY configuration in this patch is courtesy the work done by Zegeye Alemu, Swaminathan and Mansoor Ahamed from TI.

While testing this patch, enable port multiplier support iff you are actually using one. The reasons of this behaviour are discussed
here: http://patchwork.ozlabs.org/patch/78163/

Signed-off-by Sekhar Nori<[email protected]>
Cc linux-ide at vger.kernel.org

[...]

Quoted 20 lines
arch/arm/mach-davinci/da850.c +8 -0
index 68fe4c2..276199d 100644
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
  	.flags		= DA850_CLK_ASYNC3,
  };
 
+static struct clk sata_clk = {
+	.name		= "sata",
+	.parent		=&pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_SATA,
+	.gpsc		= 1,
+	.flags		= PSC_FORCE,
+};
+
  static struct clk_lookup da850_clks[] = {
  	CLK(NULL,		"ref",		&ref_clk),
  	CLK(NULL,		"pll0",		&pll0_clk),

arch/arm/mach-davinci/da850.c static struct clk_lookup da850_clks[] = { · line 432

Quoted 6 lines
arch/arm/mach-davinci/da850.c +1 -0
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
  	CLK(NULL,		"usb20",	&usb20_clk),
  	CLK("spi_davinci.0",	NULL,		&spi0_clk),
  	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("ahci",		NULL,		&sata_clk),
  	CLK(NULL,		NULL,		NULL),
  };

I'd put the above into a separate patch...

Quoted 4 lines
arch/arm/mach-davinci/devices-da8xx.c +0 -0
index 625d4b6..e061396 100644

[...]

Quoted 1 line
arch/arm/mach-davinci/devices-da8xx.c +0 -0
@@ -834,3 +836,139 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,

[...]

arch/arm/mach-davinci/devices-da8xx.c int __init da8xx_register_spi(int instance, struct spi_board_info *info, · line 877

Quoted 6 lines
arch/arm/mach-davinci/devices-da8xx.c +6 -0
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+	KHZ_TO_HZ(300000),
+	KHZ_TO_HZ(250000),
+	0,			/* Reserved */

Why reserve a place for it at all?

Quoted 22 lines
arch/arm/mach-davinci/devices-da8xx.c +22 -0
+	KHZ_TO_HZ(187500),
+	KHZ_TO_HZ(150000),
+	KHZ_TO_HZ(125000),
+	KHZ_TO_HZ(120000),
+	KHZ_TO_HZ(100000),
+	KHZ_TO_HZ(75000),
+	KHZ_TO_HZ(60000),
+};
+
+static int da850_sata_init(struct device *dev, void __iomem *addr)
+{
+	int i, ret;
+	unsigned int val;
+
+	da850_sata_clk = clk_get(dev, NULL);
+	if (IS_ERR(da850_sata_clk))
+		return PTR_ERR(da850_sata_clk);
+
+	ret = clk_enable(da850_sata_clk);
+	if (ret)
+		goto err0;
+

arch/arm/mach-davinci/devices-da8xx.c int __init da8xx_register_spi(int instance, struct spi_board_info *info, · line 909

Quoted 10 lines
arch/arm/mach-davinci/devices-da8xx.c +10 -0
+	/* Enable SATA clock receiver */
+	val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+	val&= ~BIT(0);
+	__raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+
+	/* Get the multiplier needed for 1.5GHz PLL output */
+	for (i = 0; i<  ARRAY_SIZE(da850_sata_xtal); i++) {
+		if (da850_sata_xtal[i] == da850_sata_refclkpn)
+			break;
+	}

{} not needed.

arch/arm/mach-davinci/devices-da8xx.c int __init da8xx_register_spi(int instance, struct spi_board_info *info, · line 914

Quoted 5 lines
arch/arm/mach-davinci/devices-da8xx.c +5 -0
+
+	if (i == ARRAY_SIZE(da850_sata_xtal)) {
+		ret = -EINVAL;
+		goto err1;
+	} else {

*else* not needed here, after *goto*.

Quoted 3 lines
arch/arm/mach-davinci/devices-da8xx.c +3 -0
+		val = SATA_PHY_MPY(i + 1);
+	}
+

[...]

Quoted 4 lines
arch/arm/mach-davinci/include/mach/da8xx.h +0 -0
index e4fc1af..aa6f08e 100644

[...]

arch/arm/mach-davinci/include/mach/da8xx.h extern unsigned int da850_max_speed; · line 69

Quoted 5 lines
arch/arm/mach-davinci/include/mach/da8xx.h +1 -0
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
  #define DA8XX_GPIO_BASE		0x01e26000
  #define DA8XX_PSC1_BASE		0x01e27000
  #define DA8XX_LCD_CNTRL_BASE	0x01e13000
+#define DA850_SATA_BASE		0x01e18000

It's used only in devices-da8xx.c -- shouldn't it be declared there?

WBR, Sergei

author
#5 lore raw

PATCH 3/4 davinci: da850: add support for SATA interface

Hi Sergei,

Quoted 20 lines · Sergei Shtylyov
Quoted 20 lines
arch/arm/mach-davinci/da850.c +8 -0
index 68fe4c2..276199d 100644
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
  	.flags		= DA850_CLK_ASYNC3,
  };
 
+static struct clk sata_clk = {
+	.name		= "sata",
+	.parent		=&pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_SATA,
+	.gpsc		= 1,
+	.flags		= PSC_FORCE,
+};
+
  static struct clk_lookup da850_clks[] = {
  	CLK(NULL,		"ref",		&ref_clk),
  	CLK(NULL,		"pll0",		&pll0_clk),

@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
Quoted 8 lines

arch/arm/mach-davinci/da850.c static struct clk_lookup da850_clks[] = { · line 432

Quoted 6 lines
arch/arm/mach-davinci/da850.c +1 -0
  	CLK(NULL,		"usb20",	&usb20_clk),
  	CLK("spi_davinci.0",	NULL,		&spi0_clk),
  	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("ahci",		NULL,		&sata_clk),
  	CLK(NULL,		NULL,		NULL),
  };

I'd put the above into a separate patch...

Why should addition of clock data not be in the same patch as the one which adds platform resources etc? It is not a big deal to change, but I would like to know why you request this.

Quoted 8 lines
Quoted 5 lines
arch/arm/mach-davinci/devices-da8xx.c +0 -0
index 625d4b6..e061396 100644

[...]

Quoted 1 line
arch/arm/mach-davinci/devices-da8xx.c +0 -0
@@ -834,3 +836,139 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,

[...]

Quoted 8 lines

arch/arm/mach-davinci/devices-da8xx.c int __init da8xx_register_spi(int instance, struct spi_board_info *info, · line 877

Quoted 6 lines
arch/arm/mach-davinci/devices-da8xx.c +6 -0
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+	KHZ_TO_HZ(300000),
+	KHZ_TO_HZ(250000),
+	0,			/* Reserved */

Why reserve a place for it at all?

Because then this table maps one-to-one to the hardware defined table. This in turn keeps the init code pretty simple. Plus, if and when hardware adds support for a crystal there, the changes to rest of the code are minimal.

Quoted 27 lines
Quoted 27 lines
arch/arm/mach-davinci/devices-da8xx.c +26 -0
+	KHZ_TO_HZ(187500),
+	KHZ_TO_HZ(150000),
+	KHZ_TO_HZ(125000),
+	KHZ_TO_HZ(120000),
+	KHZ_TO_HZ(100000),
+	KHZ_TO_HZ(75000),
+	KHZ_TO_HZ(60000),
+};
+
+static int da850_sata_init(struct device *dev, void __iomem *addr)
+{
+	int i, ret;
+	unsigned int val;
+
+	da850_sata_clk = clk_get(dev, NULL);
+	if (IS_ERR(da850_sata_clk))
+		return PTR_ERR(da850_sata_clk);
+
+	ret = clk_enable(da850_sata_clk);
+	if (ret)
+		goto err0;
+
+	/* Enable SATA clock receiver */
+	val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
+	val&= ~BIT(0);
+	__raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
Quoted 8 lines

arch/arm/mach-davinci/devices-da8xx.c int __init da8xx_register_spi(int instance, struct spi_board_info *info, · line 909

Quoted 6 lines
arch/arm/mach-davinci/devices-da8xx.c +6 -0
+
+	/* Get the multiplier needed for 1.5GHz PLL output */
+	for (i = 0; i<  ARRAY_SIZE(da850_sata_xtal); i++) {
+		if (da850_sata_xtal[i] == da850_sata_refclkpn)
+			break;
+	}

{} not needed.

Okay, will remove.

Quoted 8 lines

arch/arm/mach-davinci/devices-da8xx.c int __init da8xx_register_spi(int instance, struct spi_board_info *info, · line 914

Quoted 6 lines
arch/arm/mach-davinci/devices-da8xx.c +5 -0
+
+	if (i == ARRAY_SIZE(da850_sata_xtal)) {
+		ret = -EINVAL;
+		goto err1;
+	} else {

*else* not needed here, after *goto*.

Yup, will fix.

Quoted 11 lines
Quoted 4 lines
arch/arm/mach-davinci/devices-da8xx.c +3 -0
+		val = SATA_PHY_MPY(i + 1);
+	}
+

[...]

Quoted 4 lines
arch/arm/mach-davinci/include/mach/da8xx.h +0 -0
index e4fc1af..aa6f08e 100644

[...]

Quoted 7 lines

arch/arm/mach-davinci/include/mach/da8xx.h extern unsigned int da850_max_speed; · line 69

Quoted 5 lines
arch/arm/mach-davinci/include/mach/da8xx.h +1 -0
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
  #define DA8XX_GPIO_BASE		0x01e26000
  #define DA8XX_PSC1_BASE		0x01e27000
  #define DA8XX_LCD_CNTRL_BASE	0x01e13000
+#define DA850_SATA_BASE		0x01e18000

It's used only in devices-da8xx.c -- shouldn't it be declared there?

Yes, will move. Base addresses for modules like LCD and MMCSD can be moved as well - should be subject of some future clean-up patch.

Thanks,
Sekhar

#6 lore raw

PATCH 3/4 davinci: da850: add support for SATA interface

Hello.

Quoted 29 lines · Sekhar
Quoted 20 lines
Quoted 20 lines
arch/arm/mach-davinci/da850.c +8 -0
index 68fe4c2..276199d 100644
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
   	.flags		= DA850_CLK_ASYNC3,
   };
 
+static struct clk sata_clk = {
+	.name		= "sata",
+	.parent		=&pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_SATA,
+	.gpsc		= 1,
+	.flags		= PSC_FORCE,
+};
+
   static struct clk_lookup da850_clks[] = {
   	CLK(NULL,		"ref",		&ref_clk),
   	CLK(NULL,		"pll0",		&pll0_clk),

@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
Quoted 8 lines

arch/arm/mach-davinci/da850.c static struct clk_lookup da850_clks[] = { · line 432

Quoted 6 lines
arch/arm/mach-davinci/da850.c +1 -0
   	CLK(NULL,		"usb20",	&usb20_clk),
   	CLK("spi_davinci.0",	NULL,		&spi0_clk),
   	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("ahci",		NULL,		&sata_clk),
   	CLK(NULL,		NULL,		NULL),
   };

I'd put the above into a separate patch...

Quoted 3 lines

Why should addition of clock data not be in the same patch as the one which adds platform resources etc? It is not a big deal to change, but I would like to know why you request this.

I didn't request anything, I just said what I'd have done. :-)
I think modifying the DA8xx-common and DA850-specific files should better be done separately. Although in this case we're adding DA850 only device, so perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?

Quoted 16 lines
Quoted 7 lines
Quoted 4 lines
arch/arm/mach-davinci/devices-da8xx.c +0 -0
index 625d4b6..e061396 100644

[...]

Quoted 1 line
arch/arm/mach-davinci/devices-da8xx.c +0 -0
@@ -834,3 +836,139 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info,

[...]

Quoted 8 lines

arch/arm/mach-davinci/devices-da8xx.c int __init da8xx_register_spi(int instance, struct spi_board_info *info, · line 877

Quoted 6 lines
arch/arm/mach-davinci/devices-da8xx.c +6 -0
+/* Supported DA850 SATA crystal frequencies */
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
+static unsigned long da850_sata_xtal[] = {
+	KHZ_TO_HZ(300000),
+	KHZ_TO_HZ(250000),
+	0,			/* Reserved */

Why reserve a place for it at all?

Quoted 2 lines

Because then this table maps one-to-one to the hardware defined table.

Ah, sorry, have missed that...

Quoted 18 lines
Quoted 10 lines
Quoted 3 lines
arch/arm/mach-davinci/devices-da8xx.c +3 -0
+		val = SATA_PHY_MPY(i + 1);
+	}
+

[...]

Quoted 4 lines
arch/arm/mach-davinci/include/mach/da8xx.h +0 -0
index e4fc1af..aa6f08e 100644

[...]

Quoted 7 lines

arch/arm/mach-davinci/include/mach/da8xx.h extern unsigned int da850_max_speed; · line 69

Quoted 5 lines
arch/arm/mach-davinci/include/mach/da8xx.h +1 -0
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
   #define DA8XX_GPIO_BASE		0x01e26000
   #define DA8XX_PSC1_BASE		0x01e27000
   #define DA8XX_LCD_CNTRL_BASE	0x01e13000
+#define DA850_SATA_BASE		0x01e18000

It's used only in devices-da8xx.c -- shouldn't it be declared there?

Quoted 2 lines

Yes, will move. Base addresses for modules like LCD and MMCSD can be moved as well - should be subject of some future clean-up patch.

Yes, maybe I'll submit one...

Quoted 2 lines

Thanks,
Sekhar

WBR, Sergei

author
#7 lore raw

PATCH 3/4 davinci: da850: add support for SATA interface

Hi Sergei,

Quoted 33 lines · Sergei Shtylyov

Hello.

Quoted 28 lines · Sekhar
Quoted 28 lines
Quoted 20 lines
arch/arm/mach-davinci/da850.c +8 -0
index 68fe4c2..276199d 100644
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
   	.flags		= DA850_CLK_ASYNC3,
   };
 
+static struct clk sata_clk = {
+	.name		= "sata",
+	.parent		=&pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_SATA,
+	.gpsc		= 1,
+	.flags		= PSC_FORCE,
+};
+
   static struct clk_lookup da850_clks[] = {
   	CLK(NULL,		"ref",		&ref_clk),
   	CLK(NULL,		"pll0",		&pll0_clk),

arch/arm/mach-davinci/da850.c static struct clk_lookup da850_clks[] = { · line 432

Quoted 6 lines
arch/arm/mach-davinci/da850.c +1 -0
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
   	CLK(NULL,		"usb20",	&usb20_clk),
   	CLK("spi_davinci.0",	NULL,		&spi0_clk),
   	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("ahci",		NULL,		&sata_clk),
   	CLK(NULL,		NULL,		NULL),
   };

I'd put the above into a separate patch...

Quoted 5 lines
Quoted 3 lines

Why should addition of clock data not be in the same patch as the one which adds platform resources etc? It is not a big deal to change, but I would like to know why you request this.

I didn't request anything, I just said what I'd have done. :-)

Okay. I guess I will keep it as is.

Quoted 3 lines

I think modifying the DA8xx-common and DA850-specific files should better be done separately. Although in this case we're adding DA850 only device, so perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?

Good point. Will add the #ifdef.

Quoted 13 lines
Quoted 12 lines
Quoted 12 lines
Quoted 4 lines
arch/arm/mach-davinci/include/mach/da8xx.h +0 -0
index e4fc1af..aa6f08e 100644

[...]

arch/arm/mach-davinci/include/mach/da8xx.h extern unsigned int da850_max_speed; · line 69

Quoted 5 lines
arch/arm/mach-davinci/include/mach/da8xx.h +1 -0
@@ -65,6 +66,7 @@ extern unsigned int da850_max_speed;
   #define DA8XX_GPIO_BASE		0x01e26000
   #define DA8XX_PSC1_BASE		0x01e27000
   #define DA8XX_LCD_CNTRL_BASE	0x01e13000
+#define DA850_SATA_BASE		0x01e18000

It's used only in devices-da8xx.c -- shouldn't it be declared there?

Quoted 4 lines
Quoted 2 lines

Yes, will move. Base addresses for modules like LCD and MMCSD can be moved as well - should be subject of some future clean-up patch.

Yes, maybe I'll submit one...

Thanks for the help!

Regards,
Sekhar

#8 lore raw

PATCH 3/4 davinci: da850: add support for SATA interface

Hello.

Quoted 35 lines · Sekhar
Quoted 29 lines
Quoted 28 lines
Quoted 28 lines
Quoted 20 lines
arch/arm/mach-davinci/da850.c +8 -0
index 68fe4c2..276199d 100644
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
   	.flags		= DA850_CLK_ASYNC3,
   };
 
+static struct clk sata_clk = {
+	.name		= "sata",
+	.parent		=&pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_SATA,
+	.gpsc		= 1,
+	.flags		= PSC_FORCE,
+};
+
   static struct clk_lookup da850_clks[] = {
   	CLK(NULL,		"ref",		&ref_clk),
   	CLK(NULL,		"pll0",		&pll0_clk),

arch/arm/mach-davinci/da850.c static struct clk_lookup da850_clks[] = { · line 432

Quoted 6 lines
arch/arm/mach-davinci/da850.c +1 -0
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
   	CLK(NULL,		"usb20",	&usb20_clk),
   	CLK("spi_davinci.0",	NULL,		&spi0_clk),
   	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("ahci",		NULL,		&sata_clk),
   	CLK(NULL,		NULL,		NULL),
   };

I'd put the above into a separate patch...

Quoted 5 lines
Quoted 3 lines

Why should addition of clock data not be in the same patch as the one which adds platform resources etc? It is not a big deal to change, but I would like to know why you request this.

I didn't request anything, I just said what I'd have done. :-)

Quoted 7 lines

Okay. I guess I will keep it as is.

Quoted 3 lines

I think modifying the DA8xx-common and DA850-specific files should better be done separately. Although in this case we're adding DA850 only device, so perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?

Good point. Will add the #ifdef.

Or perhaps the device should just be placed in da850.c instead?

WBR, Sergei

author
#9 lore raw

PATCH 3/4 davinci: da850: add support for SATA interface

Hi Sergei,

Quoted 41 lines · Sergei Shtylyov

Hello.

Quoted 36 lines · Sekhar
Quoted 29 lines
Quoted 28 lines
Quoted 28 lines
Quoted 20 lines
arch/arm/mach-davinci/da850.c +8 -0
index 68fe4c2..276199d 100644
@@ -373,6 +373,14 @@ static struct clk spi1_clk = {
   	.flags		= DA850_CLK_ASYNC3,
   };
 
+static struct clk sata_clk = {
+	.name		= "sata",
+	.parent		=&pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_SATA,
+	.gpsc		= 1,
+	.flags		= PSC_FORCE,
+};
+
   static struct clk_lookup da850_clks[] = {
   	CLK(NULL,		"ref",		&ref_clk),
   	CLK(NULL,		"pll0",		&pll0_clk),

arch/arm/mach-davinci/da850.c static struct clk_lookup da850_clks[] = { · line 432

Quoted 6 lines
arch/arm/mach-davinci/da850.c +1 -0
@@ -419,6 +427,7 @@ static struct clk_lookup da850_clks[] = {
   	CLK(NULL,		"usb20",	&usb20_clk),
   	CLK("spi_davinci.0",	NULL,		&spi0_clk),
   	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("ahci",		NULL,		&sata_clk),
   	CLK(NULL,		NULL,		NULL),
   };

I'd put the above into a separate patch...

Quoted 5 lines
Quoted 3 lines

Why should addition of clock data not be in the same patch as the one which adds platform resources etc? It is not a big deal to change, but I would like to know why you request this.

I didn't request anything, I just said what I'd have done. :-)

Okay. I guess I will keep it as is.

Quoted 7 lines
Quoted 5 lines
Quoted 3 lines

I think modifying the DA8xx-common and DA850-specific files should better be done separately. Although in this case we're adding DA850 only device, so perhaps the added code in devices-da8xx.c should be enclosed into #ifdef?

Good point. Will add the #ifdef.

Or perhaps the device should just be placed in da850.c instead?

Um, no. da850.c is currently free from any peripheral specific functionality and would like to keep it that way. MMC/SD1 is DA850 specific as well, and has been kept in devices-da8xx.c. I think consolidating all peripheral specific code in devices-da8xx.c is a better idea.

Thanks,
Sekhar