MIPS: Move timer code to arch/mips/cpu/$(CPU)/

Current timer routines (arch/mips/lib/timer.c) are implemented assuming that MIPS32 coprocessor (CP0) resources, Counter and Compare registers in this case, are available. But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use CP0 counter/compare registers as time keeping resources. And some MIPS variant processors might come with different hardware specs with genuine MIPS32 CP0 registers.

This patch makes each $(CPU) can have its own timer code.

---
 arch/mips/cpu/mips32/Makefile        |    2 +-
 arch/mips/{lib => cpu/mips32}/time.c |    0
 arch/mips/lib/Makefile               |    1 -
 3 files changed, 1 insertions(+), 2 deletions(-)
 rename arch/mips/{lib => cpu/mips32}/time.c (100%)

index e315c1b..eb8e005 100644
@@ -27,7 +27,7 @@ LIB	= $(obj)lib$(CPU).o
 
 START	= start.o
 SOBJS-y	= cache.o
-COBJS-y	= cpu.o interrupts.o
+COBJS-y	= cpu.o interrupts.o time.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))

similarity index 100%
rename from arch/mips/lib/time.c
rename to arch/mips/cpu/mips32/time.c

index 4e90704..9244f31 100644
@@ -33,7 +33,6 @@ COBJS-y	+= bootm_qemu_mips.o
 else
 COBJS-y	+= bootm.o
 endif
-COBJS-y	+= time.o
 
 SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))

1.7.4.5

Surprisingly, time.c works fine for us with our 64-bit OCTEON MIPS support, though I had to remove references to a global in the init code because DRAM isn't initialized at that point. The only file in lib we are not able to use is board.c.

-Aaron